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Conferences in DBLP

2006 (conf/ahs/2006)

  1. Aleksandar Tasic
    Adaptive Multifunctional Circuits and Systems for Future Generations of Wireless Communications. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:3-11 [Conf]
  2. Varun Aggarwal, Meng Mao, Una-May O'Reilly
    A Self-Tuning Analog Proportional-Integral-Derivative (PID) Controller. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:12-19 [Conf]
  3. Mustafa Keskin, Nurcan Keskin
    A Tuning Technique for Switched-Capacitor Circuits. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:20-23 [Conf]
  4. Mustafa Keskin
    A Background Mismatch Calibration For Capacitive Digitial-To-Analog Converters RTERS. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:24-27 [Conf]
  5. Adrian Stoica, Ricardo Salem Zebulum, Didier Keymeulen, Rajeshuni Ramesham, Joseph Neff, Srinivas Katkoori
    Temperature-Adaptive Circuits on Reconfigurable Analog Arrays. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:28-31 [Conf]
  6. Martin Trefzer, Jörg Langeheine, Karlheinz Meier, Johannes Schemmel
    A Modular Framework for the Evolution of Circuits on Configurable Transistor Array Architectures. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:32-42 [Conf]
  7. Nakul Haridas, Ahmet T. Erdogan, Tughrul Arslan, Mark Begbie
    Adaptive Micro-Antenna on Silicon Substrate. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:43-50 [Conf]
  8. Gabriella Kókai, Tonia Christ, Hans Holm Frühauf
    Using Hardware-Based Particle Swarm Method for Dynamic Optimization of Adaptive Array Antennas. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:51-58 [Conf]
  9. Ozgur Tamer, Ahmet Özkurt
    Systolic Array Based Adaptive Beamformer Modeling in SystemC Environment. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:59-66 [Conf]
  10. Hirokazu Nosato, Masahiro Murakawa, Tetsuya Higuchi
    Automatic Alignment of Multiple Optical Components Using Genetic Algorithm. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:67-73 [Conf]
  11. Onur Keskin, Peter Hampton, Rodolphe Conan, Colin Bradley, Aaron Hilton, Celia Blain
    Woofer-Tweeter Adaptive Optics Test Bench. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:74-80 [Conf]
  12. Mihai Oltean
    Switchable Glass: A Possible Medium for Evolvable Hardware. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:81-87 [Conf]
  13. Omar Paranaiba Vilela Neto, Leone Pereira Masiero, Marco Aurélio Cavalcanti Pacheco, Carlos R. Hall Barbosa
    Evolvable Hardware Applied to Nanotechnology. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:88-96 [Conf]
  14. Joseph Kolibal, Daniel Howard
    The Novel Stochastic Bernstein Method of Functional Approximation. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:97-100 [Conf]
  15. Horia-Nicolai L. Teodorescu
    An Adaptive Heuristic Filter for Acceleration. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:101-108 [Conf]
  16. Nizamettin Aydin, Tughrul Arslan
    Power Driven Reconfigurable Complex Continuous Wavelet Transform. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:109-113 [Conf]
  17. Gorn Tepvorachai, Christos A. Papachristou
    Self-Configurable Neural Network Processor for FIR Filter Applications. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:114-121 [Conf]
  18. Remzi Arslanalp, Abdullah T. Tola
    A New State Space Representation Method for Adaptive Log Domain Systems. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:122-128 [Conf]
  19. Gianluca Tempesti, Pierre-André Mudry, Guillaume Zufferey
    Hardware/Software Coevolution of Genome Programs and Cellular Processors. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:129-136 [Conf]
  20. Gunnar Tufte
    Gene Regulation Mechanisms Introduced in the Evaluation Criteria for a Hardware Cellular Development System. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:137-144 [Conf]
  21. Justin Lee, Joaquin Sitte
    Gate-level Morphogenetic Evolvable Hardware for Scalability and Adaptation on FPGAs. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:145-152 [Conf]
  22. Andres Upegui, Eduardo Sanchez
    Evolving Hardware with Self-reconfigurable connectivity in Xilinx FPGAs. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:153-162 [Conf]
  23. Jorge Pena, Andres Upegui, Eduardo Sanchez
    Particle Swarm Optimization with Discrete Recombination: An Online Optimizer for Evolvable Hardware. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:163-170 [Conf]
  24. Lukás Sekanina
    Evolutionary Design of Digital Circuits: Where Are Current Limits? [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:171-178 [Conf]
  25. Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert
    Generalized Disjunction Decomposition for the Evolution of Programmable Logic Array Structures. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:179-185 [Conf]
  26. Lukás Sekanina, Lukás Starecek, Zbysek Gajda, Zdenek Kotásek
    Evolution of Multifunctional Combinational Modules Controlled by the Power Supply Voltage. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:186-193 [Conf]
  27. Xuesong Yan, Wei Wei, Rui Liu, Sanyou Y. Zeng, Lishan Kang
    Designing Electronic Circuits by Means of Gene Expression Programming. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:194-199 [Conf]
  28. Wing On Fung, Tughrul Arslan, Sami Khawam
    Genetic Algorithm based Engine for Domain-Specific Reconfigurable Arrays. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:200-206 [Conf]
  29. Evangelos F. Stefatos, Tughrul Arslan, Didier Keymeulen, Ian Ferguson
    Towards the Integration of Drive Control Loop Electronics of the JPL/Boeing Gyroscope within an Autonomous Robust Custom-Reconfigurable Platform. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:207-214 [Conf]
  30. Rui Liu, Sang-you Zeng, Lixin X. Ding, Lishan Kang, Hui Li, Yuping Chen, Yong Liu, Yueping Han
    An Efficient Multi-Objective Evolutionary Algorithm for Combinational Circuit Design. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:215-221 [Conf]
  31. Hugo de Garis
    Hardware Accelerators for Evolving Building Block Modules for Artificial Brains. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:222-224 [Conf]
  32. Steffen Toscher, Thomas Reinemann, Roland Kasper
    An Adaptive FPGA-Based Mechatronic Control System Supporting Partial Reconfiguration of Controller Functionalities. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:225-228 [Conf]
  33. Mohsin A. Syed, Eberhard Schüler
    Reconfigurable Parallel Computing Architecture for On-Board Data Processing. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:229-236 [Conf]
  34. H. Fatih Ugurdag, Yahya Sahin, Onur Baskirt
    Population-Based FPGA Solution to Mastermind Game. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:237-246 [Conf]
  35. Martin Margala
    Adaptable Architectures for Signal Processing Applications. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:247-254 [Conf]
  36. Wim Vanderbauwhede
    The Gannet Service-Based SoC: A Service-level Reconfigurable Architecture. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:255-261 [Conf]
  37. Tanya Vladimirova, Xiaofeng Wu
    On-Board Partial Run-Time Reconfiguration for Pico-Satellite Constellations. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:262-269 [Conf]
  38. Sajid Baloch, Tughrul Arslan, Adrian Stoica
    Embedded Reconfigurable Array Fabrics for Efficient Implementation of Image Compression Techniques. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:270-280 [Conf]
  39. Andy M. Tyrrell, Hong Sun
    A Honeycomb Development Architecture for Robust Fault-Tolerant Design. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:281-287 [Conf]
  40. Katarina Paulsson, Michael Hübner, Jürgen Becker
    Strategies to On- Line Failure Recovery in Self- Adaptive Systems based on Dynamic and Partial Reconfiguration. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:288-291 [Conf]
  41. Sajid Baloch, Tughrul Arslan, Adrian Stoica
    An Efficient Technique for Preventing Single Event Disruptions in Synchronous and Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:292-295 [Conf]
  42. Didier Keymeulen, Ricardo Salem Zebulum, Rajeshuni Ramesham, Adrian Stoica, Srinivas Katkoori, Sharon Graves, Frank Novak, Charles Antill
    Self-Adaptive System Based on Field Programmable Gate Array for Extreme Temperature Electronics. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:296-300 [Conf]
  43. Robert Ross, Richard Hall
    A FPGA Simulation Using Asexual Genetic Algorithms for Integrated Self-Repair. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:301-304 [Conf]
  44. Stefanos Skoulaxinos
    SW-HW Co-design and Fault Tolerant Implementation for the LRID Wireless Communication System. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:305-308 [Conf]
  45. H. J. Kadim
    Analytical Modelling of Power Attenuation under Parameter Fluctuations with Applications to Self-Test and Repair. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:309-312 [Conf]
  46. Savio Chau, Van Dang, Joseph Xu, James Lu
    An Automatic Technique to Synthesize Avionics Architecture. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:313-316 [Conf]
  47. H. J. Kadim
    State-Space Based Analytical Modelling for Real-Time Fault Recovery and Self-Repair with Applications to Biosensors. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:317-322 [Conf]
  48. Tughrul Arslan, Nakul Haridas, Erfu Yang, Ahmet T. Erdogan, Nick Barton, A. J. Walton, John S. Thompson, Adrian Stoica, T. Vladimirova, Klaus D. McDonald-Maier, W. G. J. Howells
    ESPACENET: A Framework of Evolvable and Reconfigurable Sensor Networks for Aerospace-Based Monitoring and Diagnostics. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:323-329 [Conf]
  49. Tanya Vladimirova, Xiaofeng Wu, Kawsu Sidibeh, David Barnhart, Abdul-Halim Jallad
    Enabling Technologies for Distributed Picosatellite Missions in LEO. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:330-337 [Conf]
  50. Andrew B. T. Hopkins, Klaus D. McDonald-Maier
    A Generic On-Chip Debugger for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:338-342 [Conf]
  51. Gareth Howells, Evangelos Papoutsis, Klaus D. McDonald-Maier
    Novel Techniques for Ensuring Secure Communications for Distributed Low Power Devices. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:343-350 [Conf]
  52. A. Neslin Ismailoglu, O. Benderli, Soner Yesil, Refik Sever, Burak Okcan, O. Sengul, Rusen Öktem
    GEZGIN & GEZGIN-2: Adaptive Real-Time Image Processing Subsystems for Earth Observing Small Satellites. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:351-358 [Conf]
  53. Shengmin Ge, Hao Cheng
    A Comparative Design of Satellite Attitude Control System with Reaction Wheel. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:359-364 [Conf]
  54. Muhammed R. Pac, Aydan M. Erkmen, Ismet Erkmen
    Towards Fluent Sensor Networks: A Scalable and Robust Self-Deployment Approach. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:365-372 [Conf]
  55. Kyrre Glette, Jim Torresen, Moritoshi Yasunaga, Yoshiki Yamaguchi
    On-Chip Evolution Using a Soft Processor Core Applied to Image Recognition. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:373-380 [Conf]
  56. Mustafa Parlak, Ilker Hamzaoglu
    An Efficient Hardware Architecture for H.264 Adaptive Deblocking Filter. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:381-385 [Conf]
  57. Jim Torresen, Jonas Jakobsen
    An FPGA Implemented Processor Architecture with Adaptive Resolution. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:386-389 [Conf]
  58. Syamsiah Mashohor, Jonathan R. Evans, Ahmet T. Erdogan
    Automatic Hybrid Genetic Algorithm Based Printed Circuit Board Inspection. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:390-400 [Conf]
  59. Selcuk Okdem, Dervis Karaboga
    Routing in Wireless Sensor Networks Using Ant Colony Optimization. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:401-404 [Conf]
  60. B. Ahmad, Ahmet T. Erdogan, Sami Khawam
    Architecture of a Dynamically Reconfigurable NoC for Adaptive Reconfigurable MPSoC. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:405-411 [Conf]
  61. Jichuan Zhao, Ahmet T. Erdogan
    A Novel Self-Organizing Hybrid Network Protocol for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:412-419 [Conf]
  62. Ioannis Nousias, Tughrul Arslan
    Wormhole Routing with Virtual Channels using Adaptive Rate Control for Network-on-Chip (NoC). [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:420-423 [Conf]
  63. Nasri Sulaiman, Ahmet T. Erdogan
    A Multi-Objective Genetic Algorithm for On-Chip Real-time Adaptation of a Multi-Carrier Based Telecommunications Receiver. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:424-427 [Conf]
  64. Ediz Çetin, Süleyman Sirri Demirsoy, Izzet Kale, Richard C. S. Morling
    A Low-Complexity Self-Calibrating Adaptive Quadrature Receiver. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:428-435 [Conf]
  65. Heiko Hinkelmann, Peter Zipf, Manfred Glesner
    Design Concepts for a Dynamically ReconfigurableWireless Sensor Node. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:436-441 [Conf]
  66. Gökmen Altay, Osman N. Uçan, Nejla Altay, Senay Yalçin
    On the Trellis Structures of Geometric Augmented Product Codes. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:442-450 [Conf]
  67. Khalil Zebbiche, Lahouari Ghouti, Fouad Khelifi, Ahmed Bouridane
    Protecting Fingerprint Data Using Watermarking. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:451-456 [Conf]
  68. Amr T. Abdel-Hamid, Sofiène Tahar, El Mostapha Aboulhamid
    Finite State Machine IP Watermarking: A Tutorial. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:457-464 [Conf]
  69. Walid R. Boukabou, Lahouari Ghouti, Ahmed Bouridane
    Face Recognition Using a Gabor Filter Bank Approach. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:465-468 [Conf]
  70. Lin Yuan, Gang Qu, Lahouari Ghouti, Ahmed Bouridane
    VLSI Design IP Protection: Solutions, New Challenges, and Opportunities. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:469-476 [Conf]
  71. Osama Al-Khaleel, Christos A. Papachristou, Frank Wolff, Kiamal Z. Pekmestzi
    A Large Scale Adaptable Multiplier for Cryptographic Applications. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:477-484 [Conf]
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