Conferences in DBLP
Simon Knowles The Return of Silicon Efficiency. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:3- [Conf ] Heumpil Cho , Earl E. Swartzlander Jr. Serial Parallel Multiplier Design in Quantum-dot Cellular Automata. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:7-15 [Conf ] Dinesh Patil , Omid Azizi , Mark Horowitz , Ron Ho , Rajesh Ananthraman Robust Energy-Efficient Adder Topologies. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:16-28 [Conf ] Marius Cornea , Cristina Anderson , John Harrison , Ping Tak Peter Tang , Eric Schneider , Charles Tsen A Software Implementation of the IEEE 754R Decimal Floating-Point Arithmetic Using the Binary Encoding Format. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:29-37 [Conf ] Merav Aharoni , Ron Maharik , Abraham Ziv Solving Constraints on the Intermediate Result of Decimal Floating-Point Operations. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:38-45 [Conf ] Mark A. Erle , Michael J. Schulte , Brian J. Hickmann Decimal Floating-Point Multiplication Via Carry-Save Addition. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:46-55 [Conf ] Liang-Kai Wang , Michael J. Schulte Decimal Floating-Point Adder and Multifunction Unit with Injection-Based Rounding. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:56-68 [Conf ] Libo Huang , Li Shen , Kui Dai , Zhiying Wang A New Architecture For Multiple-Precision Floating-Point Multiply-Add Fused Unit Design. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:69-76 [Conf ] Son Dao Trong , Martin S. Schmookler , Eric M. Schwarz , Michael Kroener P6 Binary Floating-Point Unit. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:77-86 [Conf ] Neil Burgess , Chris N. Hinds Design of the ARM VFP11 Divide and Square Root Synthesisable Macrocell. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:87-96 [Conf ] Jean-Luc Beuchat , Masaaki Shirase , Tsuyoshi Takagi , Eiji Okamoto An Algorithm for the nt Pairing Calculation in Characteristic Three and its Hardware Implementation. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:97-104 [Conf ] Katsuki Kobayashi , Naofumi Takagi , Kazuyoshi Takagi An Algorithm for Inversion in GF(2^m) Suitable for Implementation Using a Polynomial Multiply Instruction on GF(2). [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:105-112 [Conf ] Jaewook Chung , M. Anwar Hasan Asymmetric Squaring Formulae. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:113-122 [Conf ] Gökay Saldamli , Çetin Kaya Koç Spectral Modular Exponentiation. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:123-132 [Conf ] Guillaume Hanrot , Vincent Lefèvre , Damien Stehlé , Paul Zimmermann Worst Cases of a Periodic Function for Large Arguments. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:133-140 [Conf ] Philippe Langlois , Nicolas Louvet How to Ensure a Faithful Polynomial Evaluation with the Compensated Horner Algorithm. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:141-149 [Conf ] Laurent Fousse Accurate Multiple-Precision Gauss-Legendre Quadrature. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:150-160 [Conf ] Jérémie Detrey , Florent de Dinechin , Xavier Pujol Return of the hardware floating-point elementary function. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:161-168 [Conf ] Nicolas Brisebarre , Sylvain Chevillard Efficient polynomial L-approximations. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:169-176 [Conf ] Nicolas Brisebarre , Guillaume Hanrot Floating-point L2 -approximations to functions. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:177-186 [Conf ] Sylvie Boldo , Jean-Christophe Filliâtre Formal Verification of Floating-Point Programs. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:187-194 [Conf ] Alvaro Vazquez , Elisardo Antelo , Paolo Montuschi A New Family of High.Performance Parallel Decimal Multipliers. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:195-204 [Conf ] Nachiket Kapre , André DeHon Optimistic Parallelization of Floating-Point Accumulation. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:205-216 [Conf ] Ping Tak Peter Tang Modular Multiplication using Redundant Digit Division. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:217-224 [Conf ] William Hasenplaugh , Gunnar Gaubatz , Vinodh Gopal Fast Modular Reduction. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:225-229 [Conf ] Jaewook Chung , M. Anwar Hasan Montgomery Reduction Algorithm for Modular Multiplication Using Low-Weight Polynomial Form Integers. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:230-239 [Conf ] Leonel Sousa Efficient Method for Magnitude Comparison in RNS Based on Two Pairs of Conjugate Moduli. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:240-250 [Conf ] Yedidya Hilewitz , Ruby B. Lee Performing Advanced Bit Manipulations Efficiently in General-Purpose Processors. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:251-260 [Conf ] Vassil S. Dimitrov , Laurent Imbert , Andrew Zakaluzny Multiplication by a Constant is Sublinear. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2007, pp:261-268 [Conf ]