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Conferences in DBLP
Biologically-Inspired Massively-Parallel Architectures - Computing Beyond a Million Processors. [Citation Graph (, )][DBLP]
Formal Verification of Lock-Free Algorithms. [Citation Graph (, )][DBLP]
Examining Important Corner Cases: Verification of Interacting Architectural Components in System Designs. [Citation Graph (, )][DBLP]
Teak: A Token-Flow Implementation for the Balsa Language. [Citation Graph (, )][DBLP]
Desynchronizing Synchronous Programs by Modes. [Citation Graph (, )][DBLP]
From Concurrent Multi-clock Programs to Deterministic Asynchronous Implementations. [Citation Graph (, )][DBLP]
Scheduling Synchronous Elastic Designs. [Citation Graph (, )][DBLP]
Saving Space in a Time Efficient Simulation Algorithm. [Citation Graph (, )][DBLP]
Checking pi-Calculus Structural Congruence is Graph Isomorphism Complete. [Citation Graph (, )][DBLP]
Petrifying Operating Guidelines for Services. [Citation Graph (, )][DBLP]
Variants of the Language Based Synthesis Problem for Petri Nets. [Citation Graph (, )][DBLP]
Flat Arbiters. [Citation Graph (, )][DBLP]
Trading Off Concurrency to Generate Behavioral Adapters. [Citation Graph (, )][DBLP]
Why Are Modalities Good for Interface Theories?. [Citation Graph (, )][DBLP]
Model Checking Verilog Descriptions of Cell Libraries. [Citation Graph (, )][DBLP]
Time Arc Petri Nets and Their Analysis. [Citation Graph (, )][DBLP]
Specification Enforcing Refinement for Convertibility Verification. [Citation Graph (, )][DBLP]
Parameterised Process Algebraic Verification by Precongruence Reduction. [Citation Graph (, )][DBLP]
Verifying Deadlock- and Livelock Freedom in an SOA Scenario. [Citation Graph (, )][DBLP]
Genet: A Tool for the Synthesis and Mining of Petri Nets. [Citation Graph (, )][DBLP]
DESIJ--Enabling Decomposition-Based Synthesis of Complex Asynchronous Controllers. [Citation Graph (, )][DBLP]
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