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Conferences in DBLP

International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) (asplos)
2010 (conf/asplos/2010)


  1. Technology for developing regions: Moore's law is not enough. [Citation Graph (, )][DBLP]


  2. Dynamically replicated memory: building reliable systems from nanoscale resistive memories. [Citation Graph (, )][DBLP]


  3. A power-efficient all-optical on-chip interconnect using wavelength-based oblivious routing. [Citation Graph (, )][DBLP]


  4. A real system evaluation of hardware atomicity for software speculation. [Citation Graph (, )][DBLP]


  5. Dynamic filtering: multi-purpose architecture support for language runtime systems. [Citation Graph (, )][DBLP]


  6. CoreDet: a compiler and runtime system for deterministic multithreaded execution. [Citation Graph (, )][DBLP]


  7. Speculative parallelization using software multi-threaded transactions. [Citation Graph (, )][DBLP]


  8. Respec: efficient online multiprocessor replayvia speculation and external determinism. [Citation Graph (, )][DBLP]


  9. Probabilistic job symbiosis modeling for SMT processor scheduling. [Citation Graph (, )][DBLP]


  10. Request behavior variations. [Citation Graph (, )][DBLP]


  11. Decoupling contention management from scheduling. [Citation Graph (, )][DBLP]


  12. Addressing shared resource contention in multicore processors via scheduling. [Citation Graph (, )][DBLP]


  13. SherLog: error diagnosis by connecting clues from run-time logs. [Citation Graph (, )][DBLP]


  14. Analyzing multicore dumps to facilitate concurrency bug reproduction. [Citation Graph (, )][DBLP]


  15. A randomized scheduler with probabilistic guarantees of finding bugs. [Citation Graph (, )][DBLP]


  16. ConMem: detecting severe concurrency bugs through an effect-oriented approach. [Citation Graph (, )][DBLP]


  17. Characterizing processor thermal behavior. [Citation Graph (, )][DBLP]


  18. Conservation cores: reducing the energy of mature computations. [Citation Graph (, )][DBLP]


  19. Micro-pages: increasing DRAM efficiency with locality-aware data placement. [Citation Graph (, )][DBLP]


  20. Power routing: dynamic power provisioning in the data center. [Citation Graph (, )][DBLP]


  21. Joint optimization of idle and cooling power in data centers while maintaining response time. [Citation Graph (, )][DBLP]


  22. Butterfly analysis: adapting dataflow analysis to dynamic parallel monitoring. [Citation Graph (, )][DBLP]


  23. ParaLog: enabling and accelerating online parallel monitoring of multithreaded applications. [Citation Graph (, )][DBLP]


  24. MacroSS: macro-SIMDization of streaming applications. [Citation Graph (, )][DBLP]


  25. COMPASS: a programmable data prefetcher using idle GPU shaders. [Citation Graph (, )][DBLP]


  26. Flexible architectural support for fine-grain scheduling. [Citation Graph (, )][DBLP]


  27. Specifying and dynamically verifying address translation-aware memory consistency. [Citation Graph (, )][DBLP]


  28. Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems. [Citation Graph (, )][DBLP]


  29. An asymmetric distributed shared memory model for heterogeneous parallel systems. [Citation Graph (, )][DBLP]


  30. Inter-core cooperative TLB for chip multiprocessors. [Citation Graph (, )][DBLP]


  31. Orthrus: efficient software integrity protection on multi-cores. [Citation Graph (, )][DBLP]


  32. Shoestring: probabilistic soft error reliability on the cheap. [Citation Graph (, )][DBLP]


  33. Virtualized and flexible ECC for main memory. [Citation Graph (, )][DBLP]

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System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
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