Conferences in DBLP

Cryptographic Hardware and Embedded Systems (CHES) (ches)
2009 (conf/ches/2009)

1. 
   Faster and Timing-Attack Resistant AES-GCM. [Citation Graph (, )][DBLP]
   
   
2. 
   Accelerating AES with Vector Permute Instructions. [Citation Graph (, )][DBLP]
   
   
3. 
   SSE Implementation of Multivariate PKCs on Modern x86 CPUs. [Citation Graph (, )][DBLP]
   
   
4. 
   MicroEliece: McEliece for Embedded Devices. [Citation Graph (, )][DBLP]
   
   
5. 
   Physical Unclonable Functions and Secure Processors. [Citation Graph (, )][DBLP]
   
   
6. 
   Practical Electromagnetic Template Attack on HMAC. [Citation Graph (, )][DBLP]
   
   
7. 
   First-Order Side-Channel Attacks on the Permutation Tables Countermeasure. [Citation Graph (, )][DBLP]
   
   
8. 
   Algebraic Side-Channel Attacks on the AES: Why Time also Matters in DPA. [Citation Graph (, )][DBLP]
   
   
9. 
   Differential Cluster Analysis. [Citation Graph (, )][DBLP]
   
   
10. 
    Known-Plaintext-Only Attack on RSA-CRT with Montgomery Multiplication. [Citation Graph (, )][DBLP]
    
    
11. 
    A New Side-Channel Attack on RSA Prime Generation. [Citation Graph (, )][DBLP]
    
    
12. 
    An Efficient Method for Random Delay Generation in Embedded Software. [Citation Graph (, )][DBLP]
    
    
13. 
    Higher-Order Masking and Shuffling for Software Implementations of Block Ciphers. [Citation Graph (, )][DBLP]
    
    
14. 
    A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques. [Citation Graph (, )][DBLP]
    
    
15. 
    A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions. [Citation Graph (, )][DBLP]
    
    
16. 
    Crypto Engineering: Some History and Some Case Studies. [Citation Graph (, )][DBLP]
    
    
17. 
    Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers. [Citation Graph (, )][DBLP]
    
    
18. 
    Faster -Arithmetic for Cryptographic Pairings on Barreto-Naehrig Curves. [Citation Graph (, )][DBLP]
    
    
19. 
    Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves. [Citation Graph (, )][DBLP]
    
    
20. 
    KATAN and KTANTAN - A Family of Small and Efficient Hardware-Oriented Block Ciphers. [Citation Graph (, )][DBLP]
    
    
21. 
    Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security. [Citation Graph (, )][DBLP]
    
    
22. 
    Elliptic Curve Scalar Multiplication Combining Yao's Algorithm and Double Bases. [Citation Graph (, )][DBLP]
    
    
23. 
    The Frequency Injection Attack on Ring-Oscillator-Based True Random Number Generators. [Citation Graph (, )][DBLP]
    
    
24. 
    Low-Overhead Implementation of a Soft Decision Helper Data Algorithm for SRAM PUFs. [Citation Graph (, )][DBLP]
    
    
25. 
    CDs Have Fingerprints Too. [Citation Graph (, )][DBLP]
    
    
26. 
    The State-of-the-Art in IC Reverse Engineering. [Citation Graph (, )][DBLP]
    
    
27. 
    Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering. [Citation Graph (, )][DBLP]
    
    
28. 
    MERO: A Statistical Approach for Hardware Trojan Detection. [Citation Graph (, )][DBLP]
    
    
29. 
    On Tamper-Resistance from a Theoretical Viewpoint. [Citation Graph (, )][DBLP]
    
    
30. 
    Mutual Information Analysis: How, When and Why?. [Citation Graph (, )][DBLP]
    
    
31. 
    Fault Attacks on RSA Signatures with Partially Unknown Messages. [Citation Graph (, )][DBLP]
    
    
32. 
    Differential Fault Analysis on DES Middle Rounds. [Citation Graph (, )][DBLP]