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Conferences in DBLP

International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES) (cases)
2001 (conf/cases/2001)

  1. Alberto L. Sangiovanni-Vincentelli, Grant Martin
    A vision for embedded software. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:1-7 [Conf]
  2. Harry Dwyer, John Fernando
    Establishing a tight bound on task interference in embedded system instruction caches. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:8-14 [Conf]
  3. Jan Sjödin, Carl von Platen
    Storage allocation for embedded processors. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:15-23 [Conf]
  4. Timothy Sherwood, Brad Calder
    Patchable instruction ROM architecture. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:24-33 [Conf]
  5. Oren Avissar, Rajeev Barua, Dave Stewart
    Heterogeneous memory management for embedded systems. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:34-43 [Conf]
  6. Sadagopan Srinivasan, Vinodh Cuppu, Bruce L. Jacob
    Transparent data-memory organizations for digital signal processors. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:44-48 [Conf]
  7. K. Schneider, M. Wenz
    A new method for compiling schizophrenic synchronous programs. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:49-58 [Conf]
  8. Björn Franke, Michael F. P. O'Boyle
    An empirical evaluation of high level transformations for embedded processors. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:59-66 [Conf]
  9. Zhong Wang, Edwin Hsing-Mean Sha, Xiaobo Hu
    Combined partitioning and data padding for scheduling multiple loop nests. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:67-75 [Conf]
  10. Olaf Lüthje, Martin Coors, Holger Keding
    A novel approach to code analysis of digital signal processing systems. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:76-83 [Conf]
  11. Sungjoon Jung, Yunheung Paek
    The very portable optimizer for digital signal processors. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:84-92 [Conf]
  12. Alberto La Rosa, Luciano Lavagno, Claudio Passerone
    A software development tool chain for a reconfigurable processor. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:93-98 [Conf]
  13. Michael Ward, Neil C. Audsley
    Hardware compilation of sequential Ada. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:99-107 [Conf]
  14. Dirk Fischer, Jürgen Teich, Ralph Weper, Uwe Kastens, Michael Thies
    Design space characterization for architecture/compiler co-exploration. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:108-115 [Conf]
  15. Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm
    A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:116-125 [Conf]
  16. Adam Johnson, Kenneth Mackenzie
    Pattern matching in reconfigurable logic for packet classification. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:126-130 [Conf]
  17. Friedhelm Stappert, Andreas Ermedahl, Jakob Engblom
    Efficient longest executable path search for programs with complex flows and pipeline effects. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:132-140 [Conf]
  18. Marcio Buss, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo
    Tailoring pipeline bypassing and functional unit mapping to application in clustered VLIW architectures. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:141-148 [Conf]
  19. Bilge Saglam Akgul, Jaehwan Lee, Vincent John Mooney III
    A system-on-a-chip lock cache with task preemption support. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:149-157 [Conf]
  20. Shail Aditya, Michael S. Schlansker
    ShiftQ: a bufferred interconnect for custom loop accelerators. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:158-167 [Conf]
  21. Heidi Pan, Krste Asanovic
    Heads and tails: a variable-length instruction format supporting parallel fetch and decode. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:168-175 [Conf]
  22. Lakshmi N. Chakrapani, Pinar Korkmaz, Vincent John Mooney III, Krishna V. Palem, Kiran Puttaswamy, Weng-Fai Wong
    The emerging power crisis in embedded processors: what can a poor compiler do? [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:176-180 [Conf]
  23. Chris Weaver, Rajeev Krishna, Lisa Wu, Todd M. Austin
    Application specific architectures: a recipe for fast, flexible and power efficient designs. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:181-185 [Conf]
  24. Sungmee Park, Sundaresan Jayaraman
    Textiles and computing: background and opportunities for convergence. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:186-187 [Conf]
  25. Kenneth Mackenzie, Eric Hudson, Drew Maule, Sundaresan Jayaraman, Sungmee Park
    A prototype network embedded in textile fabric. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:188-194 [Conf]
  26. Anil Seth, Ravindra B. Keskar, R. Venugopal
    Algorithms for energy optimization using processor instructions. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:195-202 [Conf]
  27. Kathleen Baynes, Chris Collins, Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit, Tiebing Zhang, Bruce L. Jacob
    The performance and energy consumption of three embedded real-time operating systems. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:203-210 [Conf]
  28. Stefanos Kaxiras, Girija J. Narlikar, Alan D. Berenbaum, Zhigang Hu
    Comparing power consumption of an SMT and a CMP DSP for mobile phone workloads. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:211-220 [Conf]
  29. Yann-Hang Lee, Yoonmee Doh, C. Mani Krishna
    EDF scheduling using two-mode voltage-clock-scaling for hard real-time systems. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:221-228 [Conf]
  30. Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Energy-efficient instruction cache using page-based placement. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:229-237 [Conf]
  31. Zhiyuan Li, Cheng Wang, Rong Xu
    Computation offloading to save energy on handheld devices: a partition scheme. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:238-246 [Conf]
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