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Conferences in DBLP

International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES) (cases)
2006 (conf/cases/2006)

  1. Liang-Gee Chen
    Dances with multimedia: embedded video codec design. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:1- [Conf]
  2. Hiroshi Nakashima, Masahiro Konishi, Takashi Nakada
    An accurate and efficient simulation-based analysis for worst case interruption delay. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:2-12 [Conf]
  3. Won So, Alexander G. Dean
    Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:13-23 [Conf]
  4. John Cavazos, Christophe Dubach, Felix V. Agakov, Edwin V. Bonilla, Michael F. P. O'Boyle, Grigori Fursin, Olivier Temam
    Automatic performance model construction for the fast software exploration of new hardware designs. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:24-34 [Conf]
  5. Dong-Heon Jung, Sung-Hwan Bae, Jaemok Lee, Soo-Mook Moon, Jong Kuk Park
    Supporting precise garbage collection in Java Bytecode-to-C ahead-of-time compiler for embedded systems. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:35-42 [Conf]
  6. Stephen Hines, David B. Whalley, Gary S. Tyson
    Adapting compilation techniques to enhance the packing of instructions into registers. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:43-53 [Conf]
  7. Ankush Varma, Muhammad Yaqub Afridi, Akin Akturk, Paul Klein, Allen R. Hefner, Bruce L. Jacob
    Modeling heterogeneous SoCs with SystemC: a digital/MEMS case study. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:54-64 [Conf]
  8. Hans Peter Löb, Rainer Buchty, Wolfgang Karl
    A network agent for diagnosis and analysis of real-time Ethernet networks. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:65-73 [Conf]
  9. Rachid Seghir, Vincent Loechner
    Memory optimization by counting points in integer transformations of parametric polytopes. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:74-82 [Conf]
  10. Ka-Ming Keung, Akhilesh Tyagi
    State space reconfigurability: an implementation architecture for self modifying finite automata. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:83-92 [Conf]
  11. Arran Derbyshire, Tobias Becker, Wayne Luk
    Incremental elaboration for run-time reconfigurable hardware designs. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:93-102 [Conf]
  12. Taeho Kgil, Trevor N. Mudge
    FlashCache: a NAND flash memory file cache for low power web servers. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:103-112 [Conf]
  13. Mats Brorsson, Mikael Collin
    Adaptive and flexible dictionary code compression for embedded applications. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:113-124 [Conf]
  14. Lan S. Bai, Lei Yang, Robert P. Dick
    Automated compile-time and run-time techniques to increase usable memory in MMU-less embedded systems. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:125-135 [Conf]
  15. Hyunchul Park, Kevin Fan, Manjunath Kudlur, Scott A. Mahlke
    Modulo graph embedding: mapping applications onto coarse-grained reconfigurable architectures. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:136-146 [Conf]
  16. Nathan Clark, Amir Hormati, Scott A. Mahlke, Sami Yehia
    Scalable subgraph mapping for acyclic computation accelerators. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:147-157 [Conf]
  17. J. George, B. Marr, Bilge E. S. Akgul, Krishna V. Palem
    Probabilistic arithmetic and energy efficient embedded signal processing. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:158-168 [Conf]
  18. Chengmo Yang, Alex Orailoglu
    Power efficient branch prediction through early identification of branch addresses. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:169-178 [Conf]
  19. Dong Hyuk Woo, Mrinmoy Ghosh, Emre Özer, Stuart Biles, Hsien-Hsin S. Lee
    Reducing energy of virtual cache synonym lookup using bloom filters. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:179-189 [Conf]
  20. Lukasz Strozek, David Brooks
    Efficient architectures through application clustering and architectural heterogeneity. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:190-200 [Conf]
  21. Bernhard Scholz, Bernd Burgstaller, Jingling Xue
    Minimizing bank selection instructions for partitioned memory architecture. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:201-211 [Conf]
  22. Yoonseo Choi, Hwansoo Han
    Protected heap sharing for memory-constrained java environments. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:212-222 [Conf]
  23. Bernhard Egger, Chihun Kim, Choonki Jang, Yoonsung Nam, Jaejin Lee, Sang Lyul Min
    A dynamic code placement technique for scratchpad memory using postpass optimization. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:223-233 [Conf]
  24. Seon-Yeong Park, Dawoon Jung, Jeong-Uk Kang, Jinsoo Kim, Joonwon Lee
    CFLRU: a replacement algorithm for flash memory. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:234-241 [Conf]
  25. Paolo Bonzini, Laura Pozzi
    Code transformation strategies for extensible embedded processors. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:242-252 [Conf]
  26. Neil C. Audsley, Michael Ward
    Syntax-driven implementation of software programming language control constructs and expressions on FPGAs. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:253-260 [Conf]
  27. Kim M. Hazelwood, Artur Klauser
    A dynamic binary instrumentation engine for the ARM architecture. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:261-270 [Conf]
  28. Manuel Carro, José F. Morales, Henk L. Muller, Germán Puebla, Manuel V. Hermenegildo
    High-level languages for small devices: a case study. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:271-281 [Conf]
  29. John Gilbert, David M. Abrahamson
    Adaptive object code compression. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:282-292 [Conf]
  30. Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis
    Limitations of special-purpose instructions for similarity measurements in media SIMD extensions. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:293-303 [Conf]
  31. Chinnakrishnan Ballapuram, Kiran Puttaswamy, Gabriel H. Loh, Hsien-Hsin S. Lee
    Entropy-based low power data TLB design. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:304-311 [Conf]
  32. Charles Hardnett, Krishna V. Palem, Yogesh Chobe
    Compiler optimization of embedded applications for an adaptive SoC architecture. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:312-322 [Conf]
  33. Greg Hoover, Forrest Brewer, Timothy Sherwood
    Extensible control architectures. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:323-333 [Conf]
  34. Duo Liu, Bei Hua, Xianghui Hu, Xinan Tang
    High-performance packet classification algorithm for many-core and multithreaded network processor. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:334-344 [Conf]
  35. Anahita Shayesteh, Glenn Reinman, Norman P. Jouppi, Timothy Sherwood, Suleyman Sair
    Improving the performance and power efficiency of shared helpers in CMPs. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:345-356 [Conf]
  36. Greg Hoover, Forrest Brewer, Timothy Sherwood
    A case study of multi-threading in the embedded space. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:357-367 [Conf]
  37. Mark Hempstead, Gu-Yeon Wei, David Brooks
    Architecture and circuit techniques for low-throughput, energy-constrained systems across technology generations. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:368-378 [Conf]
  38. Razvan Racu, Arne Hamann, Rolf Ernst, Bren Mochocki, Xiaobo Sharon Hu
    Methods for power optimization in distributed embedded systems with real-time requirements. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:379-388 [Conf]
  39. Noel Eisley, Vassos Soteriou, Li-Shiuan Peh
    High-level power analysis for multi-core chips. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:389-400 [Conf]
  40. Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitra
    Integrated scratchpad memory optimization and task scheduling for MPSoC architectures. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:401-410 [Conf]
  41. Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, Nikil Dutt, Nalini Venkatasubramanian
    Mitigating soft error failures for multimedia applications by selective data protection. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:411-420 [Conf]
  42. Jason A. Blome, Shantanu Gupta, Shuguang Feng, Scott A. Mahlke
    Cost-efficient soft error protection for embedded microprocessors. [Citation Graph (0, 0)][DBLP]
    CASES, 2006, pp:421-431 [Conf]
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