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Conferences in DBLP

IEEE International Symposium on Multiple-Valued Logic (ISMVL) (ismvl)
2010 (conf/ismvl/2010)


  1. Spectral Techniques: The First Decade of the XXI Century (Invited Paper). [Citation Graph (, )][DBLP]


  2. Minimal Unsatisfiability: Models, Algorithms and Applications (Invited Paper). [Citation Graph (, )][DBLP]


  3. MDGs Reduction Technique Based on the HOL Theorem Prover. [Citation Graph (, )][DBLP]


  4. The Automorphism Group of Finite Godel Algebras. [Citation Graph (, )][DBLP]


  5. Schauder Hats for the Two-Variable Fragment of BL. [Citation Graph (, )][DBLP]


  6. Learning of the Non-threshold Functions of Multiple-Valued Logic by a Single Multi-valued Neuron with a Periodic Activation Function. [Citation Graph (, )][DBLP]


  7. Synthesis of Reversible Circuits with No Ancilla Bits for Large Reversible Functions Specified with Bit Equations. [Citation Graph (, )][DBLP]


  8. New Insights into Encodings from MaxCSP into Partial MaxSAT. [Citation Graph (, )][DBLP]


  9. Non-deterministic Multi-valued Logics--A Tutorial. [Citation Graph (, )][DBLP]


  10. Logics of Reasonable Information Sources. [Citation Graph (, )][DBLP]


  11. Design of Tamper-Resistant Registers for Multiple-Valued Cryptographic Processors. [Citation Graph (, )][DBLP]


  12. On a Graded Notion of t-Norm and Dominance. [Citation Graph (, )][DBLP]


  13. Low Voltage Semi Floating-Gate Binary to Multiple-Value and Multiple-Value to Binary Converters. [Citation Graph (, )][DBLP]


  14. Infinite-Valued Lukasiewicz Logic Based on Principal Lattice Filters. [Citation Graph (, )][DBLP]


  15. Completions in Subvarieties of BL-Algebras. [Citation Graph (, )][DBLP]


  16. Two Many Values: An Algorithmic Outlook on Suszko's Thesis. [Citation Graph (, )][DBLP]


  17. Truth-Functionality, Rough Sets and Three-Valued Logics. [Citation Graph (, )][DBLP]


  18. Co-stone Residuated Lattices. [Citation Graph (, )][DBLP]


  19. The Euler Characteristic of a Formula in Godel Logic. [Citation Graph (, )][DBLP]


  20. The Arity Gap of Polynomial Functions over Bounded Distributive Lattices. [Citation Graph (, )][DBLP]


  21. Classes of Operations Closed under Permutation, Cylindrification and Composition. [Citation Graph (, )][DBLP]


  22. Finitely Generated Maximal Partial Clones and Their Intersections. [Citation Graph (, )][DBLP]


  23. Quaternary Voltage-Mode Logic Cells and Fixed-Point Multiplication Circuits. [Citation Graph (, )][DBLP]


  24. Revisiting Ultraproducts in Fuzzy Predicate Logics. [Citation Graph (, )][DBLP]


  25. Generating the Variety of SMV-Algebras. [Citation Graph (, )][DBLP]


  26. Finding Attractors in Synchronous Multiple-Valued Networks Using SAT-Based Bounded Model Checking. [Citation Graph (, )][DBLP]


  27. An Evolutionary Algorithm for Optimization of Pseudo Kronecker Expressions. [Citation Graph (, )][DBLP]


  28. Efficient Simulation-Based Debugging of Reversible Logic. [Citation Graph (, )][DBLP]


  29. Representing Fuzzy Structures in Quantum Computation with Mixed States. [Citation Graph (, )][DBLP]


  30. Switching Activity in Stochastic Decoders. [Citation Graph (, )][DBLP]


  31. Toffoli Gate Implementation Using the Billiard Ball Model. [Citation Graph (, )][DBLP]


  32. Low-Power Multiple-Valued Reconfigurable VLSI Based on Superposition of Bit-Serial Data and Current-Source Control Signals. [Citation Graph (, )][DBLP]


  33. Note on Construction of Probabilities on Many-Valued Events via Schauder Bases and Inverse Limits. [Citation Graph (, )][DBLP]


  34. A Classification of Partial Boolean Clones. [Citation Graph (, )][DBLP]


  35. Endoprimal Monoids and Witness Lemma in Clone Theory. [Citation Graph (, )][DBLP]


  36. Galois Connection for Hyperclones. [Citation Graph (, )][DBLP]


  37. Interpolation Properties for Uninorm Based Logics. [Citation Graph (, )][DBLP]


  38. One-Color Two-Phase Asynchronous Communication Links Based on Multiple-Valued Simultaneous Control. [Citation Graph (, )][DBLP]


  39. Reducing Reversible Circuit Cost by Adding Lines. [Citation Graph (, )][DBLP]


  40. Floating-Point Numeric Function Generators Based on Piecewise-Split EVMDDs. [Citation Graph (, )][DBLP]


  41. A Comparison of Architectures for Various Decision Diagram Machines. [Citation Graph (, )][DBLP]


  42. Low-Energy Pipelined Multiple-Valued Current-Mode Circuit with 8-Level Static Current-Source Control. [Citation Graph (, )][DBLP]


  43. Reconstruction of Additive Generators from Partial Derivatives of Continuous Archimedean t-Norms. [Citation Graph (, )][DBLP]


  44. Synthesis of Small Reversible and Pseudo-Reversible Circuits Using Y-Gates and Inverse Y-Gates. [Citation Graph (, )][DBLP]


  45. A Graded Inference Approach Based on Infinite-Valued Lukasiewicz Semantics. [Citation Graph (, )][DBLP]


  46. Multiple-Valued Logic Interpretations of Analogical, Reverse Analogical, and Paralogical Proportions. [Citation Graph (, )][DBLP]


  47. Secure Design Flow for Asynchronous Multi-valued Logic Circuits. [Citation Graph (, )][DBLP]


  48. Mapping Binary Functions to a Practical Adiabatic Quantum Computer. [Citation Graph (, )][DBLP]


  49. ESOP-Based Toffoli Network Generation with Transformations. [Citation Graph (, )][DBLP]


  50. On the Number of Products to Represent Interval Functions by SOPs with Four-Valued Variables. [Citation Graph (, )][DBLP]


  51. Number of Maximal Partial Clones. [Citation Graph (, )][DBLP]


  52. Information-Theoretical Mining of Determining Sets for Partially Defined Functions. [Citation Graph (, )][DBLP]


  53. Queries with Multivalued Logic-Based Semantics for Imperfect Information Fusion. [Citation Graph (, )][DBLP]


  54. Heterogeneous Decision Diagrams for Applications in Harmonic Analysis on Finite Non-Abelian Groups. [Citation Graph (, )][DBLP]


  55. Remarks on Applicability of Spectral Representations on Finite Non-Abelian Groups in the Design for Regularity. [Citation Graph (, )][DBLP]


  56. An Ontology Mediated Multimedia Information Retrieval System. [Citation Graph (, )][DBLP]


  57. A Low-Power Successive Approximation Analog-to-Digital Converter Based on 2-Bit/Step Comparison. [Citation Graph (, )][DBLP]


  58. A Ternary Partial-Response Signaling Scheme for Capacitively Coupled Interface. [Citation Graph (, )][DBLP]

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