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Conferences in DBLP

Computer Aided Verification (CAV) (cav)
1994 (conf/cav/1994)

  1. Rajeev Alur, Limor Fix, Thomas A. Henzinger
    A Determinizable Class of Timed Automata. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:1-13 [Conf]
  2. Roberto Gorrieri, Glauco Siliprandi
    Real-Time System Verification using P/T Nets. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:14-26 [Conf]
  3. William K. C. Lam, Robert K. Brayton
    Criteria for the Simple Path Property in Timed Automata. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:27-40 [Conf]
  4. Kenneth L. McMillan
    Hierarchical Representations of Discrete Functions, with Application to Model Checking. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:41-54 [Conf]
  5. Bernard Boigelot, Pierre Wolper
    Symbolic Verification with Periodic Sets. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:55-67 [Conf]
  6. Jerry R. Burch, David L. Dill
    Automatic verification of Pipelined Microprocessor Control. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:68-80 [Conf]
  7. Alfredo Olivero, Joseph Sifakis, Sergio Yovine
    Using Abstractions for the Verification of Linear Hybrid Systems. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:81-94 [Conf]
  8. Anuj Puri, Pravin Varaiya
    Decidability of Hybrid Systems with Rectangular Differential Inclusion. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:95-104 [Conf]
  9. Jennifer McManis, Pravin Varaiya
    Suspension Automata: A Decidable Class of Hybrid Automata. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:105-117 [Conf]
  10. Ahmed Bouajjani, Rachid Echahed, Riadh Robbana
    Verification of Context-Free Timed Systems Using Linear Hybrid Observers. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:118-131 [Conf]
  11. Milena Mihail, Christos H. Papadimitriou
    On the Random Walk Method for Protocol Testing. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:132-141 [Conf]
  12. Orna Bernholtz, Moshe Y. Vardi, Pierre Wolper
    An Automata-Theoretic Approach to Branching-Time Model Checking (Extended Abstract). [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:142-155 [Conf]
  13. Anuchit Anuchitanukul, Zohar Manna
    Realizability and Synthesis of Reactive Modules. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:156-168 [Conf]
  14. Hardi Hungar
    Model Checking of macro Processes. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:169-181 [Conf]
  15. Ilan Beer, Shoham Ben-David, Daniel Geist, Raanan Gewirtzman, Michael Yoeli
    Methodology and System for Practical Formal Verification of Reactive Hardware. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:182-193 [Conf]
  16. Vivek G. Naik, A. Prasad Sistla
    Modeling and Verification of a Real Life Protocol Using Symbolic Model Checking. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:194-206 [Conf]
  17. Susanne Graf
    Verification of a Distributed Cache Memory by Using Abstractions. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:207-219 [Conf]
  18. Zohar Manna
    Beyond Model Checking. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:220-221 [Conf]
  19. Robert P. Kurshan
    Models Whose Checks Don't Explode. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:222-233 [Conf]
  20. Felice Balarin, Alberto L. Sangiovanni-Vincentelli
    On the Automatic Computation of Network Invariants. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:234-246 [Conf]
  21. David Cyrluk, Paliath Narendran
    Ground Temporal Logic: A Logic for Hardware Verification. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:247-259 [Conf]
  22. E. Thomas Schubert
    A Hybrid Model for Reasoning about Composed Hardware Systems. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:260-272 [Conf]
  23. Scott Hazelhurst, Carl-Johan H. Seger
    Composing Symbolic Trajectory Evaluation Results. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:273-285 [Conf]
  24. Zheng Zhu, Carl-Johan H. Seger
    The Completeness of a Hardware Inference System. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:286-298 [Conf]
  25. Daniel Geist, Ilan Beer
    Efficient Model Checking by Automated Ordering of Transition Relation Partitions. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:299-310 [Conf]
  26. Vigyan Singhal, Carl Pixley
    The Verifiacation Problem for Safe Replaceability. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:311-323 [Conf]
  27. Adnan Aziz, Thomas R. Shiple, Vigyan Singhal
    Formula-Dependent Equivalence for Compositional CTL Model Checking. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:324-337 [Conf]
  28. David E. Long, Anca Browne, Edmund M. Clarke, Somesh Jha, Wilfredo R. Marrero
    An Improved Algorithm for the Evaluation of Fixpoint Expressions. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:338-350 [Conf]
  29. Oleg Sokolsky, Scott A. Smolka
    Incremental Model Checking in the Modal Mu-Calculus. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:351-363 [Conf]
  30. Bernard Cousin, Jean-Michel Hélary
    Performance Improvement of State Space Exploration by Regular & Diffrential Hashing Functions. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:364-376 [Conf]
  31. Doron Peled
    Combining Partial Order Reductions with On-the-fly Model-Checking. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:377-390 [Conf]
  32. Ramin Hojati, Robert B. Mueller-Thuns, Robert K. Brayton
    Improving Language Containment Using Fairness Graphs. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:391-403 [Conf]
  33. Insup Lee, Sanguthevar Rajasekaran
    A Parallel Algorithm for Relational Coarsest Partition Problems and Its Implementation. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:404-414 [Conf]
  34. Edmund M. Clarke, Orna Grumberg, Kiyoharu Hamaguchi
    Another Look at LTL Model Checking. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:415-427 [Conf]
  35. Björn Victor, Faron Moller
    The Mobility Workbench - A Tool for the pi-Calculus. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:428-440 [Conf]
  36. Robert de Simone, Annie Ressouche
    Compositional Semantics of ESTEREL and Verification by Compositional Reductions. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:441-454 [Conf]
  37. Dennis Dams, Rob Gerth, Gert Döhmen, Ronald Herrmann, Peter Kelb, Hergen Pargmann
    Model Checking Using Adaptive State and Data Abstraction. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:455-467 [Conf]
  38. Tomas Rokicki, Chris J. Myers
    Automatic Verification of Timed Circuits. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:468-480 [Conf]
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