Conferences in DBLP
Leslie Lamport Computer-Hindered Verification (Humans Can Do It Too). [Citation Graph (0, 0)][DBLP ] Conf ] Hana De-Leon , Orna Grumberg Modular Abstractions for Verifying Real-Time Distributed Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Mannes Poel , Job Zwiers Layering Techniques for Development of Parallel Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Kim Guldstrand Larsen Efficient Local Correctness Checking. [Citation Graph (0, 0)][DBLP ] Conf ] Urban Engberg , Peter Grønning , Leslie Lamport Mechanical Verification of Concurrent Systems with TLA. [Citation Graph (0, 0)][DBLP ] Conf ] Joakim von Wright , Thomas Långbacka Using a Theorem Prover for Reasoning about Concurrent Algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Mark Aagaard , Miriam Leeser Verifying a Logic Synthesis Tool in Nuprl: A Case Study in Software Verification. [Citation Graph (0, 0)][DBLP ] Conf ] Alan J. Hu , David L. Dill , Andreas J. Drexler , C. Han Yang Higher-Level Specification and Verification with BDDs. [Citation Graph (0, 0)][DBLP ] Conf ] Amar Bouali , Robert de Simone Symbolic Bisimulation Minimisation. [Citation Graph (0, 0)][DBLP ] Conf ] Prabhat Jain , Prabhakar Kudva , Ganesh Gopalakrishnan Towards a Verification Technique for Large Synchronous Circuits. [Citation Graph (0, 0)][DBLP ] Conf ] David K. Probst , Hon F. Li Verifying Timed Behavior Automata with Nonbinary Delay Constraints. [Citation Graph (0, 0)][DBLP ] Conf ] Rajeev Alur , Alon Itai , Robert P. Kurshan , Mihalis Yannakakis Timing Verification by Successive Approximation. [Citation Graph (0, 0)][DBLP ] Conf ] Felice Balarin , Alberto L. Sangiovanni-Vincentelli A Verification Strategy for Timing-Constrained Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Kenneth L. McMillan Using Unfoldings to Avoid the State Explosion Problem in the Verification of Asynchronous Circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Patrice Godefroid , Gerard J. Holzmann , Didier Pirottin State-Space Caching Revisited. [Citation Graph (0, 0)][DBLP ] Conf ] Siegfried Fischer , Andreas Scholz , Dirk Taubner Verification in Process Algebra of the Distributed Control of Track Vehicles - A Case Study. [Citation Graph (0, 0)][DBLP ] Conf ] Kiyoharu Hamaguchi , Hiromi Hiraishi , Shuzo Yajima Design Verification of a Microprocessor Using Branching Time Regular Temporal Logic. [Citation Graph (0, 0)][DBLP ] Conf ] Glenn Bruns A Case Study in Safety-Critical Design. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas R. Shiple , Massimiliano Chiodo , Alberto L. Sangiovanni-Vincentelli , Robert K. Brayton Automatic Reduction in CTL Compositional Model Checking. [Citation Graph (0, 0)][DBLP ] Conf ] Roope Kaivola Compositional Model Checking for Linear-Time Temporal Logic. [Citation Graph (0, 0)][DBLP ] Conf ] Saddek Bensalem , Ahmed Bouajjani , Claire Loiseaux , Joseph Sifakis Property Preserving Simulations. [Citation Graph (0, 0)][DBLP ] Conf ] Costas Courcoubetis , David L. Dill , Magda Chatzaki , Panagiotis Tzounakis Verification with Real-Time COSPAN. [Citation Graph (0, 0)][DBLP ] Conf ] Nathalie Rico , Gregor von Bochmann , Omar Cherkaoui Model-Checking for Real-Time Systems Specified in Lotos. [Citation Graph (0, 0)][DBLP ] Conf ] Karlis Cerans Decidability of Bisimulation Equivalences for Parallel Timer Processes. [Citation Graph (0, 0)][DBLP ] Conf ] Julian C. Bradfield A Proof Assistant for Symbolic Model-Checking. [Citation Graph (0, 0)][DBLP ] Conf ] Angelika Mader Tableau Recycling. [Citation Graph (0, 0)][DBLP ] Conf ] Dominique Méry , Abdelillah Mokkedem Crocos: An Integrated Environment for Interactive Verification of SDL Specifications. [Citation Graph (0, 0)][DBLP ] Conf ] James C. Corbett Verifying General Safety and Liveness Propterties with Integer Programming. [Citation Graph (0, 0)][DBLP ] Conf ] Ufuk Celikkan , Rance Cleaveland Generating Diagnostic Information for Behavioral Preorders. [Citation Graph (0, 0)][DBLP ] Conf ] Masahiro Higuchi , Osamu Shirakawa , Hiroyuki Seki , Mamoru Fujii , Tadao Kasami A Verification Procedure via Invariant for Extended Communicating Finite-State Machines. [Citation Graph (0, 0)][DBLP ] Conf ] Ramin Hojati , Hervé J. Touati , Robert P. Kurshan , Robert K. Brayton Efficient omega -Regular Language Containment. [Citation Graph (0, 0)][DBLP ] Conf ] Rance Cleaveland , Marion Klein , Bernhard Steffen Faster Model Checking for the Modal Mu-Calculus. [Citation Graph (0, 0)][DBLP ] Conf ] 