Conferences in DBLP
Amir Pnueli Keynote Address: Abstraction, Composition, Symmetry, and a Little Deduction: The Remedies to State Explosion. [Citation Graph (0, 0)][DBLP ] Conf ] Catherine Meadows Invited Address: Applying Formal Methods to Cryptographic Protocol Analysis. [Citation Graph (0, 0)][DBLP ] Conf ] João P. Marques Silva , Karem A. Sakallah Invited Tutorial: Boolean Satisfiability Algorithms and Applications in Electronic Design Automation. [Citation Graph (0, 0)][DBLP ] Conf ] Parosh Aziz Abdulla , Bengt Jonsson Invited Tutorial: Verification of Infinite-State and Parameterized Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Jason Baumgartner , Anson Tripp , Adnan Aziz , Vigyan Singhal , Flemming Andersen An Abstraction Algorithm for the Verification of Generalized C-Slow Designs. [Citation Graph (0, 0)][DBLP ] Conf ] Tamir Heyman , Daniel Geist , Orna Grumberg , Assaf Schuster Achieving Scalability in Parallel Reachability Analysis of Very Large Circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Orna Kupferman , Moshe Y. Vardi An Automata-Theoretic Approach to Reasoning about Infinite-State Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Giorgio Delzanno Automatic Verification of Parameterized Cache Coherence Protocols. [Citation Graph (0, 0)][DBLP ] Conf ] Zhe Dang , Oscar H. Ibarra , Tevfik Bultan , Richard A. Kemmerer , Jianwen Su Binary Reachability Analysis of Discrete Pushdown Timed Automata. [Citation Graph (0, 0)][DBLP ] Conf ] Randal E. Bryant , Miroslav N. Velev Boolean Satisfiability with Transitivity Constraints. [Citation Graph (0, 0)][DBLP ] Conf ] Abdelwaheb Ayari , David A. Basin Bounded Model Construction for Monadic Second-Order Logics. [Citation Graph (0, 0)][DBLP ] Conf ] James H. Kukula , Thomas R. Shiple Building Circuits from Relations. [Citation Graph (0, 0)][DBLP ] Conf ] Poul Frederick Williams , Armin Biere , Edmund M. Clarke , Anubhav Gupta Combining Decision Diagrams and SAT Procedures for Efficient Symbolic Model Checking. [Citation Graph (0, 0)][DBLP ] Conf ] Kedar S. Namjoshi , Richard J. Trefler On the Competeness of Compositional Reasoning. [Citation Graph (0, 0)][DBLP ] Conf ] Edmund M. Clarke , Orna Grumberg , Somesh Jha , Yuan Lu , Helmut Veith Counterexample-Guided Abstraction Refinement. [Citation Graph (0, 0)][DBLP ] Conf ] Abdelwaheb Ayari , David A. Basin , Felix Klaedtke Decision Procedures for Inductive Boolean Functions Based on Alternating Automata. [Citation Graph (0, 0)][DBLP ] Conf ] Luca de Alfaro , Thomas A. Henzinger , Freddy Y. C. Mang Detecting Errors Before Reaching Them. [Citation Graph (0, 0)][DBLP ] Conf ] Jens Vöge , Marcin Jurdzinski A Discrete Strategy Improvement Algorithm for Solving Parity Games. [Citation Graph (0, 0)][DBLP ] Conf ] Gerd Behrmann , Thomas Hune , Frits W. Vaandrager Distributing Timed Model Checking - How the Search Order Matters. [Citation Graph (0, 0)][DBLP ] Conf ] Javier Esparza , David Hansel , Peter Rossmanith , Stefan Schwoon Efficient Algorithms for Model Checking Pushdown Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Fabio Somenzi , Roderick Bloem Efficient Büchi Automata from LTL Formulae. [Citation Graph (0, 0)][DBLP ] Conf ] Scott D. Stoller , Leena Unnikrishnan , Yanhong A. Liu Efficient Detection of Global Properties in Distributed Systems Using Partial-Order Methods. [Citation Graph (0, 0)][DBLP ] Conf ] Rajeev Alur , Radu Grosu , Michael McDougall Efficient Reachability Analysis of Hierarchical Reactive Machines. [Citation Graph (0, 0)][DBLP ] Conf ] Miroslav N. Velev Formal Verification of VLIW Microprocessors with Speculative Execution. [Citation Graph (0, 0)][DBLP ] Conf ] Kenneth L. McMillan , Shaz Qadeer , James B. Saxe Induction in Compositional Model Checking. [Citation Graph (0, 0)][DBLP ] Conf ] Amir Pnueli , Elad Shahar Liveness and Acceleration in Parameterized Verification. [Citation Graph (0, 0)][DBLP ] Conf ] Michaël Rusinowitch , Sorin Stratulat , Francis Klay Mechanical Verification of an Ideal Incremental ABR Conformance. [Citation Graph (0, 0)][DBLP ] Conf ] Christel Baier , Boudewijn R. Haverkort , Holger Hermanns , Joost-Pieter Katoen Model Checking Continuous-Time Markov Chains by Transient Analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Franck Cassez , François Laroussinie Model-Checking for Hybrid Systems by Quotienting and Constraints Solving. [Citation Graph (0, 0)][DBLP ] Conf ] Ranan Fraer , Gila Kamhi , Barukh Ziv , Moshe Y. Vardi , Limor Fix Prioritized Traversal: Efficient Reachability Analysis for Verification and Falsification. [Citation Graph (0, 0)][DBLP ] Conf ] Ahmed Bouajjani , Bengt Jonsson , Marcus Nilsson , Tayssir Touili Regular Model Checking. [Citation Graph (0, 0)][DBLP ] Conf ] Aurore Annichini , Eugene Asarin , Ahmed Bouajjani Symbolic Techniques for Parametric Reasoning about Counter and Clock Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Kedar S. Namjoshi , Robert P. Kurshan Syntactic Program Transformations for Automatic Abstraction. [Citation Graph (0, 0)][DBLP ] Conf ] William Chan Temporal-Locig Queries. [Citation Graph (0, 0)][DBLP ] Conf ] Patricia Bouyer , Catherine Dufourd , Emmanuel Fleury , Antoine Petit Are Timed Automata Updatable? [Citation Graph (0, 0)][DBLP ] Conf ] Ofer Strichman Tuning SAT Checkers for Bounded Model Checking. [Citation Graph (0, 0)][DBLP ] Conf ] Parosh Aziz Abdulla , S. Purushothaman Iyer , Aletta Nylén Unfoldings of Unbounded Petri Nets. [Citation Graph (0, 0)][DBLP ] Conf ] John M. Rushby Verification Diagrams Revisited: Disjunctive Invariants for Easy Verification. [Citation Graph (0, 0)][DBLP ] Conf ] Ravi Hosabettu , Ganesh Gopalakrishnan , Mandayam K. Srivas Verifying Advanced Microarchitectures that Support Speculation and Exceptions. [Citation Graph (0, 0)][DBLP ] Conf ] Yael Abarbanel , Ilan Beer , Leonid Gluhovsky , Sharon Keidar , Yaron Wolfsthal FoCs: Automatic Generation of Simulation Checkers from Formal Specifications. [Citation Graph (0, 0)][DBLP ] Conf ] Marius Bozga , Jean-Claude Fernandez , Lucian Ghirvu , Susanne Graf , Jean-Pierre Krimm , Laurent Mounier IF: A Validation Environment for Timed Asynchronous Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Sam Owre , Harald Rueß Integrating WS1S with PVS. [Citation Graph (0, 0)][DBLP ] Conf ] Elsa L. Gunter , Robert P. Kurshan , Doron Peled PET: An Interactive Software Testing Tool. [Citation Graph (0, 0)][DBLP ] Conf ] Christopher Colby , Peter Lee , George C. Necula A Proof-Carrying Code Architecture for Java. [Citation Graph (0, 0)][DBLP ] Conf ] Tom Bienmüller , Werner Damm , Hartmut Wittke The STATEMATE Verification Environment - Making It Real. [Citation Graph (0, 0)][DBLP ] Conf ] Ernie Cohen TAPS: A First-Order Verifier for Cryptographic Protocols. [Citation Graph (0, 0)][DBLP ] Conf ] Tomohiro Yoneda VINAS-P: A Tool for Trace Theoretic Verification of Timed Asynchronous Circuits. [Citation Graph (0, 0)][DBLP ] Conf ] C. R. Ramakrishnan , I. V. Ramakrishnan , Scott A. Smolka , Yifei Dong , Xiaoqun Du , Abhik Roychoudhury , V. N. Venkatakrishnan XMC: A Logic-Programming-Based Verification Toolset. [Citation Graph (0, 0)][DBLP ] Conf ] 