Accurate and Low-Overhead Dynamic Detection and Prediction of Program Phases Using Branch Signatures. [Citation Graph (, )][DBLP]
Aggressive Scheduling and Speculation in Multithreaded Architectures: Is it Worth its Salt? [Citation Graph (, )][DBLP]
An Optimization Mechanism Intended for Two-Level Cache Hierarchy to Improve Energy and Performance Using the NSGAII Algorithm. [Citation Graph (, )][DBLP]
On Simulated Annealing for the Scheduling of Parallel Applications. [Citation Graph (, )][DBLP]
Controlling Processes Reassignment in BSP Applications. [Citation Graph (, )][DBLP]
A High Performance Massively Parallel Approach for Real Time Deformable Body Physics Simulation. [Citation Graph (, )][DBLP]
A Methodology for Developing High Fidelity Communication Models for Large-Scale Applications Targeted on Multicore Systems. [Citation Graph (, )][DBLP]
Selection of the Register File Size and the Resource Allocation Policy on SMT Processors. [Citation Graph (, )][DBLP]
ORBIT: Effective Issue Queue Soft-Error Vulnerability Mitigation on Simultaneous Multithreaded Architectures Using Operand Readiness-Based Instruction Dispatch. [Citation Graph (, )][DBLP]
Processing Neocognitron of Face Recognition on High Performance Environment Based on GPU with CUDA Architecture. [Citation Graph (, )][DBLP]
Parallel Verified Linear System Solver for Uncertain Input Data. [Citation Graph (, )][DBLP]
Applying Virtualization and System Management in a Cluster to Implement an Automated Emulation Testbed for Grid Applications. [Citation Graph (, )][DBLP]
Hiding Communication Delays in Clustered Microarchitectures. [Citation Graph (, )][DBLP]
Software Synthesis for Hard Real-Time Embedded Systems with Energy Constraints. [Citation Graph (, )][DBLP]
A Segmented Bloom Filter Algorithm for Efficient Predictors. [Citation Graph (, )][DBLP]
Measuring Operating System Overhead on CMT Processors. [Citation Graph (, )][DBLP]