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Conferences in DBLP

2008 (conf/ancs/2008)

  1. Implementing an OpenFlow switch on the NetFPGA platform. [Citation Graph (, )][DBLP]

  2. Design of a scalable network programming framework. [Citation Graph (, )][DBLP]

  3. A remotely accessible network processor-based router for network experimentation. [Citation Graph (, )][DBLP]

  4. Compact architecture for high-throughput regular expression matching on FPGA. [Citation Graph (, )][DBLP]

  5. Acceleration of decision tree searching for IP traffic classification. [Citation Graph (, )][DBLP]

  6. Efficient regular expression evaluation: theory to practice. [Citation Graph (, )][DBLP]

  7. A scalable multithreaded L7-filter design for multi-core servers. [Citation Graph (, )][DBLP]

  8. On runtime management in multi-core packet processing systems. [Citation Graph (, )][DBLP]

  9. MultiLayer processing - an execution model for parallel stateful packet processing. [Citation Graph (, )][DBLP]

  10. BRICK: a novel exact active statistics counter architecture. [Citation Graph (, )][DBLP]

  11. Packet prediction for speculative cut-through switching. [Citation Graph (, )][DBLP]

  12. A programmable architecture for scalable and real-time network traffic measurements. [Citation Graph (, )][DBLP]

  13. Adaptive scheduling to maximize NIC throughput in a COTS router. [Citation Graph (, )][DBLP]

  14. Input-queued switches with logarithmic delay: necessary conditions and a reconfigurable scheduling algorithm. [Citation Graph (, )][DBLP]

  15. SimNP: a flexible platform for the simulation of a network processing system. [Citation Graph (, )][DBLP]

  16. Towards effective network algorithms on multi-core network processors. [Citation Graph (, )][DBLP]

  17. Performing time-sensitive network experiments. [Citation Graph (, )][DBLP]

  18. Data path credentials for high-performance capabilities-based networks. [Citation Graph (, )][DBLP]

  19. Low power architecture for high speed packet classification. [Citation Graph (, )][DBLP]

  20. Stateful hardware decompression in networking environment. [Citation Graph (, )][DBLP]

  21. On design of bandwidth scheduling algorithms for multiple data transfers in dedicated networks. [Citation Graph (, )][DBLP]

  22. Software techniques to improve virtualized I/O performance on multi-core systems. [Citation Graph (, )][DBLP]

  23. Design optimization of a highly parallel InfiniBand host channel adapter. [Citation Graph (, )][DBLP]

System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
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for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002