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Conferences in DBLP

(fmics)
2007 (conf/fmics/2007)


  1. Verification of Embedded Software: From Mars to Actions. [Citation Graph (, )][DBLP]


  2. Synchronous Design and Verification of Critical Embedded Systems Using SCADE and Esterel. [Citation Graph (, )][DBLP]


  3. Static Analysis of the Accuracy in Control Systems: Principles and Experiments. [Citation Graph (, )][DBLP]


  4. Application of Static Analyses for State Space Reduction to Microcontroller Assembly Code. [Citation Graph (, )][DBLP]


  5. Checking the TWIN Elevator System by Translating Object-Z to SMV. [Citation Graph (, )][DBLP]


  6. Introducing Time in an Industrial Application of Model-Checking. [Citation Graph (, )][DBLP]


  7. Integration of Formal Analysis into a Model-Based Software Development Process. [Citation Graph (, )][DBLP]


  8. Formal Verification with Isabelle/HOL in Practice: Finding a Bug in the GCC Scheduler. [Citation Graph (, )][DBLP]


  9. Computing Worst-Case Response Times in Real-Time Avionics Applications. [Citation Graph (, )][DBLP]


  10. Machine Checked Formal Proof of a Scheduling Protocol for Smartcard Personalization. [Citation Graph (, )][DBLP]


  11. An Action/State-Based Model-Checking Approach for the Analysis of Communication Protocols for Service-Oriented Applications. [Citation Graph (, )][DBLP]


  12. Model Classifications and Automated Verification. [Citation Graph (, )][DBLP]


  13. An Approach to Formalization and Analysis of Message Passing Libraries. [Citation Graph (, )][DBLP]


  14. Analysis of a Session-Layer Protocol in mCRL2. [Citation Graph (, )][DBLP]


  15. Automatic Certification of Java Source Code in Rewriting Logic. [Citation Graph (, )][DBLP]


  16. Reverse Engineered Formal Models for GUI Testing. [Citation Graph (, )][DBLP]


  17. Automatic Interoperability Test Case Generation Based on Formal Definitions. [Citation Graph (, )][DBLP]

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