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Conferences in DBLP

Cryptographic Hardware and Embedded Systems (CHES) (ches)
2003 (conf/ches/2003)

  1. Frank Stajano
    The Security Challenges of Ubiquitous Computing. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:1- [Conf]
  2. Dakshi Agrawal, Josyula R. Rao, Pankaj Rohatgi
    Multi-channel Attacks. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:2-16 [Conf]
  3. Chris Karlof, David Wagner
    Hidden Markov Model Cryptoanalysis. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:17-34 [Conf]
  4. Siddika Berna Örs, Elisabeth Oswald, Bart Preneel
    Power-Analysis Attacks on an FPGA - First Experimental Results. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:35-50 [Conf]
  5. Willi Geiselmann, Rainer Steinwandt
    Hardware to Solve Sparse Systems of Linear Equations over GF(2). [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:51-61 [Conf]
  6. Yukiyasu Tsunoo, Teruo Saito, Tomoyasu Suzaki, Maki Shigeri, Hiroshi Miyauchi
    Cryptanalysis of DES Implemented on Computers with Cache. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:62-76 [Conf]
  7. Gilles Piret, Jean-Jacques Quisquater
    A Differential Fault Attack Technique against SPN Structures, with Application to the AES and KHAZAD. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:77-88 [Conf]
  8. Jean-Sébastien Coron, Alexei Tchulkine
    A New Algorithm for Switching from Arithmetic to Boolean Masking. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:89-97 [Conf]
  9. Jovan Dj. Golic
    DeKaRT: A New Paradigm for Key-Dependent Reversible Circuits. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:98-112 [Conf]
  10. Ramesh Karri, Grigori Kuznetsov, Michael Gössel
    Parity-Based Concurrent Error Detection of Substitution-Permutation Network Block Ciphers. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:113-124 [Conf]
  11. Kris Tiri, Ingrid Verbauwhede
    Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:125-136 [Conf]
  12. Jacques J. A. Fournier, Simon W. Moore, Huiyun Li, Robert D. Mullins, George S. Taylor
    Security Evaluation of Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:137-151 [Conf]
  13. Michael Epstein, Laszlo Hars, Raymond Krasinski, Martin Rosner, Hao Zheng
    Design and Implementation of a True Random Number Generator Based on Digital Circuit Artifacts. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:152-165 [Conf]
  14. Boaz Barak, Ronen Shaltiel, Eran Tromer
    True Random Number Generators Secure in a Changing Environment. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:166-180 [Conf]
  15. Markus Dichtl
    How to Predict the Output of a Hardware Random Number Generator. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:181-188 [Conf]
  16. Arash Reyhani-Masoleh, M. Anwarul Hasan
    On Low Complexity Bit Parallel Polynomial Basis Multipliers. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:189-202 [Conf]
  17. Jean-François Dhem
    Efficient Modular Reduction Algorithm in IFq[x] and Its Application to "Left to Right" Modular Multiplication in IF2[x] [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:203-213 [Conf]
  18. Benoît Chevallier-Mames, Marc Joye, Pascal Paillier
    Faster Double-Size Modular Multiplication from Euclidean Multipliers. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:214-227 [Conf]
  19. Soonhak Kwon, Chang Hoon Kim, Chun Pyo Hong
    Efficient Exponentiation for a Class of Finite Fields GF(2 n) Determined by Gauss Periods. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:228-242 [Conf]
  20. Marc Joye, Pascal Paillier
    GCD-Free Algorithms for Computing Modular Inverses. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:243-253 [Conf]
  21. Pierre-Alain Fouque, Gwenaëlle Martinet, Guillaume Poupard
    Attacking Unbalanced RSA-CRT Using SPA. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:254-268 [Conf]
  22. Pierre-Alain Fouque, Frédéric Valette
    The Doubling Attack - Why Upwards Is Better than Downwards. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:269-280 [Conf]
  23. Nigel P. Smart
    An Analysis of Goubin's Refined Power Analysis Attack. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:281-290 [Conf]
  24. Julien Cathalo, François Koeune, Jean-Jacques Quisquater
    A New Type of Timing Attack: Application to GPS. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:291-303 [Conf]
  25. Akashi Satoh, Sumio Morioka
    Unified Hardware Architecture for 128-Bit Block Ciphers AES and Camellia. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:304-318 [Conf]
  26. Pawel Chodowiec, Kris Gaj
    Very Compact FPGA Implementation of the AES Algorithm. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:319-333 [Conf]
  27. François-Xavier Standaert, Gaël Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat
    Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:334-350 [Conf]
  28. Jan Pelzl, Thomas J. Wollinger, Jorge Guajardo, Christof Paar
    Hyperelliptic Curve Cryptosystems: Closing the Performance Gap to Elliptic Curves. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:351-365 [Conf]
  29. Roberto Maria Avanzi
    Countermeasures against Differential Power Analysis for Hyperelliptic Curve Cryptosystems. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:366-381 [Conf]
  30. Kouichi Itoh, Tetsuya Izu, Masahiko Takenaka
    A Practical Countermeasure against Address-Bit Differential Power Analysis. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:382-396 [Conf]
  31. Katsuyuki Okeya, Tsuyoshi Takagi
    A More Flexible Countermeasure against Side Channel Attacks Using Window Method. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:397-410 [Conf]
  32. Jolyon Clulow
    On the Security of PKCS#11. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:411-425 [Conf]
  33. Vlastimil Klíma, Ondrej Pokorný, Tomás Rosa
    Attacking RSA-Based Sessions in SSL/TLS. [Citation Graph (0, 0)][DBLP]
    CHES, 2003, pp:426-440 [Conf]
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