|
|
Conferences in DBLP
- Cédric Archambeau, Eric Peeters, François-Xavier Standaert, Jean-Jacques Quisquater
Template Attacks in Principal Subspaces. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:1-14 [Conf]
- Benedikt Gierlichs, Kerstin Lemke-Rust, Christof Paar
Templates vs. Stochastic Methods. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:15-29 [Conf]
- François-Xavier Standaert, Eric Peeters, Cédric Archambeau, Jean-Jacques Quisquater
Towards Security Limits in Side-Channel Attacks. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:30-45 [Conf]
- Deukjo Hong, Jaechul Sung, Seokhie Hong, Jongin Lim, Sangjin Lee, Bonseok Koo, Changhoon Lee, Donghoon Chang, Jesang Lee, Kitae Jeong, Hyun Kim, Jongsung Kim, Seongtaek Chee
HIGHT: A New Block Cipher Suitable for Low-Resource Device. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:46-59 [Conf]
- Kazumaro Aoki
Integer Factoring Utilizing PC Cluster. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:60- [Conf]
- Sergei P. Skorobogatov
Optically Enhanced Position-Locked Power Analysis. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:61-75 [Conf]
- Stefan Mangard, Kai Schramm
Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:76-90 [Conf]
- Amir Moradi, Mohammad T. Manzuri Shalmani, Mahmoud Salmasizadeh
A Generalized Method of Differential Fault Attack Against AES Cryptosystem. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:91-100 [Conf]
- Sandeep Kumar, Christof Paar, Jan Pelzl, Gerd Pfeiffer, Manfred Schimmler
Breaking Ciphers with COPACOBANA - A Cost-Optimized Parallel Code Breaker. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:101-118 [Conf]
- Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbrenner, Hoang Le, Mohammed Khaleeluddin, Ramakrishna Bachimanchi
Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:119-133 [Conf]
- Michael Scott, Neil Costigan, Wesam Abdulwahab
Implementing Cryptographic Pairings on Smartcards. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:134-147 [Conf]
- Toru Akishita, Masanobu Katagi, Izuru Kitamura
SPA-Resistant Scalar Multiplication on Hyperelliptic Curve Cryptosystems Combining Divisor Decomposition Technique and Joint Regular Form. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:148-159 [Conf]
- Marc Joye, Pascal Paillier
Fast Generation of Prime Numbers on Portable Devices: An Update. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:160-173 [Conf]
- Thanh-Ha Le, Jessy Clédière, Cécile Canovas, Bruno Robisson, Christine Servière, Jean-Louis Lacoume
A Proposition for Correlation Power Analysis Enhancement. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:174-186 [Conf]
- Naofumi Homma, Sei Nagashima, Yuichi Imai, Takafumi Aoki, Akashi Satoh
High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:187-200 [Conf]
- Joseph Bonneau, Ilya Mironov
Cache-Collision Timing Attacks Against AES. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:201-215 [Conf]
- Emmanuel Prouff, Christophe Giraud, Sébastien Aumônier
Provably Secure S-Box Implementation Based on Fourier Transform. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:216-230 [Conf]
- Ari Juels
The Outer Limits of RFID Security. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:231- [Conf]
- Marco Bucci, Luca Giancane, Raimondo Luzzi, Alessandro Trifiletti
Three-Phase Dual-Rail Pre-charge Logic. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:232-241 [Conf]
- Zhimin Chen, Yujie Zhou
Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:242-254 [Conf]
- Daisuke Suzuki, Minoru Saeki
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:255-269 [Conf]
- Stefan Tillich, Johann Großschädl
Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:270-284 [Conf]
- Massoud Masoumi, Farshid Raissi, Mahmoud Ahmadian
NanoCMOS-Molecular Realization of Rijndael. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:285-297 [Conf]
- Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis
Improving SHA-2 Hardware Implementations. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:298-310 [Conf]
- Eric Simpson, Patrick Schaumont
Offline Hardware/Software Authentication for Reconfigurable Platforms. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:311-323 [Conf]
- Eric Brier, Benoît Chevallier-Mames, Mathieu Ciet, Christophe Clavier
Why One Should Also Secure RSA Public Key Elements. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:324-338 [Conf]
- Pierre-Alain Fouque, Sébastien Kunz-Jacques, Gwenaëlle Martinet, Frédéric Muller, Frédéric Valette
Power Attack on Small RSA Public Exponent. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:339-353 [Conf]
- Douglas Stebila, Nicolas Thériault
Unified Point Addition Formulæ and Side-Channel Attacks. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:354-368 [Conf]
- Pim Tuyls, Geert Jan Schrijen, Boris Skoric, Jan van Geloven, Nynke Verhaegh, Rob Wolters
Read-Proof Hardware from Protective Coatings. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:369-383 [Conf]
- G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:384-398 [Conf]
- Konrad J. Kulikowski, Alexander Smirnov, Alexander Taubin
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:399-413 [Conf]
- Ahmad-Reza Sadeghi
Challenges for Trusted Computing. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:414- [Conf]
- Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
Superscalar Coprocessor for High-Speed Curve-Based Cryptography. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:415-429 [Conf]
- Manuel Koschuch, Joachim Lechner, Andreas Weitzer, Johann Großschädl, Alexander Szekely, Stefan Tillich, Johannes Wolkerstorfer
Hardware/Software Co-design of Elliptic Curve Cryptography on an 8051 Microcontroller. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:430-444 [Conf]
- V. S. Dimitrov, Kimmo U. Järvinen, M. J. Jacobson, W. F. Chan, Z. Huang
FPGA Implementation of Point Multiplication on Koblitz Curves Using Kleinian Integers. [Citation Graph (0, 0)][DBLP]
CHES, 2006, pp:445-459 [Conf]
|
