The SCEAS System
Navigation Menu

Conferences in DBLP

(fdl)
2006 (conf/fdl/2006)


  1. Semi-Symbolic Analysis of Accuracy at System Level. [Citation Graph (, )][DBLP]


  2. Randomized Simulation of Hybrid Systems For Circuit Validation. [Citation Graph (, )][DBLP]


  3. Generic Behavioral Modeling of Analog and Mixed-Signal Systems. [Citation Graph (, )][DBLP]


  4. Compact Modeling of Emerging Technologies with VHDL-AMS. [Citation Graph (, )][DBLP]


  5. VHDL-AMS Model of Ferroelectric Liquid Crystals. [Citation Graph (, )][DBLP]


  6. VHDL-AMS Modeling and Simulation. [Citation Graph (, )][DBLP]


  7. Baseband Modeling Using Multidimensional Networks in VHDL-AMS. [Citation Graph (, )][DBLP]


  8. Verification-Oriented Behavioral Modeling of Non-Linear Analog. [Citation Graph (, )][DBLP]


  9. Multi-level Modeling of Hot Carrier Injection for Reliability. [Citation Graph (, )][DBLP]


  10. Functional Virtual Prototyping Design Flow and VHDL-AMS. [Citation Graph (, )][DBLP]


  11. VHDL-AMS Model Generation from Other HDL Language. [Citation Graph (, )][DBLP]


  12. Using Sequential Equations to Improve Efficiency and Robustness. [Citation Graph (, )][DBLP]


  13. ModelLib: A Web-Based Platform for Collecting Behavioural Models. [Citation Graph (, )][DBLP]


  14. Supporting AMS-System Design. [Citation Graph (, )][DBLP]


  15. SystemC-A Modeling of an Automotive Seating Vibration Isolation System. [Citation Graph (, )][DBLP]


  16. SystemC-AMS Extension Library for Modeling Conservative Nonlinear Dynamic Systems. [Citation Graph (, )][DBLP]


  17. A Framework for the Design of Heterogenous Systems. [Citation Graph (, )][DBLP]


  18. Modelling and Simulation of an I2C Bus Controller in SystemC-AMS. [Citation Graph (, )][DBLP]


  19. Efficient Representation and Simulation of Model-Based Designs. [Citation Graph (, )][DBLP]


  20. The Quiny SystemC Front End: Self-Synthesising Designs. [Citation Graph (, )][DBLP]


  21. Mining Metadata for Composability of IPs from SystemC IP Library. [Citation Graph (, )][DBLP]


  22. A Bitwidth-aware HDL Extension. [Citation Graph (, )][DBLP]


  23. Adaptive Metrics for System-Level Functional Partitioning. [Citation Graph (, )][DBLP]


  24. Non-Intrusive High-level SystemC Debugging. [Citation Graph (, )][DBLP]


  25. Extension of the SystemC Kernel for Simulation Coverage. [Citation Graph (, )][DBLP]


  26. Design Structure Analysis and Transaction Recording in SystemC. [Citation Graph (, )][DBLP]


  27. Hardware Communication Refinement in Digital Signal Processing. [Citation Graph (, )][DBLP]


  28. C-based Design of a Flexible Wrapper for Tiled Networks On Chip. [Citation Graph (, )][DBLP]


  29. SystemC Modeling and Validation of A RISC Processor System. [Citation Graph (, )][DBLP]


  30. Transaction Level Modeling in Communication Engine Design. [Citation Graph (, )][DBLP]


  31. SystemC TLM Transaction Modelling and Dispatch for Active Object. [Citation Graph (, )][DBLP]


  32. Case Study on Transaction Level Modeling. [Citation Graph (, )][DBLP]


  33. Design Structure Analysis and Transaction-based Co-Verification. [Citation Graph (, )][DBLP]


  34. Layered UML Workload and SystemC Platform Models. [Citation Graph (, )][DBLP]


  35. SystemC Modeling of a Dynamic Power Management Architecture. [Citation Graph (, )][DBLP]


  36. Efficient Monte Carlo Simulation Using SystemC. [Citation Graph (, )][DBLP]


  37. Token-based OSCI SystemC Simulator for Architecture Dimensioning. [Citation Graph (, )][DBLP]


  38. On Consistency and Completeness of Property-Sets. [Citation Graph (, )][DBLP]


  39. On-line Monitoring of Properties Built on Regular Expressions. [Citation Graph (, )][DBLP]


  40. Main Results of PROSYD - Methodologies and Tools for Writing Reusable PSL Assertions. [Citation Graph (, )][DBLP]


  41. A Verification Tool Implementation using Introspection Mechanism. [Citation Graph (, )][DBLP]


  42. A Case Study on Automated Generation of Integration Tests. [Citation Graph (, )][DBLP]


  43. Formalizing TLM with Communicating State Machines. [Citation Graph (, )][DBLP]


  44. System Description Aspects as Syntactic Sugar. [Citation Graph (, )][DBLP]


  45. IP Library For Temporal SystemC Assertions. [Citation Graph (, )][DBLP]


  46. Overview of the ICODES Project. [Citation Graph (, )][DBLP]


  47. Industrial Partners Expectations from the ICODES Methodology. [Citation Graph (, )][DBLP]


  48. A SystemC-based Framework of Communication Architecture. [Citation Graph (, )][DBLP]


  49. OSSS-Channels: Modelling and Synthesis of Communication. [Citation Graph (, )][DBLP]


  50. UML - The Emerging Hardware Description Language? [Citation Graph (, )][DBLP]


  51. UML User Interface to a Proof-based Hardware Design Flow. [Citation Graph (, )][DBLP]


  52. A Model-driven Co-design Flow for Embedded Systems. [Citation Graph (, )][DBLP]


  53. A Method for Terminal Platform Architecture Development. [Citation Graph (, )][DBLP]


  54. UML2 Profile for Modeling Controlled Data Parallel Applications. [Citation Graph (, )][DBLP]


  55. MCF: A Metamodeling-based Visual Component Composition Framework. [Citation Graph (, )][DBLP]


  56. Reusing Real-Time Systems Design Experience. [Citation Graph (, )][DBLP]


  57. Towards a UML Profile for Real-Time Modelling. [Citation Graph (, )][DBLP]


  58. Bridging the Gap Between SysML and Design Space Exploration. [Citation Graph (, )][DBLP]


  59. Metamodel-based Methodology for Real-Time Embedded Design. [Citation Graph (, )][DBLP]


  60. UML-based Automatic Code Generation for Hybrid CPU-FPGA. [Citation Graph (, )][DBLP]


  61. Applying Communication Patterns to Actor-Oriented Models. [Citation Graph (, )][DBLP]

NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002