Conferences in DBLP
Fabrizio Baiardi , Marco Vanneschi Parallelism Issues in Multi-Style Computers. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:1-34 [Conf ] David May , Roger Shepherd , Catherine Keane Communicating Process Architecture: Transputers and Occam. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:35-81 [Conf ] John R. Gurd , P. M. C. C. Barahona , A. P. Wim Böhm , Chris C. Kirkham , A. J. Parker , John Sargeant Fine-Grain Parallel Computing: The Dataflow Approach. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:82-152 [Conf ] Werner E. Kluge , Claudia Schmittgen Reduction Languages and Reduction Systems. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:153-184 [Conf ] Wolfgang Bibel , Franz J. Kurfess , K. Aspetsberger , P. Hintenaus , Johann Schumann Parallel Inference Machines. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:185-226 [Conf ] Wim Bronnenberg , M. D. Janssens , Eddy Odijk , R. A. H. van Twist The Architecture of DOOM. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:227-269 [Conf ] R. J. Karia Towards a Parallel Architecture for Functional Languages. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:270-285 [Conf ] Rubén González-Rubio , A. Bradier , J. Rohmer DDC Delta Driven Computer - a Parallel Machine for Symbolic Processing. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:286-298 [Conf ] Atsuhiro Goto , Shunichi Uchida Towards a High Performance Parallel Inference Machine - The Intermediate Stage Plan of PIM. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:299-320 [Conf ] Wolfgang K. Giloi Interconnection Networks for Massively Parallel Computer Systems. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:321-348 [Conf ] Mariagiovanna Sami , N. Scarabottolo Fault-Tolerance in Parallel Architectures. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:349-372 [Conf ] P. Mehring , E. Aposporidis Multi-Level Simulator for VLSI. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:373-386 [Conf ] Patrice Quinton An Introduction to Systolic Architectures. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:387-400 [Conf ] Giuseppe Attardi Concurrency in a Knowledge Base. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:401-415 [Conf ] Philip C. Treleaven , Apostolos Nikolaos Refenes , Kenneth J. Lees , Stephen C. McCabe Computer Architectures for Artificial Intelligence. [Citation Graph (0, 0)][DBLP ] Future Parallel Computers, 1986, pp:416-482 [Conf ]