Conferences in DBLP

International Conference on Hardware Software Codesign (codes)
1996 (conf/codes/1996)

1. Bill Lin, Steven Vercauteren, Hugo De Man
   Embedded Architecture Co-Synthesis and System Integration. [Citation Graph (0, 0)][DBLP]
   CODES, 1996, pp:2-9 [Conf]
   
2. Tommy King-Yin Cheung, Graham R. Hellestrand, Prasert Kanthamanon
   A Multi-Level Transformation Approach to HW/SW Codesign: A Case Study. [Citation Graph (0, 0)][DBLP]
   CODES, 1996, pp:10-17 [Conf]
   
3. Michael Sheliga, Nelson L. Passos, Edwin Hsing-Mean Sha
   Fully Parallel Hardware/Software Codesign for Multi-Dimensional DSP Applications. [Citation Graph (0, 0)][DBLP]
   CODES, 1996, pp:18-27 [Conf]
   
4. Carlos Carreras, J. C. López, María Luisa López, Luis Sánchez, Carlos Delgado Kloos, Natividad Martinez
   A Co-Design Methodology Based on Formal Specification and High-level Estimation. [Citation Graph (0, 0)][DBLP]
   CODES, 1996, pp:28-35 [Conf]
   
5. Wolfram Hardt, Wolfgang Rosenstiel
   Speed-up estimation for HW/SW-systems. [Citation Graph (0, 0)][DBLP]
   CODES, 1996, pp:36-43 [Conf]
   
6. R. K. Gupta
   A framework for interactive analysis of timing constraints in embedded systems. [Citation Graph (0, 0)][DBLP]
   CODES, 1996, pp:44-51 [Conf]
   
7. Jörg Henkel, Rolf Ernst
   The Interplay of Run-Time Estimation and Granularity in HW/SW Partitioning. [Citation Graph (0, 0)][DBLP]
   CODES, 1996, pp:52-61 [Conf]
   
8. Alessandro Balboni, William Fornaciari, Donatella Sciuto
   Partitioning and Exploration Strategies in the TOSCA Co-Design Flow. [Citation Graph (0, 0)][DBLP]
   CODES, 1996, pp:62-69 [Conf]
   
9. Junwei Hou, Wayne Wolf
   Process Partitioning for Distributed Embedded Systems. [Citation Graph (0, 0)][DBLP]
   CODES, 1996, pp:70-76 [Conf]
   
10. Reiner W. Hartenstein, Jürgen Becker, Rainer Kress
    Two-level Partitioning of Image Processing Algorithms for the Parallel Map-oriented Machine. [Citation Graph (0, 0)][DBLP]
    CODES, 1996, pp:77-84 [Conf]
    
11. Peter Voigt Knudsen, Jan Madsen
    PACE: A Dynamic Programming Algorithm for Hardware/Software Partitioning. [Citation Graph (0, 0)][DBLP]
    CODES, 1996, pp:85-93 [Conf]
    
12. Fred Rose, Todd Carpenter, Sanjaya Kumar, John Shackleton, Todd Steeves Honeywell
    A Model for the Coanalysis of Hardware and Software Architectures. [Citation Graph (0, 0)][DBLP]
    CODES, 1996, pp:94-103 [Conf]
    
13. R. Gerndt
    A Case Study in Co-Design of Communication Controllers. [Citation Graph (0, 0)][DBLP]
    CODES, 1996, pp:104-115 [Conf]
    
14. Frank Vahid, Thuy Dm Le
    Towards a Model for Hardware and Software Functional Partitioning. [Citation Graph (0, 0)][DBLP]
    CODES, 1996, pp:116-123 [Conf]
    
15. Markus Voss, Oliver Hammerschmidt
    Implications of Codesign as a Natural Constituent of a Systems Engineering Discipline for Computer Based Systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1996, pp:124-131 [Conf]
    
16. Jean Paul Calvez, Dominique Heller, Olivier Pasquier
    Uninterpreted Co-Simulation for Performance Evaluation of Hw/Sw Systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1996, pp:132-0 [Conf]