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Conferences in DBLP

International Conference on Hardware Software Codesign (codes)
1997 (conf/codes/1997)

  1. Youngsoo Shin, Kiyoung Choi
    Enforcing Schedulability of Multi-Task Systems by Hardware-Software Codesign. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:3-8 [Conf]
  2. Thomas Benner, Rolf Ernst
    An Approach to Mixed Systems Co-Synthesis. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:9-14 [Conf]
  3. Peter Bjørn-Jørgensen, Jan Madsen
    Critical path driven cosynthesis for heterogeneous target architectures. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:15-22 [Conf]
  4. Guy Gogniat, Michel Auguin, Cécile Belleudy
    A generic multi-unit architecture for codesign methodologies. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:23-28 [Conf]
  5. Reinhard Gerndt, Rolf Ernst
    An Event-Driven Multi-Threading Architecture for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:29-34 [Conf]
  6. Harald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers
    Design-For-Debug in Hardware/Software Co-Design. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:35-42 [Conf]
  7. Frank Vahid
    Modifying Min-Cut for Hardware and Software Functional Partitioning. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:43-48 [Conf]
  8. Jean Paul Calvez, Olivier Pasquier, J. Peckol
    Software Implementation Techniques for Hw/Sw Embedded Systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:49-54 [Conf]
  9. Koen Danckaert, Francky Catthoor, Hugo De Man
    System level memory optimization for hardware-software co-design. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:55-64 [Conf]
  10. Kees A. Vissers
    Trade-offs in the design of mixed hardware-software systems-a perspective from industry. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:65-68 [Conf]
  11. Ross B. Ortega, Gaetano Borriello
    Communication Synthesis for Embedded Systems with Global Considerations. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:69-74 [Conf]
  12. Laurent Freund, Denis Dupont, Michel Israël, Frédéric Rousseau
    Interface Optimization During Hardware-Software Partitioning. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:75-80 [Conf]
  13. Frank Vahid, Linus Tauro
    An Object-Oriented Communication Library for Hardware-Software CoDesign. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:81-86 [Conf]
  14. D. C. R. Jensen, Jan Madsen, Steen Pedersen
    The importance of interfaces: a HW/SW codesign case study. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:87-94 [Conf]
  15. Felice Balarin, Massimiliano Chiodo, Attila Jurecska, Luciano Lavagno, Bassam Tabbara, Alberto L. Sangiovanni-Vincentelli
    Automatic Generation of a Real-Time Operating System for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:95-100 [Conf]
  16. Pai H. Chou, Gaetano Borriello
    Software Architecture Synthesis for Retargetable Real-time Embedded Systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:101-108 [Conf]
  17. Alberto Allara, S. Filipponi, Fabio Salice, William Fornaciari, Donatella Sciuto
    A Flexible Model for Evaluating the Behavior of Hardware/Software Systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:109-114 [Conf]
  18. Sanjaya Kumar, Fred Rose
    A Codesign Environment Supporting Hardware/Software Modeling at Different Levels of Detail. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:115-120 [Conf]
  19. Ken Hines, Gaetano Borriello
    Optimizing communication in embedded system co-simulation. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:121-126 [Conf]
  20. Harry Hsieh, Alberto L. Sangiovanni-Vincentelli
    Modeling micro-controller peripherals for high-level co-simulation and synthesis. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:127-134 [Conf]
  21. Martyn Edwards
    Software acceleration using programmable logic: is it worth the effort? [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:135-140 [Conf]
  22. Reiner W. Hartenstein, Jürgen Becker
    Performance Analysis in CoDe-X Partitioning for Structural Programmable Accelerators. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:141-146 [Conf]
  23. Shinji Kimura, Yasufumi Itou, Makoto Hirao, Katsumasa Watanabe, Mitsuteru Yukishita, Akira Nagoya
    A Hardware/Software Codesign Method for a General Purpose Reconfigurable Co-Processor. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:147-152 [Conf]
  24. Fumio Suzuki, Hisao Koizumi, M. Hiramine, K. Yamamoto, Hiroto Yasuura, K. Okino
    A HW/SW co-design environment for multi-media equipments development using inverse problem. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:153-160 [Conf]
  25. Jakob Axelsson
    Architecture Synthesis and Partitioning of Real-Time Systems: A Comparison of Three Heuristic Search Strategies. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:161-166 [Conf]
  26. Jürgen Teich, Tobias Blickle, Lothar Thiele
    An evolutionary approach to system-level synthesis. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:167-172 [Conf]
  27. Vincenza Carchiolo, Michele Malgeri, Giuseppe Mangioni
    Approach to the Synthesis of HW and SW in Codesign. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:173-0 [Conf]
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