Conferences in DBLP
Raimund Ubar , Maksim Jenihhin Hybrid BIST Optimization for Core-based Systems with Test Pattern Broadcasting. [Citation Graph (0, 0)][DBLP ] Conf ] Hans G. Kerkhoff , Arun A. Joseph Testability Issues in Superconductor Electronic. [Citation Graph (0, 0)][DBLP ] Conf ] N. Venkateswaran , Krishna Bharath Frequency Domain Testing of General Purpose Processors at the Instruction Execution Level. [Citation Graph (0, 0)][DBLP ] Conf ] Donald Bailey , Warwick Allen , Serge N. Demidenko Spectral Warping Revisited. [Citation Graph (0, 0)][DBLP ] Conf ] Xiaoyun Deng , Chip-Hong Chang , Erwin Brandle A New Method for Eye Extraction from Facial Image. [Citation Graph (0, 0)][DBLP ] Conf ] Amine Bermak , Farid Boussaïd , Abdesselam Bouzerdoum A New read-out circuit for low power current and voltage mediated integrating CMOS imager. [Citation Graph (0, 0)][DBLP ] Conf ] Gagandeep S. Sandha , Pawan K. Singh , Neha Oberoi , D. Nagchoudhuri Phase Correlations in Human EEG Signal: A Case Study. [Citation Graph (0, 0)][DBLP ] Conf ] Selam T. Ahderom , Mehrdad Raisi , Kamal E. Alameh , Kamran Eshraghian Testing and Analysis of Computer Generated Holograms for MicroPhotonic Devices. [Citation Graph (0, 0)][DBLP ] Conf ] Steven Hinckley , Paul V. Jansz-Drávetzky , Kamran Eshraghian Pixel Structure Effects on Crosstalk in Backwall Illuminated CMOS Compatible Photodiode Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Mehrdad Raisi , Selam T. Ahderom , Kamal E. Alameh , Kamran Eshraghian Dynamic MicroPhotonic WDM Equalizer. [Citation Graph (0, 0)][DBLP ] Conf ] Kamal E. Alameh , Selam T. Ahderom , Mehrdad Raisi , Rong Zheng , Kamran Eshraghian MicroPhotonic Reconfigurable RF Signal Processor. [Citation Graph (0, 0)][DBLP ] Conf ] Natascha Petry Ligocki , Achim Rettberg , Mauro Cesar Zanella , Andreas Hennig , André Luiz de Freitas Francisco Towards a Modular Communication System for FPGAs. [Citation Graph (0, 0)][DBLP ] Conf ] J. Chandran , R. Kaluri , Jugdutt Singh , Viktor Öwall , Ronny Veljanovski Xilinx Virtex II Pro Implementation of a Reconfigurable UMTS Digital Channel Filter. [Citation Graph (0, 0)][DBLP ] Conf ] Patrick Girard , Olivier Héron , Serge Pravossoudovitch , Michel Renovell High Quality TPG for Delay Faults in Look-Up Tables of FPGAs. [Citation Graph (0, 0)][DBLP ] Conf ] K. Wang , Jugdutt Singh , M. Faulkner FPGA Implementation of an OFDM-WLAN Synchronizer. [Citation Graph (0, 0)][DBLP ] Conf ] Alain Vachoux , Christoph Grimm , Karsten Einwich Towards Analog and Mixed-Signal SOC Design with SystemC-AMS. [Citation Graph (0, 0)][DBLP ] Conf ] Aleksandar Stojcevski , Jugdutt Singh , Aladin Zayegh CMOS ADC with Reconfigurable Properties for a Cellular Handset. [Citation Graph (0, 0)][DBLP ] Conf ] Alistair Kitchen , Abdesselam Bouzerdoum , Amine Bermak Time Domain Analogue to Digital Conversion in a Digital Pixel Sensor Array. [Citation Graph (0, 0)][DBLP ] Conf ] Luis Alejandro Cortés , Petru Eles , Zebo Peng Static Scheduling of Monoprocessor Real-Time Systems composed of Hard and Soft Tasks. [Citation Graph (0, 0)][DBLP ] Conf ] Yao Li The Slack Sharing Server for Embedded Microcontrollers. [Citation Graph (0, 0)][DBLP ] Conf ] K. T. Gribbon , D. G. Bailey A Novel Approach to Real-time Bilinear Interpolation. [Citation Graph (0, 0)][DBLP ] Conf ] Marie-Lise Flottes , Yves Bertrand , L. Balado , E. Lupon , Anton Biasizzo , Franc Novak , Stefano Di Carlo , Paolo Prinetto , N. Pricopi , Hans-Joachim Wunderlich Digital, Memory and Mixed-Signal Test Engineering Education: Five Centres of Competence in Europ. [Citation Graph (0, 0)][DBLP ] Conf ] James O. Hamblen , Tyson S. Hall Engaging Undergraduate Students with Robotic Design Projects. [Citation Graph (0, 0)][DBLP ] Conf ] Ton J. Mouthaan A Case Study of a Microsystems MSc Curriculum. [Citation Graph (0, 0)][DBLP ] Conf ] Bernard Courtois Infrastructures for Education, Research and Industry in Microelectronics - A review. [Citation Graph (0, 0)][DBLP ] Conf ] Xiaoyong Yang A Feasibility Study Of UML In The Software Defined Radio. [Citation Graph (0, 0)][DBLP ] Conf ] Rudolf Volner , Lubomir Pousek BioMedical Intelligence Security Home Network- ATM/IP CATV Network. [Citation Graph (0, 0)][DBLP ] Conf ] Peter J. Green , Desmond P. Taylor Dynamic Channel Order Estimation Algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Xiaoyong Yang An Enhanced SOFM Method for Automatic Recognition and Identification of Digital Modulations. [Citation Graph (0, 0)][DBLP ] Conf ] Masaki Hashizume , Tetsuo Akita , Hiroyuki Yotsuyanagi , Takeomi Tamesada CMOS Open Fault Detection by Appearance Time of Switching Supply Current. [Citation Graph (0, 0)][DBLP ] Conf ] Isao Tsukimoto , Masaki Hashizume , Hiroyuki Yotsuyanagi , Takeomi Tamesada Practical Fault Coverage of Supply Current Tests for Bipolar ICs. [Citation Graph (0, 0)][DBLP ] Conf ] Scott Thomas , Rafic Z. Makki , Sai Kishore Vavilala Measurement and Analysis of Physical Defects for Dynamic Supply Current Testing. [Citation Graph (0, 0)][DBLP ] Conf ] Selam T. Ahderom , Mehrdad Raisi , Kamal E. Alameh , Kamran Eshraghian Reconfigurable MicroPhotonic Add/Drop Multiplexer Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Kamal E. Alameh , Kamran Eshraghian , Selam T. Ahderom , Mehrdad Raisi , Mike Myung-Ok Lee , Rainer Michalzik Integrated MicroPhotonic Broadband Smart Antenna Beamformer. [Citation Graph (0, 0)][DBLP ] Conf ] Zhenglin Wang , Kamal E. Alameh , Selam T. Ahderom , Rong Zheng , Mehrdad Raisi , Kamran Eshraghian Novel Integrated Optical Router for MicroPhotonic Switching. [Citation Graph (0, 0)][DBLP ] Conf ] Paolo Ienne , Ajay K. Verma Arithmetic Transformations to Maximise the Use of Compressor Trees. [Citation Graph (0, 0)][DBLP ] Conf ] Andrzej Rucinski , Artur Skrygulec , Khrystyna Pysareva , Jakub Mocny Microsystem Development Using the TQM Design Methodology. [Citation Graph (0, 0)][DBLP ] Conf ] Fabrizio Ferrandi , Pier Luca Lanzi , Donatella Sciuto , Mara Tanelli System-level metrics for hardware/software architectural mapping. [Citation Graph (0, 0)][DBLP ] Conf ] Adriel Cheng , Atanas N. Parashkevov , Cheng-Chew Lim Coverage Measurement for Software Application Level Verification using Symbolic Trajectory Evaluation Techniques. [Citation Graph (0, 0)][DBLP ] Conf ] Florian Dittmann , Achim Rettberg , Thomas Lehmann , Mauro Cesar Zanella Invariants for Distributed Local Control Elements of a New Synchronous Bit-Serial Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Chul Kim , Mike Myung-Ok Lee , Byung-Lok Cho , Kamran Eshraghian SOC-B Design and Testing Technique of IS-95C CDMA Transmitter for Measurement of Electric Field Intensity using FPGA and ASIC. [Citation Graph (0, 0)][DBLP ] Conf ] Zhi Ye , Chip-Hong Chang Local Search Method for FIR Filter Coefficients Synthesis. [Citation Graph (0, 0)][DBLP ] Conf ] Huaping Liu , Han Chengde Optimization of Multipartite Table Methods to Approximate the Elementary Functions. [Citation Graph (0, 0)][DBLP ] Conf ] Hiroyuki Yotsuyanagi , Toshimasa Kuchii , Shigeki Nishikawa , Masaki Hashizume , Kozo Kinoshita On Configuring Scan Trees to Reduce Scan Shifts based on a Circuit Structure. [Citation Graph (0, 0)][DBLP ] Conf ] Marie-Lise Flottes , Regis Poirier , Bruno Rouzeyre On Using Test Vector Differences for Reducing Test Pin Numbers. [Citation Graph (0, 0)][DBLP ] Conf ] Luca Schiano , Yong-Bin Kim , Fabrizio Lombardi Scan Test of IP Cores in an ATE Environment. [Citation Graph (0, 0)][DBLP ] Conf ] Yannick Bonhomme , Patrick Girard , Loïs Guiller , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel Design of Routing-Constrained Low Power Scan Chains. [Citation Graph (0, 0)][DBLP ] Conf ] J. Sun , G. S. Hong , Mustafizur Rahman , Yoke-San Wong The Application of Nonstandard Support Vector Machine in Tool Condition Monitoring System. [Citation Graph (0, 0)][DBLP ] Conf ] U. Sabura Banu , G. Uma , M. A. Panneerselvam Artificial Controlled Neural Network Emulator for Quasi Resonant Converter. [Citation Graph (0, 0)][DBLP ] Conf ] Daisuke Ezaki , Masaki Hashizume , Hiroyuki Yotsuyanagi , Takeomi Tamesada A Power Supply Circuit Recycling Charge in Adiabatic Dynamic CMOS Logic Circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Gerald Esch Jr. , Tom Chen Design of CMOS IO Drivers with Less Sensitivity to Process, Voltage, and Temperature Variations. [Citation Graph (0, 0)][DBLP ] Conf ] Melvin A. Breuer Determining error rate in error tolerant VLSI chips. [Citation Graph (0, 0)][DBLP ] Conf ] Babak Rahbaran , Andreas Steininger , Thomas Handl Built-in Fault Injection in Hardware - The FIDYCO Example. [Citation Graph (0, 0)][DBLP ] Conf ] N. Venkateswaran , V. Barath Kumar , R. Raghavan , R. Srinivas , S. Subramanian , V. Balaji , V. Mahalingam , T. L. Rajaprabhu Crosstalk Fault Tolerant Processor Architecture - A Power Aware Design. [Citation Graph (0, 0)][DBLP ] Conf ] Rochit Rajsuman An Overview of the Open Architecture Test System. [Citation Graph (0, 0)][DBLP ] Conf ] S. V. Gopalaiah , A. P. Shivaprasad Low Voltage CMOS op-amp with Rail-to-Rail Input/Output Swing. [Citation Graph (0, 0)][DBLP ] Conf ] Daniela De Venuto , Marija Blagojevic , Maher Kayal Microelectronic System for Hall Sensor Power Measurements. [Citation Graph (0, 0)][DBLP ] Conf ] Hai Phuong Le , Aladin Zayegh , Jugdutt Singh Noise Analysis of a Reduced Complexity Pipeline Analog-to-Digital Converter. [Citation Graph (0, 0)][DBLP ] Conf ] Min Jiang , Bing Yang , Xinan Wang , Tianyi Zhang SW/HW Co-design of a Java-based ASIP for Pervasive Computing in Mobile Applications. [Citation Graph (0, 0)][DBLP ] Conf ] Soumendu Bhattacharya , Ganesh Srinivasan , Sasikumar Cherubal , Abhijit Chatterjee Test Time Reduction for ACPR Measurement of Wireless Transceivers Using Periodic Bit-Stream Sequences. [Citation Graph (0, 0)][DBLP ] Conf ] V. Vibhute , David Fitrio , Jugdutt Singh , Aladin Zayegh , Aleksandar Stojcevski A Tunable VCO for Multistandard Mobile Receiver. [Citation Graph (0, 0)][DBLP ] Conf ] Kamal E. Alameh , Abdesselam Bouzerdoum , Selam T. Ahderom , Mehrdad Raisi , Kamran Eshraghian , X. Zhao , Rong Zheng , Zhenglin Wang Integrated MicroPhotonic Wideband RF Interference Mitigation Filter. [Citation Graph (0, 0)][DBLP ] Conf ] Mehrdad Raisi , Selam T. Ahderom , Kamal E. Alameh , Kamran Eshraghian Multi-band MicroPhotonic Tunable Optical Filter. [Citation Graph (0, 0)][DBLP ] Conf ] Seung-Min Lee , Stefan Lachowicz , David Lucas , A. M. Rassau , Kamran Eshraghian , Mike Myung-Ok Lee , Kamal E. Alameh A Novel Design of Beam Steering n-phase OPTO-ULSI Processor for IIPS. [Citation Graph (0, 0)][DBLP ] Conf ] Ganesh Kothapalli Excitation Modes and Transient Response of a Winner-take-all Circuit. [Citation Graph (0, 0)][DBLP ] Conf ] Zhi Ye , Ravi Kumar Satzoda , Udit Sharma , Naveen Nazimudeen , Chip-Hong Chang Performance Evaluation of Direct Form FIR Filter with Merged Arithmetic Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] David Murfett The Challenge of Testing RFID Integrated Circuits . [Citation Graph (0, 0)][DBLP ] Conf ] Abdil Rashid Mohamed , Zebo Peng , Petru Eles A Wiring-Aware Approach to Minimizing Built-in Self-Test Overhead. [Citation Graph (0, 0)][DBLP ] Conf ] Shyue-Kung Lu , Mau-Jung Lu Enhancing Delay Fault Testability for FIR Filters Based on Realistic Sequential Cell Fault Model. [Citation Graph (0, 0)][DBLP ] Conf ] Vineetha Kalavally , Nader Bin Kamrani Simulation of a Communications System - A Designer's Perspective. [Citation Graph (0, 0)][DBLP ] Conf ] Andrea S. Brogna , Franco Bigongiari , Fabrizio Bertuccelli , Walter Errico , Simone Giovannetti , Egidio Pescari , Roberto Saletti SEU Protected CPU for Slow Control on Space Vehicles. [Citation Graph (0, 0)][DBLP ] Conf ] Kyu Hwan Seol , Yeong Seog Lim Implementation of Headset Using Bluetooth. [Citation Graph (0, 0)][DBLP ] Conf ] Zhiyi Fang , Shuhua Li , Weiguo Xu , Qingkai Meng SCS: A Workflow_Based Smart Control System. [Citation Graph (0, 0)][DBLP ] Conf ] Giampaolo Agosta , Francesco Bruschi , Donatella Sciuto Synthesis of Dynamic Class Loading Specifications on Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP ] Conf ] Yu-Ting Pai , Yu-Kumg Chen The Fastest Carry Lookahead Adder. [Citation Graph (0, 0)][DBLP ] Conf ] T. Salim , J. Devlin , J. Whittington Analog Conversion for FPGA Implementation of the TIGER Transmitter using a 14 bit DAC. [Citation Graph (0, 0)][DBLP ] Conf ] Shing Tenqchen , Ying-Haw Shu , Ming-Chang Sun , Wu-Shiung Feng Blind Signal Extraction Algorithm for the License Plate Matching of Vehicle Positioning System. [Citation Graph (0, 0)][DBLP ] Conf ] 