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Conferences in DBLP

Workshop on Electronic Design, Test and Applications (delta)
2006 (conf/delta/2006)


  1. Message from the General Chairs. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:- [Conf]

  2. Title Page. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:- [Conf]

  3. Message from the Program Chairs. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:- [Conf]

  4. Reviewers. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:- [Conf]

  5. Committees. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:- [Conf]

  6. Copyright. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:- [Conf]
  7. Talal Arnaout, Gunter Bartsch, Hans-Joachim Wunderlich
    Some Common Aspects of Design Validation, Debug and Diagnosis. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:3-10 [Conf]
  8. Josef Goette, Marcel Jacomet, Markus Hager
    Using Dither to Improve the Performance of Lossy Sigma-Delta Modulators. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:11-16 [Conf]
  9. Woochul Jeon, John Melngailis, Robert W. Newcomb
    CMOS Schottky diode microwave power detector fabrication, Spice modeling, and applications. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:17-22 [Conf]
  10. Amlan Ghosh, Abhishek Ranjan, Nirmal B. Chakrabarti
    Design and Implementation of Analog Multitone Signal Generator Using Regenerative Frequency Divider for OFDM Transceiver. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:23-30 [Conf]
  11. Xu Huang, Allan C. Madoc, Dharmendra Sharma
    Image Noise Removal in Nakagami Fading Channels via Bayesian Estimator. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:31-34 [Conf]
  12. Hui Fang, Puteri Norhashimah, Jianmin Jiang, Yong Yin
    A Hybrid Scheme for Temporal Video Segmentation. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:35-40 [Conf]
  13. Melanie Po-Leen Ooi
    Hardware Implementation for Face Detection on Xilinx Virtex-II FPGA using the Reversible Component Transformation Colour Space. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:41-46 [Conf]
  14. K. T. Gribbon, D. G. Bailey, C. T. Johnston
    Using Design Patterns to Overcome Image Processing Constraints on FPGAs. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:47-56 [Conf]
  15. Zhuoyu Bao, Suriya A. Kumar, David M. Wu, Vimal K. Natarajan, Mike Lin
    A Low Cost, High Quality Embedded Array DFT Technique for High Performance Processors. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:57-63 [Conf]
  16. Chuah Joon Huang Huang, Joel Knight
    VertiCal, a Universal Calibration System for eSys High Performance 32-Bit PowerPC Microcontrollers; Test Challenges & Solution. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:64-67 [Conf]
  17. Shao Chee Ong
    Enabling Test-Time Optimized Pseudorandom Bit Stream (PRBS) 2^31 BER Testing on Automated Test Equipment for 10Gbps Device. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:68-73 [Conf]
  18. Lew Boon Kian
    Test Cost Saving and Challenges in the Implementation of x6 and x8 Parallel Testing on Freescale 16-bit HCS12 Micro-controller Product Family. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:74-82 [Conf]
  19. Kan-Lin Hsiung
    Design of High-Speed Metal-Semiconductor-Metal Photodetectors: An Optimization-Based Approach. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:83-84 [Conf]
  20. Johnny Koh, Tiong Sieh Kiong, I. B. Aris, Senan Mahmoud
    Dual-Head Marking Performance Optimisation via Evolutionary Solutions. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:85-88 [Conf]
  21. Peter J. Green, Desmond P. Taylor
    Implementation of Four Real-Time Software Defined Receivers and a Space-Time Decoder using Xilinx Virtex 2 Pro Field Programmable Gate Array. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:89-92 [Conf]
  22. Kevin Tom, Atila Alvandpour
    Curvature Compensated CMOS Bandgap with Sub 1V Supply. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:93-96 [Conf]
  23. Leipo Yan, Siew Kei Lam, Thambipillai Srikanthan, Wu Jigang
    Energy Efficient Cache Tuning with Performance Bound. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:97-100 [Conf]
  24. Moi-Tin Chew, Gourab Sen Gupta, Subhas Mukhopadhyay, Tracey Kah-Mein Lee
    Developing an Effective Microcontroller Course Based on Field-Programmable Mixed-Signal µ-Controller Product. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:101-104 [Conf]
  25. Syed Zahidul Islam, Mohd. Alauddin Mohd. Ali
    Test Pattern Optimization using Proper Seed Selection in Mixed-Mode Technique. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:105-112 [Conf]
  26. Ton J. Mouthaan, Anke Kohl
    Internationalisation of Masters education; globalisation at work. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:113-115 [Conf]
  27. Serge N. Demidenko, Victor Lai
    Industry-Academia Collaboration in Undergraduate Test Engineering Unit Development. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:116-122 [Conf]
  28. Gourab Sen Gupta, Subhas Mukhopadhyay, Moi-Tin Chew
    A Project Based Approach to Teach Mixed-Signal Embedded Microcontroller for DC Motor Control. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:123-128 [Conf]
  29. Serge N. Demidenko, Wayne Moorhead
    Electronic Test Technology Curriculum Revisiting. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:129-136 [Conf]
  30. Takashi Hirayama, Yasuaki Nishitani
    Efficient Search Methods for Obtaining Exact Minimum AND-EXOR Expressions. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:137-142 [Conf]
  31. Achim Rettberg, Franz J. Rammig
    A new Design Partitioning Approach for Low Power High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:143-148 [Conf]
  32. Jia Di, D. P. Vasudevan
    Synthesis of Nanoelectronic Circuits on Delay-Insensitive Cellular Arrays. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:149-156 [Conf]
  33. T. Somsak, K. Chomsuwan, S. Yamada, M. Iwahara, S. C. Mukhopadhyay
    Conductive Microbead Detection by Helmholtz Coil Technique With SV-GMR Sensor. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:157-162 [Conf]
  34. J. Mazierska, J. Krupka, M. Bialkowski, M. V. Jacob
    Microwave Resonators and Their use as a Measurement Intruments and Sensors. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:163-167 [Conf]
  35. Bao Xu, Wang Gang
    Random Sampling Algorithm in RFID Indoor Location System. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:168-176 [Conf]
  36. Hans G. Kerkhoff, X. Zhang, R. W. Barber, D. R. Emerson
    Fault Modelling and Co-Simulation in FlowFET-Based Biological Array Systems. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:177-182 [Conf]
  37. Mariane Comte, Satoshi Ohtake, Hideo Fujiwara, Michel Renovell
    Electrical Behavior of GOS Fault affected Domino Logic Cell. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:183-189 [Conf]
  38. Muhsen Aljada, Adam Osseiran, Kamal Alameh
    Catastrophic and Parametric Fault Modelling for Photonic Systems. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:190-196 [Conf]
  39. Masaki Hashizume, Tomomi Nishida, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Yukiya Miura
    Current Testable Design of Resistor String DACs. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:197-200 [Conf]
  40. Min-An Song, Ting-Chun Huang, Sy-Yen Kuo
    A Functional Verification Environment for Advanced Switching Architecture. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:201-204 [Conf]
  41. Vineetha Kalavally, Tin Win, Malin Premaratne
    Crosstalk in Counter-Pumped Distributed Raman Amplifiers with DTDM pumping. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:205-209 [Conf]
  42. Haijun Mo, Ping Huang, Shaowei Wu
    Study on Dynamic Stability of a Tracked Robot Climbing over an Obstacle or Descending Stairs. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:210-213 [Conf]
  43. Francisco Poza, Perfecto Mariño, Santiago Otero, Fernando Machado
    Virtual Instrument for Condition Monitoring of On-Load Tap Change. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:214-218 [Conf]
  44. Madhu Bhaskaran, Sharath Sriram, Aleksandar Stojcevski, Aladin Zayegh
    Design & Simulation of a High Performance Rail-to-Rail CMOS Op-Amp at ± 3V Supply. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:219-222 [Conf]
  45. Bassel Soudan
    Reducing Inductive Coupling Skew in Wide Global Signal Busses. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:223-226 [Conf]
  46. Bruno Girodias, El Mostapha Aboulhamid, Gabriela Nicolescu
    A Platform for Refinement of OS Services for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:227-236 [Conf]
  47. Siew Kei Lam, Mohammed Shoaib, Thambipillai Srikanthan
    Modeling Arbitrator Delay-Area Dependencies in Customizable Instruction Set Processors. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:237-242 [Conf]
  48. M. Holzer, M. Rupp
    Static Code Analysis of Functional Descriptions in SystemC. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:243-248 [Conf]
  49. Mehdi Modarressi, Shaahin Hessabi, Maziar Goudarzi
    A Data Prefetching Mechanism for Object-Oriented Embedded Systems Using Run-Time Profiling. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:249-254 [Conf]
  50. Kingshuk Karuri, Christian Huben, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
    Memory Access Micro-Profiling for ASIP Design. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:255-262 [Conf]
  51. A. D. Payne, Dale A. Carnegie, Adrian A. Dorrington, Michael J. Cree
    Full Field Image Ranger Hardware. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:263-268 [Conf]
  52. Maarten Uijt de Haag, Ananth Vadlamani, Jacob L. Campbell, Jeff Dickman
    Application of Laser Range Scanner Based Terrain Referenced Navigation Systems for Aircraft Guidance. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:269-274 [Conf]
  53. Alex See Kok Bin, Shen Weixiang, Ong Kok Seng, Saravanan Ramanathan, Low I-Wern
    Development of a LabVIEW-based test facility for standalone PV systems. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:275-280 [Conf]
  54. Tan Soon-Hwei, Loh Poh-Yee, Mohd-Shahiman Sulaiman
    A Low-Power High-Speed 1-Mb CMOS SRAM. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:281-288 [Conf]
  55. Rochit Rajsuman
    Innovation In Test: Where Are We. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:289-294 [Conf]
  56. Julien Dalmasso, Marie-Lise Flottes, Bruno Rouzeyre
    Fitting ATE Channels with Scan Chains: a Comparison between a Test Data Compression Technique and Serial Loading of Scan Chains. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:295-300 [Conf]
  57. Tomoyuki Saiki, Hideyuki Ichihara, Tomoo Inoue
    A Reconfigurable Embedded Decompressor for Test Compression. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:301-308 [Conf]
  58. Chung-Kiak Poh, Kamal Alameh
    Improving the Steering Efficiency of 1x4096 Opto-VLSI Processor Using Direct Power Measurement Method. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:309-314 [Conf]
  59. Kaveh Sahba, Kamal E. Alameh, Clifton Smith
    MicroPhotonic Remote Sensor for Perimeter Security. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:315-320 [Conf]
  60. Muhsen Aljada, Kamal Alameh, Khalid Al-Begain
    Distributed Wireless Optical Communications for Humanitarian Assistance in Disasters. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:321-326 [Conf]
  61. Janusz Sosnowski, Marek Poleszak
    On-line Monitoring of Computer systems. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:327-331 [Conf]
  62. Shahram Minaei, Erkan Yüce, Oguzhan Cicekoglu
    Lossless Active Floating Inductance Simulator. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:332-335 [Conf]
  63. K. S. Sainarayanan, J. V. R. Ravindra, M. B. Srinivas
    Minimizing Simultaneous Switching Noise (SSN) using Modified Odd/Even Bus Invert Method. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:336-339 [Conf]
  64. Jiri Haze, Radimir Vrba
    The New Low Power 10-bit Pipelined ADC Using Novel Background Calibration Technique. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:340-344 [Conf]
  65. Huaikou Miao, Zhicheng Wen
    An Approach to Extending Object-Z with Real-Time. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:345-349 [Conf]
  66. Rong Zheng, Zhenglin Wang, Kamal E. Alameh
    An Opto-VLSI Based Tunable Fiber Ring Laser. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:350-353 [Conf]
  67. B. Sokol, S. V. Yarmolik
    Address Sequences for March Tests to Detect Pattern Sensitive Faults. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:354-360 [Conf]
  68. Takahisa Ohji, Masaaki Sato, Kenji Amei, Masaaki Sakui
    Analytical Study on a New Induction Type Magnetic Levitation System Creating Quasi-Static Lorentz Forces for a Non-Magnetic Sheet Metal. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:361-364 [Conf]
  69. S. C. Mukhopadhyay, C. P. Gooneratne
    Comparison of Electromagnetic Response of Planar Interdigital Sensors: Quality Testing of Pork Meat. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:365-370 [Conf]
  70. Daming Zhang, K. J. Tseng
    Effect of High Permittivity and Core Dimensions on the Permeability Measurement for Mn-Zn Ferrite Cores Used in High-Frequency Transformer. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:371-378 [Conf]
  71. Shibaji Banerjee, Dipanwita Roy Chowdhury
    Built-In Self-Test for Flash Memory Embedded in SoC. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:379-384 [Conf]
  72. Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
    Automatic March Tests Generation for Multi-Port SRAMs. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:385-392 [Conf]
  73. Ashok Sivaji
    Measurements System Analysis. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:393-396 [Conf]
  74. Haihua Liu, Changsheng Xie, Zhouhui Chen, Yi Lei
    Segmentation of Ultrasound Image Based on Morphological Operation and Fuzzy Clustering. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:397-400 [Conf]
  75. Raymond Peterkin, Dan Ionescu
    A Hardware Implementation of Layer 2 MPLS. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:401-404 [Conf]
  76. D. G. Bailey, K. T. Gribbon, C. T. Johnston, Montree Siripruchyanun
    GATOS: A Windowing Operating System for FPGAs. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:405-409 [Conf]
  77. Montree Siripruchyanun
    A Low-Voltage, Low-Power Current-mode Automatic Gain Control (AGC) for Battery-Powered Equipment. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:410-413 [Conf]
  78. Himanshu Thapliyal, Anvesh Ramasahayam, Vivek Reddy Kotha, Kunul Gottimukkula, M. B. Srinivas
    Modified Montgomery Modular Multiplication Using 4: 2 Compressor and CSA Adder. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:414-417 [Conf]
  79. M. Puczko, V. N. Yarmolik
    Designing cryptographic key generators with low power consumption. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:418-421 [Conf]
  80. P. W. Chandana Prasad, Bruce Mills, Ali Assi, S. M. N. Arosha Senanayake, V. C. Prasad
    Evaluation time Estimation for Pass Transistor Logic circuits. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:422-428 [Conf]
  81. Kok Yew Ng, Chee Pin Tan, Rini Akmeliawati
    Tolerance towards sensor failures: an application to a double inverted pendulum. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:429-434 [Conf]
  82. Chee Pin Tan, Ye Chow Kuang, Christopher Edwards
    Robust sensor fault reconstruction using right eigenstructure assignment. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:435-439 [Conf]
  83. Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
    Synthesis of Fault-Tolerant Embedded Systems with Checkpointing and Replication. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:440-447 [Conf]
  84. Minghua Shi, Bin Guo, Amine Bermak
    Redundancy Analysis for Tin Oxide Gas Sensor Array. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:448-454 [Conf]
  85. Donald Bailey
    Harmonic Distortion Measurement using Spectral Warping. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:455-460 [Conf]
  86. Chao-Huang Wei, Hsiang-Chieh Hsiao, Su-Wei Tsai
    Design and Implementation of Multi-Channel Bandpass Filter for Embedded System. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:461-471 [Conf]
  87. Peter J. Green, Desmond P. Taylor
    Implementation of a High Speed Four Transmitter Space-Time Encoder using Field Programmable Gate Array and Parallel Digital Signal Processors. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:466-471 [Conf]
  88. Ahmed Elkammar, Norman Scheinberg, Srinivasa Vemuru
    Bus Encoding Scheme To Eliminate Unwanted Signal Transitions. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:472-480 [Conf]
  89. Adriel Cheng, Atanas N. Parashkevov, Cheng-Chew Lim
    Coverage Measurement for Software Application Testing using Partially Ordered Domains and Symbolic Trajectory Evaluation Techniques. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:481-487 [Conf]
  90. Abdelaziz Ammari, Régis Leveugle, B. Nicolescu, Yvon Savaria
    Evaluation of a Software-Based Error Detection Technique by RT-Level Fault Injection. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:488-493 [Conf]
  91. Jae-Kyu Chun, Seok-Hyung Cho
    Performance and Stability Testing of MSMQ in the .NET environment.. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:494-502 [Conf]
  92. Lau Bei Yer, Vineetha Kalavally, Tin Win, Malin Premaratne
    Supervisory Signal Transmission in Distributed Raman Amplifiers. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:503-506 [Conf]
  93. Swee M. Mok, Chi-haur Wu
    Automation Integration with UPnP Modules. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:507-511 [Conf]
  94. Tiong Sieh Kiong, Johnny Koh, Mahamod Ismail, Azmi Hassan
    Downlink Capacity Improvement of WCDMA System by Using Adaptive Antenna with Novel MDPC Beamforming Technique. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:512-518 [Conf]
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The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
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