Conferences in DBLP
Gerard J. Holzmann From Code to Models. [Citation Graph (0, 0)][DBLP ] Conf ] Jeff Kramer Making Meaningful Models for Mere Mortal. [Citation Graph (0, 0)][DBLP ] Conf ] Jerry R. Burch , Roberto Passerone , Alberto L. Sangiovanni-Vincentelli Overcoming Heterophobia: Modeling Concurrency in Heterogeneous Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas Arts , Izak van Langevelde Correct Performance of Transaction Capabilities. [Citation Graph (0, 0)][DBLP ] Conf ] Wlodzimierz M. Zuberek Analysis of Performance Limitations in Multithreaded Multiprocessor Architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Jan Jürjens Abstracting from Failure Probabilities. [Citation Graph (0, 0)][DBLP ] Conf ] Fei Xia , Ian G. Clark Algorithms for Signal and Message Asynchronous Communication Mechanisms and Their Analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Sibylle Peuker Property Preserving Transition Refinement with Concurrent Runs: An Example. [Citation Graph (0, 0)][DBLP ] Conf ] Jonathan Burton , Maciej Koutny , Giuseppe Pappalardo Implementing Communicating Processes in the Event of Interface Difference. [Citation Graph (0, 0)][DBLP ] Conf ] Stanislav Chachkov , Didier Buchs From Formal Specifications to Ready-to-Use Software Components: The Concurrent Object Oriented Petri Net Approach. [Citation Graph (0, 0)][DBLP ] Conf ] Ricardo Jorge Machado , João M. Fernandes A Petri Net Meta-Model to Develop Software Components for Embedded Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Martin Grajcar Strength and Weaknesses of Genetic List Scheduling for Heterogeneous Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Charles Andre , Frédéric Boulanger , Alain Girault Software Implementation of Synchronous Programs. [Citation Graph (0, 0)][DBLP ] Conf ] Klaus Schneider Embedding Imperative Synchronous Languages in Interactive Theorem Provers. [Citation Graph (0, 0)][DBLP ] Conf ] Josep Carmona , Jordi Cortadella , Enric Pastor A structural encoding technique for the synthesis of asynchronous circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Oscar Garnica , Juan Lanchares , Román Hermida Optimization of Asynchronous Delay-Insensitive Pipeline Latency Using Stage Reorganization and Optimal Stage Parameter Estimation. [Citation Graph (0, 0)][DBLP ] Conf ] Nikolai Starodoubtsev , Sergei Bystrov , Michael V. Goncharov , Ilya V. Klotchkov , Alexander B. Smirnov Towards Synthesis of Monotonic Asynchronous Circuits from Signal Transition Graphs. [Citation Graph (0, 0)][DBLP ] Conf ] Radu Negulescu , Xiaohua Kong Semi-Hiding Operators and the Analysis of Active-Edge Specifications for Digital Circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Juhana Helovuo , Sari Leppänen Exploration Testing. [Citation Graph (0, 0)][DBLP ] Conf ] Louise Lorentsen , Lars Michael Kristensen Exploiting Stabilizers and Parallelism in State Space Generation with the Symmetry Method. [Citation Graph (0, 0)][DBLP ] Conf ] Miguel J. Hornos , Manuel I. Capel Automata Generation for On-the-fly Automatic Verification Using Formulas of an Interval Logic. [Citation Graph (0, 0)][DBLP ] Conf ] Michael Baldamus , Klaus Schneider The BDD Space Complexity of Different Forms of Concurrency. [Citation Graph (0, 0)][DBLP ] Conf ] Marta Pietkiewicz-Koutny Synthesis of Net Systems with Inhibitor Arcs from Step Transition Systems. [Citation Graph (0, 0)][DBLP ] Conf ] 