Conferences in DBLP
Grant Martin The Reality of System Design Today: Do Theory and Practice Meet? [Citation Graph (0, 0)][DBLP ] Conf ] P. S. Thiagarajan Cyclic Communicating Processes: Hierarchy and Verification. [Citation Graph (0, 0)][DBLP ] Conf ] Ian Oliver Model Driven Embedded Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Jean-Pierre Talpin , Paul Le Guernic , Sandeep K. Shukla , Rajesh K. Gupta , Frederic Doucet Polychrony for Formal Refinement-Checking in a System-Level Design Methodology. [Citation Graph (0, 0)][DBLP ] Conf ] Xi Chen , Harry Hsieh , Felice Balarin , Yosinori Watanabe Case Studies of Model Checking for Embedded System Designs. [Citation Graph (0, 0)][DBLP ] Conf ] Jordi Cortadella , Alex Kondratyev , Luciano Lavagno , Yosinori Watanabe Quasi-Static Scheduling for Concurrent Architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Yves Bontemps , Pierre-Yves Schobbens Synthesis of Open Reactive Systems from Scenario-Based Specifications. [Citation Graph (0, 0)][DBLP ] Conf ] Victor Khomenko , Maciej Koutny , Alexandre Yakovlev Detecting State Coding Conflicts in STG Unfoldings Using SAT. [Citation Graph (0, 0)][DBLP ] Conf ] Javier Esparza A Polynomial-Time Algorithm for Checking Consistency of Free-Choice Signal Transition Graphs. [Citation Graph (0, 0)][DBLP ] Conf ] Mohammad Reza Mousavi , Michel A. Reniers , Twan Basten , Michel R. V. Chaudron Separation of Concerns in the Formal Design of Real-Time Shared Data-Space Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Didier Buchs , Stanislav Chachkov , David Hurzeler Modelling a Secure, Mobile, and Transactional System with CO-OPN. [Citation Graph (0, 0)][DBLP ] Conf ] Laure Petrucci , Jonathan Billington , Lars Michael Kristensen , Zahid H. Qureshi Developing a Formal Specification for the Mission System of a Maritime Surveillance Aircraft. [Citation Graph (0, 0)][DBLP ] Conf ] Vincent Beaudenon , Emmanuelle Encrenaz , Jean Lou Desbarbieux Design Validation of ZCSP with SPIN. [Citation Graph (0, 0)][DBLP ] Conf ] Paolo Ballarini , Lorenzo Capra , Giuliana Franceschinis , Massimiliano De Pierro Memory Fault Tolerance Software Mechanisms: Design and Configuration Support through SWN Models. [Citation Graph (0, 0)][DBLP ] Conf ] Sotiris Moschoyiannis , Michael W. Shields Component-Based Design: Towards Guided Composition. [Citation Graph (0, 0)][DBLP ] Conf ] Elisabeth Pelz , Hans Fleischhack Compositional High Level Petri Nets with Timing Constraints - A Comparison. [Citation Graph (0, 0)][DBLP ] Conf ] Roberto Gorrieri , Fabio Martinelli , Marinella Petrocchi , Anna Vaccarelli Compositional Verification of Integrity for Digital Stream Signature Protocols. [Citation Graph (0, 0)][DBLP ] Conf ] Henri Hansen , Heikki Virtanen , Antti Valmari Merging State-Based and Action-Based Verification. [Citation Graph (0, 0)][DBLP ] Conf ] Abhik Roychoudhury , P. S. Thiagarajan Communicating Transaction Processes. [Citation Graph (0, 0)][DBLP ] Conf ] Adrianna Alexander , Wolfgang Reisig Logic of Involved Variables - System Specification with Temporal Logic of Distributed Actions. [Citation Graph (0, 0)][DBLP ] Conf ] João Paulo Barros , Luís Gomes Modifying Petri Net Models by Means of Crosscutting Operations. [Citation Graph (0, 0)][DBLP ] Conf ] Tuomo Pyhälä , Keijo Heljanko Specification Coverage Aided Test Selection. [Citation Graph (0, 0)][DBLP ] Conf ] Jaco van de Pol , Miguel Valero Espada Verification of JavaSpacesTM Parallel Programs. [Citation Graph (0, 0)][DBLP ] Conf ] Luís Gomes , Anikó Costa On Lifting of Statechart Structuring Mechanisms. [Citation Graph (0, 0)][DBLP ] Conf ] Hermenegilda Macià , Valentín Valero Ruiz , Fernando Cuartero , Fernando L. Pelayo A New Synchronization in Finite Stochastic Petri Box Calculus. [Citation Graph (0, 0)][DBLP ] Conf ] Roman Jokl , Stanislav Racek C-Sim version 5.0. [Citation Graph (0, 0)][DBLP ] Conf ] Jean-Louis Boulanger ABTOOLS: Another B Tool. [Citation Graph (0, 0)][DBLP ] Conf ] Dag Björklund , Johan Lilius , Ivan Porres Rialto Profile in the SMW Toolkit. [Citation Graph (0, 0)][DBLP ] Conf ] Boualem Benatallah , Piotr Chrzastowski-Wachtel , Rachid Hamadi , Milton O'Dell , Adi Susanto HiWorD: A Petri Net-Based Hierarchical Workflow Designer. [Citation Graph (0, 0)][DBLP ] Conf ] Sander Stuijk , Twan Basten , Jan Ypma CAST - A Task-Level Concurrency Analysis Tool. [Citation Graph (0, 0)][DBLP ] Conf ] Federico Crazzolara , Giuseppe Milicia A Framework for the Development of Protocols. [Citation Graph (0, 0)][DBLP ] Conf ] Ammar Aljer , Philippe Devienne , Sophie Tison , Jean-Louis Boulanger , Georges Mariano BHDL: Circuit Design in B. [Citation Graph (0, 0)][DBLP ] Conf ] Agnes Madalinski CONFRES: Interactive Coding Conflict Resolver Based on Core Visualisation. [Citation Graph (0, 0)][DBLP ] Conf ] María-del-Mar Gallardo , Jesús Martínez , Pedro Merino , Ernesto Pimentel Abstract Model Checking and Refinement of Temporal Logic in aSPIN. [Citation Graph (0, 0)][DBLP ] Conf ] Juan José Sánchez Penas , Thomas Arts VoDkaV Tool: Model Checking for Extracting Global Scheduler Properties from Local Restrictions. [Citation Graph (0, 0)][DBLP ] Conf ] Jan Romberg , Jan Jürjens , Guido Wimmel , Oscar Slotosch , Gabor Hahn AutoFOCUS and the MoDe Tool. [Citation Graph (0, 0)][DBLP ] Conf ] 