Conferences in DBLP

Field-Programmable Custom Computing Machines (FCCM) (fccm)
1995 (conf/fccm/1995)

1. Art Lew, Richard P. Halverson Jr.
   A FCCM for dataflow (spreadsheet) programs. [Citation Graph (0, 0)][DBLP]
   FCCM, 1995, pp:2-10 [Conf]
   
2. Thomas H. Drayer, Joseph G. Tront, William E. King IV, Richard W. Conners
   MORRPH: a modular and reprogrammable real-time processing hardware. [Citation Graph (0, 0)][DBLP]
   FCCM, 1995, pp:11-19 [Conf]
   
3. Javier Moran Carrera, Eduardo Juarez Martinez, S. A. Fernandez, J. M. M. Chaus
   Architecture of a FPGA-based coprocessor: the PAR-1. [Citation Graph (0, 0)][DBLP]
   FCCM, 1995, pp:20-31 [Conf]
   
4. Rick Amerson, Richard J. Carter, W. Bruce Culbertson, Philip Kuekes, Greg Snider
   Teramac-configurable custom computing. [Citation Graph (0, 0)][DBLP]
   FCCM, 1995, pp:32-38 [Conf]
   
5. Brian A. Box, J. Nieznanski
   Common processor element packaging for CHAMP. [Citation Graph (0, 0)][DBLP]
   FCCM, 1995, pp:39-44 [Conf]
   
6. H. Högl, Andreas Kugel, J. Ludvig, Reinhard Männer, K. H. Noffz, R. Zoz
   Enable ++: A Second Generation FPGA Processor. [Citation Graph (0, 0)][DBLP]
   FCCM, 1995, pp:45-55 [Conf]
   
7. Chun-Chao Yeh, Chun-Hsing Wu, Jie-Yong Juang
   Design and implementation of a multicomputer interconnection network using FPGAs. [Citation Graph (0, 0)][DBLP]
   FCCM, 1995, pp:56-60 [Conf]
   
8. Jianmin Li, Chung-Kuan Cheng
   Routability improvement using dynamic interconnect architecture. [Citation Graph (0, 0)][DBLP]
   FCCM, 1995, pp:61-67 [Conf]
   
9. Kazuhiro Hayashi, Toshiaki Miyazaki, Kazuhiro Shirakawa, Kazuhisa Yamada, Naohisa Ohta
   Reconfigurable real-time signal transport system using custom FPGAs. [Citation Graph (0, 0)][DBLP]
   FCCM, 1995, pp:68-77 [Conf]
   
10. James D. Hadley, Brad L. Hutchings
    Design methodologies for partially reconfigured systems. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:78-84 [Conf]
    
11. Brian Schoner, Chris Jones, John D. Villasenor
    Issues in wireless video coding using run-time-reconfigurable FPGAs. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:85-89 [Conf]
    
12. Eric Lemoine, David Merceron
    Run time reconfiguration of FPGA for scanning genomic databases. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:90-98 [Conf]
    
13. Michael J. Wirthlin, Brad L. Hutchings
    A dynamic instruction set computer. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:99-109 [Conf]
    
14. Richard W. Wieler, Zaifu Zhang, Robert D. McLeod
    Emulating static faults using a Xilinx based emulator. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:110-115 [Conf]
    
15. Michael Dao, Todd A. Cook, Deborah Silver, Paul S. D'Urbano
    Acceleration of template-based ray casting for volume visualization using FPGAs. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:116-124 [Conf]
    
16. Mark Shand
    Flexible image acquisition using reconfigurable hardware. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:125-135 [Conf]
    
17. David R. Galloway
    The Transmogrifier C hardware description language and compiler for FPGAs. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:136-144 [Conf]
    
18. Satnam Singh
    Architectural descriptions for FPGA circuits. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:145-154 [Conf]
    
19. Nabeel Shirazi, Al Walters, Peter M. Athanas
    Quantitative analysis of floating point arithmetic on FPGA based custom computing machines. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:155-163 [Conf]
    
20. W. Luk
    A declarative approach to incremental custom computing. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:164-172 [Conf]
    
21. Christian Iseli, Eduardo Sanchez
    A C++ compiler for FPGA custom execution units synthesis. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:173-179 [Conf]
    
22. Nathan Sitkoff, Michael E. Wazlowski, Aaron Smith, Harvey F. Silverman
    Implementing a genetic algorithm on a parallel custom computing machine. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:180-189 [Conf]
    
23. Russell D. Meier
    Rapid prototyping of a RISC architecture for implementation in FPGAs. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:190-196 [Conf]
    
24. H. A. Chow, Hussein M. Alnuweiri, Steve Casselman
    FPGA-based transformable computers for fast digital signal processing. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:197-203 [Conf]
    
25. Nalini K. Ratha, Anil K. Jain, Diane T. Rover
    Convolution on Splash 2. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:204-213 [Conf]
    
26. Herman Schmit, Donald E. Thomas
    Hidden Markov modeling and fuzzy controllers in FPGAs. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:214-221 [Conf]