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Conferences in DBLP

World Congress on Formal Methods (FM) (fm)
1996 (conf/fm/1996)

  1. C. A. R. Hoare
    How Did Software Get So Reliable Without Proof? [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:1-17 [Conf]
  2. Terje Sivertsen
    A Case Study on the Formal Development of a Reactor Safety System. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:18-38 [Conf]
  3. Jan Peleska
    Test Automation for Safety-Critical Systems: Industrial Application and Future Developments. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:39-59 [Conf]
  4. Juan Bicarregui, Jeremy Dick, Eoin Woods
    Quantitative Analysis of an Application of Formal Methods. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:60-73 [Conf]
  5. Jonathan Hoare, Jeremy Dick, David Neilson, Ib Holm Sørensen
    Applying the B Technologies on CICS. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:74-84 [Conf]
  6. Marina A. Waldén, Kaisa Sere
    Refining Action Systems within B-Tool. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:85-104 [Conf]
  7. V. Kasurinen, Kaisa Sere
    Integrating Action Systems and Z in a Medical System Specification. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:105-119 [Conf]
  8. Rix Groenboom, Erik Saaman, Ernest Rotterdam, Gerard R. Renardel de Lavalette
    Formalizing Anaesthesia: a case study in formal specification. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:120-139 [Conf]
  9. Juan-José Martins, Jean-Pierre Hubaux
    A New System Engineering Methodology Coupling Formal Specification and Performance Evaluation. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:140-159 [Conf]
  10. Ben L. Di Vito
    Formalizing New Navigation Requirements for NASA's Space Shuttle. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:160-178 [Conf]
  11. Brigitte Fröhlich, Peter Gorm Larsen
    Combining VDM-SL Specifications with C++ Code. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:179-194 [Conf]
  12. Tim Clement
    Data Reification without Explicit Abstraction Functions. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:195-213 [Conf]
  13. T. M. Brookes, John S. Fitzgerald, Peter Gorm Larsen
    Formal and Informal Specifications of a Secure System Component: Final Results in a Comparative Study. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:214-227 [Conf]
  14. Antti Valmari, Manu Setälä
    Visual Verification of Safety and Liveness. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:228-247 [Conf]
  15. Bernhard Schätz, Heinrich Hußmann, Manfred Broy
    Graphical Development of Consistent System Specifications. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:248-267 [Conf]
  16. Dieter Hutter, Bruno Langenstein, Claus Sengler, Jörg H. Siekmann, Werner Stephan, Andreas Wolpers
    Deduction in the Verification Support Environment (VSE). [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:268-286 [Conf]
  17. Eerke A. Boiten, John Derrick, Howard Bowman, Maarten Steen
    Consistency and Refinement for Partial Specification in Z. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:287-306 [Conf]
  18. Matthias Weber
    Combining Statecharts and Z for the Design of Safety-Critical Control Systems. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:307-326 [Conf]
  19. Colin J. Fidge, Mark Utting, Peter Kearney, Ian J. Hayes
    Integrating Real-Time Scheduling Theory and Program Refinement. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:327-346 [Conf]
  20. Christel Seguin, Virginie Wiels
    Using a Logical and Categorical Approach for the Validation of Fault-Tolerant Systems. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:347-366 [Conf]
  21. Frank S. de Boer, M. van Hulst
    Local Nondeterminism in Asynchronously Communicating Processes. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:367-384 [Conf]
  22. Patrice Chalin, Peter Grogono, Thiruvengadam Radhakrishnan
    Identification of and Solutions to Shortcomings of LCL, a Larch/C Interface Specification Language. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:385-404 [Conf]
  23. Balakrishnan Kannikeswaran, Radharamanan Radhakrishnan, Peter Frey, Perry Alexander, Philip A. Wilsey
    Formal Specification and Verification of the pGVT Algorithm. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:405-424 [Conf]
  24. Rosario Pugliese, Enrico Tronci
    Automatic Verification of a Hydroelectric Power Plant. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:425-444 [Conf]
  25. David M. Jackson
    Experiences in Embedded Scheduling. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:445-464 [Conf]
  26. Bernard Boigelot, Patrice Godefroid
    Model Checking in Practice: An Analysis of the ACCESS.bus Protocol using SPIN. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:465-478 [Conf]
  27. Stephan Kleuker, Hermann Tjabben
    The Incremental Development of Correct Specifications for Distributed Systems. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:479-498 [Conf]
  28. Chris George
    A Theory of Distributing Train Rescheduling. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:499-517 [Conf]
  29. Lihua Shi, Paddy Nixon
    An Improved Translation of SA/RT Specification Model to High-Level Timed Petri Nets. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:518-537 [Conf]
  30. Jan Peleska, Michael Siegel
    From Testing Theory to Test Driver Implementation. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:538-556 [Conf]
  31. Joseph J. Comuzzi, Johnson M. Hart
    Program Slicing Using Weakest Preconditions. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:557-575 [Conf]
  32. Paulo S. C. Alencar, Donald D. Cowan, Carlos José Pereira de Lucena
    A Formal Approach to Architectural Design Patterns. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:576-594 [Conf]
  33. Job Zwiers, Ulrich Hannemann, Yassine Lakhnech, Willem P. de Roever, Frank A. Stomp
    Modular Completeness: Integrating the Reuse of Specified Software in Top-down Program Development. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:595-608 [Conf]
  34. Jürgen Bohn, Wil Janssen
    A Strategic Approach to Transformational Design. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:609-628 [Conf]
  35. Kolyang, Thomas Santen, Burkhart Wolff
    Correct and User-Friendly Implementations of Transformation Systems. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:629-648 [Conf]
  36. André Arnold, Didier Bégay, Jean-Pierre Radoux
    An Example of Use of Formal Methods to Debug an Embedded Software. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:649-661 [Conf]
  37. Klaus Havelund, Natarajan Shankar
    Experiments in Theorem Proving and Model Checking for Protocol Verification. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:662-681 [Conf]
  38. Farn Wang, Chia-Tien Dan Lo
    Procedure-Level Verification of Real-time Concurrent Systems. [Citation Graph (0, 0)][DBLP]
    FME, 1996, pp:682-701 [Conf]
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