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Conferences in DBLP
- Daniel Jackson
Lightweight Formal Methods. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:1- [Conf]
- Françoise Bellegarde, Christophe Darlot, Jacques Julliand, Olga Kouchnarenko
Reformulation: A Way to Combine Dynamic Properties and B Refinement. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:2-19 [Conf]
- Steffen Helke, Thomas Santen
Mechanized Analysis of Behavioral Conformance in the Eiffel Base Libraries. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:20-42 [Conf]
- Joseph E. Stoy, Xiaowei Shen, Arvind
Proofs of Correctness of Cache-Coherence Protocols. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:43-71 [Conf]
- Marsha Chechik, Steve M. Easterbrook, Victor Petrovykh
Model-Checking over Multi-valued Logics. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:72-98 [Conf]
- Michael Leuschel, Thierry Massart, Andrew Currie
How to Make FDR Spin LTL Model Checking of CSP by Refinement. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:99-118 [Conf]
- Fabrice Derepas, Paul Gastin, David Plainfossé
Avoiding State Explosion for Distributed Systems with Timestamps. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:119-134 [Conf]
- Jan Jürjens
Secrecy-Preserving Refinement. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:135-152 [Conf]
- Heiko Mantel
Information Flow Control and Applications - Bridging a Gap. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:153-172 [Conf]
- Vangalur S. Alagar, Zheng Xi
A Rigorous Approach to Modeling and Analyzing E-Commerce Architectures. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:173-196 [Conf]
- Nalini Venkatasubramanian, Carolyn L. Talcott, Gul Agha
A Formal Model for Reasoning about Adaptive QoS-Enabled Middleware. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:197-221 [Conf]
- Jayadev Misra
A Programming Model for Wide-Area Computing. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:222- [Conf]
- Andres Flores, Richard Moore, Luis Reynoso
A Formal Model of Object-Oriented Design and GoF Design Patterns. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:223-241 [Conf]
- Sophie Dupuy-Chessa, Lydie du Bousquet
Validation of UML Models Thanks to Z and Lustre. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:242-258 [Conf]
- Claus Pahl
Components, Contracts, and Connectors for the Unified Modelling Language UML. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:259-277 [Conf]
- Adnan Sherif, Augusto Sampaio, Sérgio Cavalcante
An Integrated Approach to Specification and Validation of Real-Time Systems. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:278-299 [Conf]
- Stephen Paynter
Real-Time Logic Revisited. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:300-317 [Conf]
- Dirk Beyer
Improvements in BDD-Based Reachability Analysis of Timed Automata. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:318-343 [Conf]
- Leila Silva, Augusto Sampaio, Geraint Jones
Serialising Parallel Processes in a Hardware/Software Partitioning Context. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:344-363 [Conf]
- Jonathan Burton, Maciej Koutny, Giuseppe Pappalardo
Verifying Implementation Relations. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:364-383 [Conf]
- Muffy Calder, Savi Maharaj, Carron Shankland
An Adequate Logic for Full LOTOS. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:384-395 [Conf]
- Mícheál Mac an Airchinnigh
Towards a Topos Theoretic Foundation for the Irish School of Constructive Mathematics. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:396-418 [Conf]
- Shmuel Katz
Faithful Translations among Models and Specifications. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:419-434 [Conf]
- Simon L. Peyton Jones
Composing Contracts: An Adventure in Financial Engineering. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:435- [Conf]
- Manuel J. Fernández Iglesias, Francisco J. González-Castaño, José M. Pousada Carballo, Martín Llamas Nistal, Alberto Romero Feijoo
From Complex Specifications to a Working Prototype. A Protocol Engineering Case Study. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:436-448 [Conf]
- Laurent Arditi, Hédi Boufaïed, Arnaud Cavanié, Vincent Stehlé
Coverage Directed Generation of System-Level Test Cases for the Validation of a DSP System. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:449-464 [Conf]
- Odile Laurent, Pierre Michel, Virginie Wiels
Using Formal Verification Techniques to Reduce Simulation and Test Effort. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:465-477 [Conf]
- Pieter H. Hartel, Michael J. Butler, Eduard de Jong, Mark Longley
Transacted Memory for Smart Cards. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:478-499 [Conf]
- Cormac Flanagan, K. Rustan M. Leino
Houdini, an Annotation Assistant for ESC/Java. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:500-517 [Conf]
- Dragan Bosnacki, Dennis Dams, Leszek Holenderski
A Heuristic for Symmetry Reductions with Scalarsets. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:518-533 [Conf]
- Michael Johnson, Robert D. Rosebrugh
View Updatability Based on the Models of a Formal Specification. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:534-549 [Conf]
- Ralf Lämmel
Grammar Adaptation. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:550-570 [Conf]
- Bernhard K. Aichernig
Test-Case Calculation through Abstraction. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:571-589 [Conf]
- Marielle Doche, Isabelle Vernier-Mounier, Fabrice Kordon
A Modular Approach to the Specification and Validation of an Electrical Flight Control System. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:590-610 [Conf]
- Natasha Sharygina, Doron Peled
A Combined Testing and Verification Approach for Software Reliability. [Citation Graph (0, 0)][DBLP]
FME, 2001, pp:611-628 [Conf]
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