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Conferences in DBLP

Formal Methods in Computer-Aided Design (FMCAD) (fmcad)
2002 (conf/fmcad/2002)

  1. Thomas F. Melham, Robert B. Jones
    Abstraction by Symbolic Indexing Transformations. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:1-18 [Conf]
  2. Satyaki Das, David L. Dill
    Counter-Example Based Predicate Discovery in Predicate Abstraction. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:19-32 [Conf]
  3. Pankaj Chauhan, Edmund M. Clarke, James H. Kukula, Samir Sapra, Helmut Veith, Dong Wang
    Automated Abstraction Refinement for Model Checking Large State Spaces Using SAT Based Conflict Analysis. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:33-51 [Conf]
  4. In-Ho Moon, Hee-Hwan Kwak, James H. Kukula, Thomas R. Shiple, Carl Pixley
    Simplifying Circuits for Formal Verification Using Parametric Representation. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:52-69 [Conf]
  5. Jin Yang, Carl-Johan H. Seger
    Generalized Symbolic Trajectory Evaluation - Abstraction in Action. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:70-87 [Conf]
  6. Fabio Somenzi, Kavita Ravi, Roderick Bloem
    Analysis of Symbolic SCC Hull Algorithms. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:88-105 [Conf]
  7. Chao Wang, Gary D. Hachtel
    Sharp Disjunctive Decomposition for Language Emptiness Checking. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:106-122 [Conf]
  8. Mark Aagaard, Nancy A. Day, Meng Lou
    Relating Multi-step and Single-Step Microprocessor Correctness Statements. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:123-141 [Conf]
  9. Shuvendu K. Lahiri, Sanjit A. Seshia, Randal E. Bryant
    Modeling and Verification of Out-of-Order Microprocessors in UCLID. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:142-159 [Conf]
  10. Ofer Strichman
    On Solving Presburger and Linear Arithmetic with SAT. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:160-170 [Conf]
  11. Vijay Ganesh, Sergey Berezin, David L. Dill
    Deciding Presburger Arithmetic by Model Checking and Comparisons with Other Methods. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:171-186 [Conf]
  12. Abdelwaheb Ayari, David A. Basin
    QUBOS: Deciding Quantified Boolean Logic Using Propositional Satisfiability Solvers. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:187-201 [Conf]
  13. Giuseppe Della Penna, Benedetto Intrigila, Enrico Tronci, Marisa Venturini Zilli
    Exploiting Transition Locality in the Disk Based Mur phi Verifier. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:202-219 [Conf]
  14. Marc Solé, Enric Pastor
    Traversal Techniques for Concurrent Systems. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:220-237 [Conf]
  15. Alan M. Frisch, Daniel Sheridan, Toby Walsh
    A Fixpoint Based Encoding for Bounded Model Checking. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:238-255 [Conf]
  16. Gianfranco Ciardo, Radu Siminiceanu
    Using Edge-Valued Decision Diagrams for Symbolic Generation of Shortest Paths. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:256-273 [Conf]
  17. Jun Sawada, Ruben Gamboa
    Mechanical Verification of a Square Root Algorithm Using Taylor's Theorem. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:274-291 [Conf]
  18. Prosenjit Chatterjee, Ganesh Gopalakrishnan
    A Specification and Verification Framework for Developing Weak Shared Memory Consistency Protocols. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:292-309 [Conf]
  19. Meine van der Meulen
    Model Checking the Design of an Unrestricted, Stuck-at Fault Tolerant, Asynchronous Sequential Circuit Using SMV. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:310-323 [Conf]
  20. Richard Sharp
    Functional Design Using Behavioural and Structural Components. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:324-341 [Conf]
  21. Steve McKeever, Wayne Luk, Arran Derbyshire
    Compiling Hardware Descriptions with Relative Placement Information for Parametrised Libraries. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:342-359 [Conf]
  22. Josep Carmona, Jordi Cortadella
    Input/Output Compatibility of Reactive Systems. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:360-377 [Conf]
  23. David Harel, Hillel Kugler, Rami Marelly, Amir Pnueli
    Smart Play-out of Behavioral Requirements. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2002, pp:378-398 [Conf]
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