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Conferences in DBLP

Formal Techniques for Networked and Distributed Systems / (forte)
1992 (conf/forte/1992)

  1. L. Doldi, P. Gauthier
    VEDA 2: Power to the protocol designers. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:3-13 [Conf]
  2. Heinrich Nirschl, Jacqueline Blanchard, Bernard Loyer
    LOTOS in Alcatel. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:15-22 [Conf]
  3. David Cohen, Norman Dorn
    An Experiment in Analyzing Switch Recovery Procedures. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:23-34 [Conf]
  4. Muffy Thomas
    A translator for ASN.1 into LOTOS. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:37-52 [Conf]
  5. Alexandre Marcos Lins de Vasconcelos, John A. McDermid
    Incremental processing of Z specifications. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:53-69 [Conf]
  6. Piotr Dembinski
    Queueing network model for Estelle. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:73-86 [Conf]
  7. Guy Leduc, Luc Léonard
    A timed LOTOS supporting a dense time domain and including new timed operators. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:87-102 [Conf]
  8. Carlos Miguel, Angel Fernández, Leon Vidaller
    Extending LOTOS towards performance evaluation. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:103-118 [Conf]
  9. Shipei Zhang, Scott A. Smolka
    Towards efficient parallelization of equivalence checking algorithms. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:121-135 [Conf]
  10. Leo Cacciari, Omar Rafiq
    On improving reduced reachability analysis. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:137-152 [Conf]
  11. Jan Bredereke, Reinhard Gotzhein, Friedrich H. Vogt
    Design of a formal Estelle semantics for verification. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:153-168 [Conf]
  12. Patrik Ernberg, Thomas Hovander, Francisco Monfort
    Specification and implementation of an ISDN telephone system using LOTOS. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:171-186 [Conf]
  13. Marc Andreu, Michèle Haziza, Claude Jard, Jean-Marc Jézéquel
    Analyzing a space-protocol: from specification, simulation to experimentation. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:187-198 [Conf]
  14. Clara DaSilva, Babak Dehbonei, Fernando Mejia
    Formal specification in the development of industrial applications: Subway speed control system. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:199-213 [Conf]
  15. Gul Agha
    Formal methods for Actor systems: A progress report. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:217-228 [Conf]
  16. Harro Kremer, Jeroen van de Lagemaat, Axel Rennoch, Giuseppe Scollo
    Protocol design using LOTOS: A critical synthesis of a standardization experience. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:231-246 [Conf]
  17. F. J. Carrasco, J. J. Gil
    A method for specifying and validating communication protocols in LOTOS. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:247-262 [Conf]
  18. Lynn S. Marshall, Linda Simon
    Using VDM to specify managed object relationships. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:263-278 [Conf]
  19. Günter Karjoth
    Generating transition graphs from LOTOS specifications. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:281-294 [Conf]
  20. Henk Eertink, Dietmar Wolz
    Symbolic execution of LOTOS specifications. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:295-310 [Conf]
  21. Mazen Haj-Hussein, Luigi Logrippo, Jacques Sincennes
    Goal oriented execution for LOTOS. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:311-327 [Conf]
  22. Rom Langerak
    Bundle event structures: a non-interleaving semantics for LOTOS. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:331-346 [Conf]
  23. Rosvelter João Coelho da Costa, Jean-Pierre Courtiat
    A true concurrency semantics for LOTOS. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:347-362 [Conf]
  24. Colin J. Fidge
    A constraint-oriented real-time process calculus. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:363-378 [Conf]
  25. Finn Kristoffersen, Louis Verhaard, Michael Zeeberg
    Test derivation for SDL based on ACTs. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:381-396 [Conf]
  26. Noriyasu Arakawa, Marc Phalippou, Nathalie Risser, Terunao Soneoka
    Combination of conformance and interoperability testing. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:397-412 [Conf]
  27. Juan I. Sanz
    Using FDTs in the development of a PICS editor. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:413-427 [Conf]
  28. Tommaso Bolognesi
    The electric power of LOTOS - Results of a joint academic/industrial experiment. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:431-446 [Conf]
  29. Anders Børjesson, Kim Guldstrand Larsen, Arne Skou
    Generality in design and compositional verification using TAV. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:449-464 [Conf]
  30. Esfandiar Haghverdi, K. Inan
    Verification by consecutive projections. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:465-478 [Conf]
  31. Ketil Stølen
    Shared-state design modulo weak and strong process fairness. [Citation Graph (0, 0)][DBLP]
    FORTE, 1992, pp:479-498 [Conf]
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