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International Conference on Evolvable Systems (ICES) (ices)
1998 (conf/ices/1998)

  1. Isamu Kajitani, Tsutomu Hoshino, Daisuke Nishikawa, Hiroshi Yokoi, Shougo Nakaya, Tsukasa Yamauchi, Takeshi Inuo, Nobuki Kajihara, Masaya Iwata, Didier Keymeulen, Tetsuya Higuchi
    A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:1-12 [Conf]
  2. Adrian Thompson
    On the Automatic Design of Robust Electronics Through Artificial Evolution. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:13-24 [Conf]
  3. Julian F. Miller, Peter Thomson
    Aspects of Digital Evolution: Geometry and Learning. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:25-35 [Conf]
  4. Ernesto Damiani, Valentino Liberali, Andrea Tettamanzi
    Evolutionary Design of Hashing Function Circuits Using an FPGA. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:36-46 [Conf]
  5. Paul J. Layzell
    A New Research Tool for Intrinsic Hardware Evolution. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:47-56 [Conf]
  6. Jim Torresen
    A Divide-and-Conquer Approach to Evolvable Hardware. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:57-65 [Conf]
  7. Lorenz Huelsbergen, Edward A. Rietman, Robert Slous
    Evolution of Astable Multivibrators in Silico. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:66-77 [Conf]
  8. Tatiana Kalganova, Julian F. Miller, Terence C. Fogarty
    Some Aspects of an Evolvable Hardware Approach for Multiple-Valued Combinational Circuit Design. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:78-89 [Conf]
  9. Vesselin K. Vassilev, Terence C. Fogarty
    Adaptation in Co-evolving Non-uniform Cellular Automata. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:90-97 [Conf]
  10. Chaiyasit Manovit, Chatchawit Aporntewan, Prabhas Chongstitvatana
    Synthesis of Synchronous Sequential Logic Circuits from Partial Input/Output Sequences. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:98-105 [Conf]
  11. Masaharu Tanaka, Hidenori Sakanashi, Mehrdad Salami, Masaya Iwata, Takio Kurita, Tetsuya Higuchi
    Data Compression for Digital Color Electrophotographic Printer with Evolvable Hardware. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:106-114 [Conf]
  12. Tomofumi Hikage, Hitoshi Hemmi, Katsunori Shimohara
    Comparison of Evolutionary Methods for Smoother Evolution. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:115-124 [Conf]
  13. Jason D. Lohn, Silvano Colombano
    Automated Analog Circuit Sythesis Using a Linear Representation. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:125-133 [Conf]
  14. Masahiro Murakawa, Shuji Yoshizawa, Toshio Adachi, Shiro Suzuki, Kaoru Takasuka, Masaya Iwata, Tetsuya Higuchi
    Analogue EHW Chip for Intermediate Frequency Filters. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:134-143 [Conf]
  15. Stuart J. Flockton, Kevin Sheehan
    Intrinsic Circuit Evolution Using Programmable Analogue Arrays. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:144-153 [Conf]
  16. Ricardo Salem Zebulum, Marco Aurélio Cavalcanti Pacheco, Marley B. R. Vellasco
    Analog Circuits Evolution in Extrinsic and Intrinsic Modes. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:154-165 [Conf]
  17. Adrian Stoica, Alex S. Fukunaga, Ken Hayworth, Carlos Salazar-Lazaro
    Evolvable Hardware for Space Applications. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:166-173 [Conf]
  18. Daniel Mange, André Stauffer, Gianluca Tempesti
    Embryonics: A Macroscopic View of the Cellular Architecture. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:174-184 [Conf]
  19. Daniel Mange, André Stauffer, Gianluca Tempesti
    Embryonics: A Microscopic View of the Molecular Architecture. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:185-195 [Conf]
  20. André Stauffer, Moshe Sipper
    Modeling Cellular Development Using L-Systems. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:196-205 [Conf]
  21. Cesar Ortega-Sanchez, Andrew M. Tyrrell
    MUXTREE Revisited: Embryonics as a Reconfiguration Strategy in Fault-Tolerant Processor Arrays. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:206-217 [Conf]
  22. Hiroaki Kitano
    Building Complex Systems Using Developmental Process: An Engineering Approach. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:218-229 [Conf]
  23. Herbert Peremans, V. Ashley Walker, G. Papadopoulos, John Hallam
    Evolving Batlike Pinnae for Target Localisation by an Echolocator. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:230-239 [Conf]
  24. Roger DuBois
    A Biologically Inspired Object Tracking System. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:240-247 [Conf]
  25. Ken Hayworth
    The ``Modeling Clay'' Approach to Bio-inspired Electronic Hardware. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:248-255 [Conf]
  26. Michael Korkin, Norberto Eiji Nawa, Hugo de Garis
    A ``Spike Interval Information Coding'' Representation for ATR's CAM-Brain Machine (CBM). [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:256-267 [Conf]
  27. Erol Gelenbe
    Learning in Genetic Algorithms. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:268-279 [Conf]
  28. Kazuyuki Murase, Takaharu Wakida, Ryoichi Odagiri, Wei Yu, Hirotaka Akita, Tatsuya Asai
    Back-Propagation Learning of Autonomous Behaviour: A Mobile Robot Khepera Took a Lesson from the Future Consequences. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:280-286 [Conf]
  29. Jean-Luc Rebourg, Jean-Denis Muller, Manuel Samuelides
    SPIKE_4096: A Neural Integrated Circuit for Image Segmentation. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:287-294 [Conf]
  30. Ryoichi Odagiri, Wei Yu, Tatsuya Asai, Kazuyuki Murase
    Analysis of the Scenery Perceived by a Real Mobile Robot Khepera. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:295-302 [Conf]
  31. Marc Ebner
    Evolution of a Control Architecture for a Mobile Robot. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:303-310 [Conf]
  32. Pascal Nussbaum, Bernard Girau, Arnaud Tisserand
    Field Programmable Processor Arrays. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:311-322 [Conf]
  33. Kiyoshi Oguri, Norbert Imlig, Hideyuki Ito, Kouichi Nagami, Ryusuke Konishi, Tsunemichi Shiozawa
    General-Purpose Computer Architecture Based on Fully Programmable Logic. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:323-334 [Conf]
  34. Alister Hamilton, Kostis Papathanasiou, Morgan Tamplin, Thomas Brandtner
    Palmo: Field Programmable Analogue and Mixed-Signal VLSI for Evolvable Hardware. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:335-344 [Conf]
  35. Juan Manuel Moreno, Jordi Madrenas, Julio Faura, E. Cantó, Joan Cabestany, Josep Maria Insenser
    Feasible Evolutionary and Self-Repairing Hardware by Means of the Dynamic Reconfiguration Capabilities of the FIPSOC Devices. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:345-355 [Conf]
  36. Philippe Millet, Jean-Claude Heudin
    Fault Tolerance of a Large-Scale MIMD Architecture Using a Genetic Algorithm. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:356-363 [Conf]
  37. Uwe Tangen, John S. McCaskill
    Hardware Evolution with a Massively Parallel Dynamically Reconfigurable Computer: POLYP. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:364-371 [Conf]
  38. Jan J. Mulawka, Magdalena J. Ocwieja
    Molecular Inference via Unidirectional Chemical Reactions. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:372-379 [Conf]
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