Conferences in DBLP
Isamu Kajitani , Tsutomu Hoshino , Daisuke Nishikawa , Hiroshi Yokoi , Shougo Nakaya , Tsukasa Yamauchi , Takeshi Inuo , Nobuki Kajihara , Masaya Iwata , Didier Keymeulen , Tetsuya Higuchi A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI. [Citation Graph (0, 0)][DBLP ] Conf ] Adrian Thompson On the Automatic Design of Robust Electronics Through Artificial Evolution. [Citation Graph (0, 0)][DBLP ] Conf ] Julian F. Miller , Peter Thomson Aspects of Digital Evolution: Geometry and Learning. [Citation Graph (0, 0)][DBLP ] Conf ] Ernesto Damiani , Valentino Liberali , Andrea Tettamanzi Evolutionary Design of Hashing Function Circuits Using an FPGA. [Citation Graph (0, 0)][DBLP ] Conf ] Paul J. Layzell A New Research Tool for Intrinsic Hardware Evolution. [Citation Graph (0, 0)][DBLP ] Conf ] Jim Torresen A Divide-and-Conquer Approach to Evolvable Hardware. [Citation Graph (0, 0)][DBLP ] Conf ] Lorenz Huelsbergen , Edward A. Rietman , Robert Slous Evolution of Astable Multivibrators in Silico . [Citation Graph (0, 0)][DBLP ] Conf ] Tatiana Kalganova , Julian F. Miller , Terence C. Fogarty Some Aspects of an Evolvable Hardware Approach for Multiple-Valued Combinational Circuit Design. [Citation Graph (0, 0)][DBLP ] Conf ] Vesselin K. Vassilev , Terence C. Fogarty Adaptation in Co-evolving Non-uniform Cellular Automata. [Citation Graph (0, 0)][DBLP ] Conf ] Chaiyasit Manovit , Chatchawit Aporntewan , Prabhas Chongstitvatana Synthesis of Synchronous Sequential Logic Circuits from Partial Input/Output Sequences. [Citation Graph (0, 0)][DBLP ] Conf ] Masaharu Tanaka , Hidenori Sakanashi , Mehrdad Salami , Masaya Iwata , Takio Kurita , Tetsuya Higuchi Data Compression for Digital Color Electrophotographic Printer with Evolvable Hardware. [Citation Graph (0, 0)][DBLP ] Conf ] Tomofumi Hikage , Hitoshi Hemmi , Katsunori Shimohara Comparison of Evolutionary Methods for Smoother Evolution. [Citation Graph (0, 0)][DBLP ] Conf ] Jason D. Lohn , Silvano Colombano Automated Analog Circuit Sythesis Using a Linear Representation. [Citation Graph (0, 0)][DBLP ] Conf ] Masahiro Murakawa , Shuji Yoshizawa , Toshio Adachi , Shiro Suzuki , Kaoru Takasuka , Masaya Iwata , Tetsuya Higuchi Analogue EHW Chip for Intermediate Frequency Filters. [Citation Graph (0, 0)][DBLP ] Conf ] Stuart J. Flockton , Kevin Sheehan Intrinsic Circuit Evolution Using Programmable Analogue Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Ricardo Salem Zebulum , Marco Aurélio Cavalcanti Pacheco , Marley B. R. Vellasco Analog Circuits Evolution in Extrinsic and Intrinsic Modes. [Citation Graph (0, 0)][DBLP ] Conf ] Adrian Stoica , Alex S. Fukunaga , Ken Hayworth , Carlos Salazar-Lazaro Evolvable Hardware for Space Applications. [Citation Graph (0, 0)][DBLP ] Conf ] Daniel Mange , André Stauffer , Gianluca Tempesti Embryonics: A Macroscopic View of the Cellular Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Daniel Mange , André Stauffer , Gianluca Tempesti Embryonics: A Microscopic View of the Molecular Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] André Stauffer , Moshe Sipper Modeling Cellular Development Using L-Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Cesar Ortega-Sanchez , Andrew M. Tyrrell MUXTREE Revisited: Embryonics as a Reconfiguration Strategy in Fault-Tolerant Processor Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Hiroaki Kitano Building Complex Systems Using Developmental Process: An Engineering Approach. [Citation Graph (0, 0)][DBLP ] Conf ] Herbert Peremans , V. Ashley Walker , G. Papadopoulos , John Hallam Evolving Batlike Pinnae for Target Localisation by an Echolocator. [Citation Graph (0, 0)][DBLP ] Conf ] Roger DuBois A Biologically Inspired Object Tracking System. [Citation Graph (0, 0)][DBLP ] Conf ] Ken Hayworth The ``Modeling Clay'' Approach to Bio-inspired Electronic Hardware. [Citation Graph (0, 0)][DBLP ] Conf ] Michael Korkin , Norberto Eiji Nawa , Hugo de Garis A ``Spike Interval Information Coding'' Representation for ATR's CAM-Brain Machine (CBM). [Citation Graph (0, 0)][DBLP ] Conf ] Erol Gelenbe Learning in Genetic Algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Kazuyuki Murase , Takaharu Wakida , Ryoichi Odagiri , Wei Yu , Hirotaka Akita , Tatsuya Asai Back-Propagation Learning of Autonomous Behaviour: A Mobile Robot Khepera Took a Lesson from the Future Consequences. [Citation Graph (0, 0)][DBLP ] Conf ] Jean-Luc Rebourg , Jean-Denis Muller , Manuel Samuelides SPIKE_4096: A Neural Integrated Circuit for Image Segmentation. [Citation Graph (0, 0)][DBLP ] Conf ] Ryoichi Odagiri , Wei Yu , Tatsuya Asai , Kazuyuki Murase Analysis of the Scenery Perceived by a Real Mobile Robot Khepera. [Citation Graph (0, 0)][DBLP ] Conf ] Marc Ebner Evolution of a Control Architecture for a Mobile Robot. [Citation Graph (0, 0)][DBLP ] Conf ] Pascal Nussbaum , Bernard Girau , Arnaud Tisserand Field Programmable Processor Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Kiyoshi Oguri , Norbert Imlig , Hideyuki Ito , Kouichi Nagami , Ryusuke Konishi , Tsunemichi Shiozawa General-Purpose Computer Architecture Based on Fully Programmable Logic. [Citation Graph (0, 0)][DBLP ] Conf ] Alister Hamilton , Kostis Papathanasiou , Morgan Tamplin , Thomas Brandtner Palmo: Field Programmable Analogue and Mixed-Signal VLSI for Evolvable Hardware. [Citation Graph (0, 0)][DBLP ] Conf ] Juan Manuel Moreno , Jordi Madrenas , Julio Faura , E. Cantó , Joan Cabestany , Josep Maria Insenser Feasible Evolutionary and Self-Repairing Hardware by Means of the Dynamic Reconfiguration Capabilities of the FIPSOC Devices. [Citation Graph (0, 0)][DBLP ] Conf ] Philippe Millet , Jean-Claude Heudin Fault Tolerance of a Large-Scale MIMD Architecture Using a Genetic Algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Uwe Tangen , John S. McCaskill Hardware Evolution with a Massively Parallel Dynamically Reconfigurable Computer: POLYP. [Citation Graph (0, 0)][DBLP ] Conf ] Jan J. Mulawka , Magdalena J. Ocwieja Molecular Inference via Unidirectional Chemical Reactions. [Citation Graph (0, 0)][DBLP ] Conf ] 