Conferences in DBLP
Christof Teuscher , Mathieu S. Capcarrère On Fireflies, Cellular Systems, and Evolware. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:1-12 [Conf ] Lyudmila Zinchenko , Heinz Mühlenbein , Victor Kureichik , Thilo Mahnig A Comparison of Different Circuit Representations for Evolutionary Analog Circuit Design. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:13-23 [Conf ] Andrew J. Greensted , Andrew M. Tyrrell Fault Tolerance via Endocrinologic Based Communication for Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:24-34 [Conf ] Thorsten Schnier , Xin Yao Using Negative Correlation to Evolve Fault-Tolerant Circuits. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:35-46 [Conf ] Jason D. Lohn , Gregory V. Larchev , Ronald F. DeMara A Genetic Representation for Evolutionary Fault Recovery in Virtex FPGAs. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:47-56 [Conf ] Sanjeev Kumar , Peter J. Bentley Biologically Inspired Evolutionary Development. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:57-68 [Conf ] Gunnar Tufte , Pauline C. Haddow Building Knowledge into Developmental Rules for Circuit Design. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:69-80 [Conf ] Peter J. Bentley Evolving Fractal Proteins. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:81-92 [Conf ] Julian F. Miller , Peter Thomson A Developmental Method for Growing Graphs and Circuits. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:93-104 [Conf ] Keith L. Downing Developmental Models for Emergent Computation. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:105-116 [Conf ] Piet van Remortel , Johan Ceuppens , Anne Defaweux , Tom Lenaerts , Bernard Manderick Developmental Effects on Tuneable Fitness Landscapes. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:117-128 [Conf ] Andrew M. Tyrrell , Eduardo Sanchez , Dario Floreano , Gianluca Tempesti , Daniel Mange , Juan Manuel Moreno , Jay Rosenberg , Alessandro E. P. Villa POEtic Tissue: An Integrated Architecture for Bio-inspired Hardware. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:129-140 [Conf ] Gianluca Tempesti , Daniel Roggen , Eduardo Sanchez , Yann Thoma , Richard Canham , Andrew M. Tyrrell Ontogenetic Development and Fault Tolerance in the POEtic Tissue. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:141-152 [Conf ] Daniel Roggen , Dario Floreano , Claudio Mattiussi A Morphogenetic Evolutionary System: Phylogenesis of the POEtic Circuit. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:153-164 [Conf ] Jan Eriksson , Oriol Torres , Andrew Mitchell , Gayle Tucker , Ken Lindsay , David M. Halliday , Jay Rosenberg , Juan Manuel Moreno , Alessandro E. P. Villa Spiking Neural Networks for Reconfigurable POEtic Tissue. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:165-173 [Conf ] Richard Canham , Andrew M. Tyrrell A Learning, Multi-layered, Hardware Artificial Immune System Implemented upon an Embryonic Array. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:174-185 [Conf ] Lukás Sekanina Virtual Reconfigurable Circuits for Real-World Applications of Evolvable Hardware. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:186-197 [Conf ] Moritoshi Yasunaga , Ikuo Yoshihara , Jung Hwan Kim Gene Finding Using Evolvable Reasoning Hardware. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:198-207 [Conf ] J. H. Li , M. H. Lim Evolvable Fuzzy System for ATM Cell Scheduling. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:208-217 [Conf ] Arturo Hernández Aguirre , Edgar C. González Equihua , Carlos A. Coello Coello Synthesis of Boolean Functions Using Information Theory. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:218-227 [Conf ] Jim Torresen Evolving Multiplier Circuits by Training Set and Training Vector Partitioning. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:228-237 [Conf ] Miguel Garvie , Adrian Thompson Evolution of Self-diagnosing Hardware. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:238-248 [Conf ] Cesar Ortega-Sanchez , Jose Torres-Jimenez , Jorge Morales-Cruz Routing of Embryonic Arrays Using Genetic Algorithms. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:249-261 [Conf ] Fulvio Corno , F. Cumani , Giovanni Squillero Exploiting Auto-adaptive 7GP for Highly Effective Test Programs Generation. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:262-273 [Conf ] Tillmann Schmitz , Steffen G. Hohmann , Karlheinz Meier , Johannes Schemmel , Felix Schürmann Speeding up Hardware Evolution: A Coprocessor for Evolutionary Algorithms. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:274-285 [Conf ] Ricardo Salem Zebulum , Adrian Stoica , Didier Keymeulen , Michael I. Ferguson , Vu Duong , Xin Guo , Vatche Vorperian Automatic Evolution of Signal Separators Using Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:286-295 [Conf ] Henrik Hautop Lund , Rasmus Lock Larsen , Esben Hallundbæk Østergaard Distributed Control in Self-reconfigurable Robots. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:296-307 [Conf ] Esben Hallundbæk Østergaard , Henrik Hautop Lund Co-evolving Complex Robot Behavior. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:308-319 [Conf ] Jesper Blynel Evolving Reinforcement Learning-Like Abilities for Robots. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:320-331 [Conf ] Stephen L. Smith , David P. Crouch , Andrew M. Tyrrell Evolving Image Processing Operations for an Evolvable Hardware Environment. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:332-343 [Conf ] M. A. Hannan Bin Azhar , Keith R. Dimond Hardware Implementation of a Genetic Controller and Effects of Training on Evolution. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:344-354 [Conf ] Robert Goldsmith Real World Hardware Evolution: A Mobile Platform for Sensor Evolution. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:355-364 [Conf ] Snorre Aunet , Morten Hartmann Real-Time Reconfigurable Linear Threshold Elements and Some Applications to Neural Hardware. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:365-376 [Conf ] Rudie van de Haar , Jaap Hoekstra Simulation of a Neural Node Using SET Technology. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:377-386 [Conf ] N. Venkateswaran , C. Chandramouli General Purpose Processor Architecture for Modeling Stochastic Biological Neuronal Assemblies. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:387-397 [Conf ] Carlos A. Coello Coello , Erika Hernández Luna , Arturo Hernández Aguirre Use of Particle Swarm Optimization to Design Combinational Logic Circuits. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:398-409 [Conf ] Giovani Gomez Estrada A Note on Designing Logical Circuits Using SAT. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:410-421 [Conf ] Werner Van Belle , Tom Mens , Theo D'Hondt Using Genetic Programming to Generate Protocol Adaptors for Interprocess Communication. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:422-433 [Conf ] Sérgio G. Araújo , Antônio C. Mesquita , Aloysio Pedroza Using Genetic Programming and High Level Synthesis to Design Optimized Datapath. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:434-445 [Conf ] Fumiaki Tanaka , Atsushi Kameda , Masahito Yamamoto , Azuma Ohuchi The Effect of the Bulge Loop upon the Hybridization Process in DNA Computing. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:446-456 [Conf ] Hugo de Garis , Amit Gaur , Ravichandra Sriram Quantum versus Evolutionary Systems. Total versus Sampled Search. [Citation Graph (0, 0)][DBLP ] ICES, 2003, pp:457-465 [Conf ]