Conferences in DBLP
Woei Lin An Automorphism of a Class of Interconnection Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Laxmi N. Bhuyan Effect of Arbitration Policies on the Performance of Interconnection Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Bijendra N. Jain , Satish K. Tripathi Equivalence Between Cube-Connected Cycles Networks and Circular Shuffle Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Anujan Varma , C. S. Raghavendra Rearrangeability of the 5-Stage Shuffle/Exchange Network for N=8 9. [Citation Graph (0, 0)][DBLP ] Conf ] Clyde P. Kruskal , Marc Snir , Alan Weiss The Distribution of Waiting Times in Clocked Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Peyyun Peggy Li , Alain J. Martin The Sneptree : A Versatile Interconnection Network. [Citation Graph (0, 0)][DBLP ] Conf ] Gregory F. Pfister , Manoj Kumar The Onset of Hot-Spot Contention. [Citation Graph (0, 0)][DBLP ] Conf ] Gyungho Lee , Clyde P. Kruskal , David J. Kuck The Effectiveness of Combining in Shared Memory Parallel Computer in the Presence of "Hot Spots". [Citation Graph (0, 0)][DBLP ] Conf ] Kyoji Yuyama , Zary Segall Shared Memory Emulation Algorithm for Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Robert H. Thomas Behavior of the Butterfly Parallel Processor in the Presence of Memory Hot Spots. [Citation Graph (0, 0)][DBLP ] Conf ] Pen-Chung Yew , Nian-Feng Tzeng , Duncan H. Lawrie Distributing Hot-Spot Addressing in Large Scale Multiprocessor. [Citation Graph (0, 0)][DBLP ] Conf ] Senol Utku , Y. Chang , Moktar Salama , D. Rapp Simultaneous Iterations Algorithm for General Eigenvalue Problems on Parallel Processors. [Citation Graph (0, 0)][DBLP ] Conf ] Dale J. Arpasi , Edward J. Milner Mathematical Model Partitioning and Packing for Parallel Computer Calculation. [Citation Graph (0, 0)][DBLP ] Conf ] Fatemeh Abdollahzadeh , Mehdi Badii , D. J. Cooke A New Grammar for Arithmetic Expressions in a Parallel Processing Environment. [Citation Graph (0, 0)][DBLP ] Conf ] Guang R. Gao A Pipelined Solution Method of Tridiagonal Linear Equation Systems. [Citation Graph (0, 0)][DBLP ] Conf ] David S. Wise Parallel Decomposition of Matrix Inversion Using Quadtrees. [Citation Graph (0, 0)][DBLP ] Conf ] Julio de Melo , Roy M. Jenevein SK-Banyans: A Unified Class of Banyan Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Nathaniel J. Davis IV , Howard Jay Siegel Performance Studies of Multiple-Packet Multistage Cube Networks and Comparison to Circuit Switching. [Citation Graph (0, 0)][DBLP ] Conf ] Vladimir Cherkassky , Miroslaw Malek Analysis of CC-Banyan Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Kyungsook Y. Lee , Daeshik Lee Control Algorithms for the Augmented Data Manipulator Network. [Citation Graph (0, 0)][DBLP ] Conf ] Ahmed K. Elmagarmid , Abdelsalam Helal , Magdy H. Nagi Optimistic vs. Pessimistic Concurrency Control Algorithms: A Comparative Study. [Citation Graph (0, 0)][DBLP ] Conf ] William H. Jones Increasing Processor Utilization During Parallel Computation Rundown. [Citation Graph (0, 0)][DBLP ] Conf ] Bruce P. Lester A System for Computing the Speedup of Parallel Programs. [Citation Graph (0, 0)][DBLP ] Conf ] Robert O'Dell , James C. Browne Parallel Structuring of Control and Resources Management Systems for Parallel Programs. [Citation Graph (0, 0)][DBLP ] Conf ] Dilip Sarkar , Narsingh Deo Estimating the Speedup in Parallel Parsing. [Citation Graph (0, 0)][DBLP ] Conf ] Randy Allen , Donn Bäumgartner , Ken Kennedy , Allan Porterfield PTOOL : A Semi-Automatic Parallel Programming Assistant. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas Macke , Christopher Huson , James Davies , Michael Wolfe , Bruce Leasure The KAP/ST-100 A Fortran Translator for the ST-100 Attached Processor. [Citation Graph (0, 0)][DBLP ] Conf ] Tzilla Elrad , Fred A. Maymir-Ducharme Distributed Languages Design Constructs for Controlling Preferences. [Citation Graph (0, 0)][DBLP ] Conf ] Henry G. Dietz , David Klappholz Refined Fortran: Another Sequential Language for Parallel Programming. [Citation Graph (0, 0)][DBLP ] Conf ] Ted H. Szymanski A VLSI Comparison of Switch-Recursive Banyan and Crossbar Interconnection Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Pinaki Mazumder Evaluation of Three Interconnection Networks for CMOS VLSI Implementation. [Citation Graph (0, 0)][DBLP ] Conf ] Mark A. Franklin , Sanjay Dhar On Designing Interconnection Networks for Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Sheldon B. Akers , Balakrishnan Krishnamurthy : A Group Theoretic Model for Symmetric Interconnection Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Debasis Mitra , Randall A. Cieslak Randomized Parallel Communications. [Citation Graph (0, 0)][DBLP ] Conf ] J. Eric Roskos A Comparison of Two Synchronization Primitives in an Operating System for Parallel Processing Applications. [Citation Graph (0, 0)][DBLP ] Conf ] Geoffrey M. Brown , Chuan-lin Wu Operating System Kernel for a Reconfigurable Multiprocessor System. [Citation Graph (0, 0)][DBLP ] Conf ] Michael L. Scott The Interface Between Distributed Operating System and High-Level Programming Language. [Citation Graph (0, 0)][DBLP ] Conf ] Carl Friedlander , Horst Wedde Distributed Processing Under the Dragon Slayer Operating System. [Citation Graph (0, 0)][DBLP ] Conf ] David Notkin , Lawrence Snyder Programming Solutions to the Algorithm Contraction Problem. [Citation Graph (0, 0)][DBLP ] Conf ] Zhixi Fang , Lionel M. Ni Parallel Algorithms for 2-D Convolution. [Citation Graph (0, 0)][DBLP ] Conf ] Viktor K. Prasanna , Mary Mehrnoosh Eshaghian Parallel Geometric Algorithms for Digitized Pictures on Mesh of Trees. [Citation Graph (0, 0)][DBLP ] Conf ] Keki B. Irani , Yifong Shih Parallel A^* and AO^* Algorithms: An Optimality Criterion and Performance Evaluation. [Citation Graph (0, 0)][DBLP ] Conf ] Clyde P. Kruskal , Larry Rudolph , Tom Madej Parallel Prefix on Fully Connected Direct Connection Machines. [Citation Graph (0, 0)][DBLP ] Conf ] Jaime H. Moreno , Tomás Lang Replication and Pipelining in Multiple-Instance Algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Tsutomu Ishikawa , Shigeharu Momoi , Shigeo Shimada , Yoshio Ogawa Hierarchical Array Processor (HAP) Featuring High Reliability and High System Performance. [Citation Graph (0, 0)][DBLP ] Conf ] Mi Lu , Peter J. Varman Mesh-Connected Computer Algorithms for Rectangle-Intersection Problems. [Citation Graph (0, 0)][DBLP ] Conf ] Tsair-chin Lin , Dan I. Moldovan M^2-Mesh: An Augmented Mesh Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Ted H. Szymanski On the Universality of Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP ] Conf ] A. Yavuz Oruç Synthesis of a Family of Cellular Permutation Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Prithviraj Banerjee , Abhijeet Dugar A Fault-Tolerant Interconnection Network Supporting the Fetch-And-Add Primitive. [Citation Graph (0, 0)][DBLP ] Conf ] Yuanyuan Yang , Lan Jin Analysis of a Kind of Fault-Tolerant Interconnection Network. [Citation Graph (0, 0)][DBLP ] Conf ] Myoung Sung Lee , Gideon Frieder Massively Fault-Tolerant Cellular Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Peter J. Varman , I. V. Ramakrishnan A Fault-Tolerant VLSI Matrix Multiplier. [Citation Graph (0, 0)][DBLP ] Conf ] Chung-Yang Chiang , Chuan-lin Wu Fail Safe Distributed Fault Diagnosis of Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] Conf ] John G. Lewis , Horst D. Simon The Impact of Hardware Gather/Scatter on Sparse Gaussian Elimination. [Citation Graph (0, 0)][DBLP ] Conf ] Torstein Opsahl , Dennis Parkinson An Algorithm for Solving Sparse Sets of Linear Equations with an Almost Tri-Diagonal Structure on SIMD Computers. [Citation Graph (0, 0)][DBLP ] Conf ] Donald A. Calahan Block-Oriented, Local-Memory Based Linear Equation Solution on the Cray-2 Uniprocessor Algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Ali R. Hurson VLSI Time/Space Complexity of an Associative Parallel Join Module. [Citation Graph (0, 0)][DBLP ] Conf ] Kam-Hoi Cheng , Sartaj Sahni A New VLSI System for Adaptive Recursive Filtering. [Citation Graph (0, 0)][DBLP ] Conf ] Vijay Balasubramanian , Prithviraj Banerjee RECBAR : A Reconfigurable Massively Parallel Processing Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Insup Lee , Samuel M. Goldwasser , David Smitley Synthesis and Mapping Algorithms for a Reconfigurable Optical Interconnection Network. [Citation Graph (0, 0)][DBLP ] Conf ] Tam Anh Chu , Clement K. C. Leung Design of VLSI Asynchronous FIFO Queues for Packet Communication Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Alexander A. Sawchuk , Bob K. Jenkins , Anujan Varma , C. S. Raghavendra Optical Matrix-Vector Implementation of Crossbar Interconnection Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Frank C. H. Lin , Robert M. Keller Distributed Recovery in Applicative Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Gyo Osawa , Toshio Kawai , Hideo Aiso Fault Tolerant Scheme on Partial Differential Equations. [Citation Graph (0, 0)][DBLP ] Conf ] Nick Lai , Barton P. Miller The Traveling Salesman Problem: The Development of a Distributed Computation. [Citation Graph (0, 0)][DBLP ] Conf ] Satoshi Ono , Naohisa Takahashi , Makoto Amamiya Optimized Demand-driven Evaluation of Functional Programs on a Dataflow Machine. [Citation Graph (0, 0)][DBLP ] Conf ] William Jalby , Ulrike Meier Optimizing Matrix Operations on a Parallel Multiprocessor with a Memory Hierarchical System. [Citation Graph (0, 0)][DBLP ] Conf ] Michael Berry , Ahmed H. Sameh Multiprocessor Jacobi Algorithms for Dense Symmetric Eigenvalue and Singular Value Decompositions. [Citation Graph (0, 0)][DBLP ] Conf ] Hung-chi Kuo , Swarn P. Kumar Solving Positive Definite Linear Systems on Vector Computers. [Citation Graph (0, 0)][DBLP ] Conf ] P. S. Gopalakrishnan , I. V. Ramakrishnan , Laveen N. Kanal Parallel Approximate Algorithms for the 0-1 Knapsack Problem. [Citation Graph (0, 0)][DBLP ] Conf ] Gee-gwo Mei , Wentai Liu Parallel Processing for Quadtree Problems. [Citation Graph (0, 0)][DBLP ] Conf ] Clinton A. Staley , Steven E. Butner A Feasibility Study and Simulation of the Circulating Context Multiprocessor (CCMP). [Citation Graph (0, 0)][DBLP ] Conf ] Thomas J. LeBlanc Shared Memory Versus Message-Passing in a Tightly-Coupled Multiprocessor: A Case Study. [Citation Graph (0, 0)][DBLP ] Conf ] Santosh G. Abraham , Edward S. Davidson A Communication Model for Optimizing Hierarchical Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Jih-Kwon Peir , Daniel Gajski CAMP: A Programming Aide for Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Honesty C. Young , James R. Goodman The Design of a Queue-Based Vector Supercomputer. [Citation Graph (0, 0)][DBLP ] Conf ] Yvon Jégou , André Seznec Data Synchronized Pipeline Architecture: Pipelining in Multiprocessor Environments. [Citation Graph (0, 0)][DBLP ] Conf ] Kai Hwang , Zhiwei Xu Multipipeline Networking for Fast Evaluation of Vector Compound Functions. [Citation Graph (0, 0)][DBLP ] Conf ] Hai-Xiang Lin , Henk J. Sips A Parallel Vector Reduction Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] J. Dean Brock , Amos Omondi Shared Pipelines: Effective Pipelining in Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Steven R. Kunkel , James E. Smith Pipelined Register-Storage Architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Constantine D. Polychronopoulos , David J. Kuck , David A. Padua Execution of Parallel Loops on Parallel Processor Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Peiyi Tang , Pen-Chung Yew Processor Self-Scheduling for Multiple-Nested Parallel Loops. [Citation Graph (0, 0)][DBLP ] Conf ] Michael Wolfe Advanced Loop Interchanging. [Citation Graph (0, 0)][DBLP ] Conf ] Samuel P. Midkiff , David A. Padua Compiler Generated Synchronization for Do Loops. [Citation Graph (0, 0)][DBLP ] Conf ] Karam Mossaad , Chuan-lin Wu Efficient Execution of Programs with Pipeline Configuration of Reconfigurable Multiprocessor. [Citation Graph (0, 0)][DBLP ] Conf ] George Cybenko , David W. Krumme , K. N. Venkataraman Simultaneous Broadcasting in Multiprocessor Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Walid A. Abu-Sufah , Allen D. Malony Vector Processing on the Alliant FX/8 Multiprocessor. [Citation Graph (0, 0)][DBLP ] Conf ] Wolfgang K. Giloi , Peter M. Behr Suprenum: The German Supercomputer Architecture Rationale and Concepts. [Citation Graph (0, 0)][DBLP ] Conf ] Laxmi N. Bhuyan , Chita R. Das Dependability Evaluation of Multicomputer Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Kei Hiraki , Kenji Nishida , Satoshi Sekiguchi , Toshio Shimada Maintenance Architecture and Its LSI Implementation of a Dataflow Computer with a Large Number of Processors. [Citation Graph (0, 0)][DBLP ] Conf ] Yi-Hsiu Wei , Jean-Luc Gaudiot : Token Relabeling in a Tagged Data-Flow Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Sun-Yuan Kung , Sheng-Chun Lo , Paul S. Lewis Timing Analysis and Design Optimization of VLSI Data Flow Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Leah H. Jamieson , Edward A. Ashcroft Performance Analysis of Dataflow Signal Processing Algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Liu Gui-shong , Ci Yun-gui A Model of Quantitative Analysis for Performance Evaluation of Static Data Flow Computers. [Citation Graph (0, 0)][DBLP ] Conf ] Alberto Pettorossi , Andrzej Skowron Using Facts for Improving the Parallel Execution of Functional Programs. [Citation Graph (0, 0)][DBLP ] Conf ] Ranga S. Ramanujan , Jon G. Kuhl A New Structuring Mechanism for Support of Spatially Redundant Distributed Computation. [Citation Graph (0, 0)][DBLP ] Conf ] Lawrence Snyder , David Socha Poker on the Cosmic Cube: The First Retargetable Parallel Programming Language and Environment. [Citation Graph (0, 0)][DBLP ] Conf ] Seth Abraham , Krishnan Padmanabhan Performance of the Direct Binary n-Cube Network for Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Ching-Tien Ho , S. Lennart Johnsson Distributed Routing Algorithms for Broadcasting and Personalized Communication in Hypercubes. [Citation Graph (0, 0)][DBLP ] Conf ] John L. Gustafson , Stuart Hawkinson , Ken Scott The Architecture of a Homogeneous Vector Supercomputer. [Citation Graph (0, 0)][DBLP ] Conf ] John P. Hayes , Trevor N. Mudge , Quentin F. Stout Architecture of a Hypercube Supercomputer. [Citation Graph (0, 0)][DBLP ] Conf ] Sanjay R. Deshpande , Roy M. Jenevein Scaleability of a Binary Tree on a Hypercube. [Citation Graph (0, 0)][DBLP ] Conf ] Jik H. Chang , Moon-Jung Chung , Oscar H. Ibarra , Kotesh K. Rao Systolic Tree Implementation of Data Structures. [Citation Graph (0, 0)][DBLP ] Conf ] Matthew T. O'Keefe , José A. B. Fortes A Comparative Study of Two Systematic Design Methodologies for Systolic Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Juan J. Navarro , José M. Llabería , Mateo Valero Solving Matrix Problems with No Size Restriction on a Systolic Array Processor. [Citation Graph (0, 0)][DBLP ] Conf ] David A. Arpin , Yongmin Kim PARSOR : A Parallel Processor for Sparse Matrix Solution by SOR Iteration. [Citation Graph (0, 0)][DBLP ] Conf ] Luis D. Duval , Yijie Han , Robert A. Wagner , Donald W. Loveland Finding Test-and-Treatment Procedures Using Parallel Computation. [Citation Graph (0, 0)][DBLP ] Conf ] Charles J. Petrie A Diffusing Computation for Truth Maintenance. [Citation Graph (0, 0)][DBLP ] Conf ] Patrick F. McGehearty , Edward J. Krall Potentials for Parallel Execution of Common Lisp Programs. [Citation Graph (0, 0)][DBLP ] Conf ] Williams Ludwell Harrison III , David A. Padua Representing S-Expressions for the Efficient Evaluation of LISP on Parallel Processors. [Citation Graph (0, 0)][DBLP ] Conf ] Stephanie Forrest The Classifier System: A Computational Model that Supports Machine Intelligence. [Citation Graph (0, 0)][DBLP ] Conf ] Lynn Cosell , Owen Kimball , Richard M. Schwartz , Michael Krasner Continuous Speech Recognition on a Butterfly Parallel Processor. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas H. Cormen , Charles E. Leiserson A Hyperconcentrator Switch for Routing Bit-Serial Messages. [Citation Graph (0, 0)][DBLP ] Conf ] Augustus K. Uht , Robert G. Wedig Hardware Extraction of Low-Level Concurrency from Serial Instruction Streams. [Citation Graph (0, 0)][DBLP ] Conf ] Tse-Yun Feng , Wei Young Fault Location in Omegar Omega-1 Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Imad Mahgoub , Dharma P. Agrawal Impact of Cluster Network Failure on the Performance of Cluster-Based Supersystems. [Citation Graph (0, 0)][DBLP ] Conf ] Benjamin W. Wah , Jie-Yong Juang Resource Sharing Interconnection Networks in Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Rami G. Melhem Application of Data Driven Networks to Sparse Matrix Multiplication. [Citation Graph (0, 0)][DBLP ] Conf ] Uwe Schwiegelshohn , Lothar Thiele On the Systolic Detection of Shortest Routes. [Citation Graph (0, 0)][DBLP ] Conf ] Concettina Guerra , Rami G. Melhem Synthesizing Non-Uniform Systolic Designs. [Citation Graph (0, 0)][DBLP ] Conf ] Sanjay V. Rajopadhye , Prakash Panangaden Verification of Systolic Arrays: A Stream Function Approach. [Citation Graph (0, 0)][DBLP ] Conf ] Marina C. Chen Synthesizing VLSI Architectures: Dynamic Programming Solver. [Citation Graph (0, 0)][DBLP ] Conf ] Prabhakar Goel , Chi-Lai Huang , Robert E. Blauth Application of Parallel Processing to Fault Simulation. [Citation Graph (0, 0)][DBLP ] Conf ] Carl K. Chang , Huiyu Wang A Slicing Algorithm of Concurrency Modeling Based on Petri Nets. [Citation Graph (0, 0)][DBLP ] Conf ] John B. Gilmer Jr. , George Hartwig , Louise Kokinakis Parallel Entity Centered Simulation on the Butterfly Computer. [Citation Graph (0, 0)][DBLP ] Conf ] Edward C. Bronson , Leah H. Jamieson , James T. Kuehn A Technique for Simulation of SIMD Signal Processing Algorithms on the PASM Parallel Processing System. [Citation Graph (0, 0)][DBLP ] Conf ] Wolfgang Henning , Jens Volkert : Multi Grid Algorithms Implemented on EGPA Multiprocessor. [Citation Graph (0, 0)][DBLP ] Conf ] Mi Lu Constructing the Voronoi Diagram on a Mesh-Connected Computer. [Citation Graph (0, 0)][DBLP ] Conf ] Robert Michael Owens , Joseph JáJá Optimal Algorithms for Mesh-Connected Parallel Processors with Serial Memories. [Citation Graph (0, 0)][DBLP ] Conf ] Duane A. Bailey , Janice E. Cuny An Efficient Embedding of Large Trees in Processor Grids. [Citation Graph (0, 0)][DBLP ] Conf ] Laxmikant V. Kalé Optimal Communication Neighborhoods. [Citation Graph (0, 0)][DBLP ] Conf ] Christopher Huson , Thomas Macke , James Davies , Michael Wolfe , Bruce Leasure The KAP/205 : An Advanced Source-to-Source Vectorizer for the Cyber 205 Supercomputer. [Citation Graph (0, 0)][DBLP ] Conf ] Christopher Huson , Thomas Macke , James Davies , Michael Wolfe , Bruce Leasure The KAP/S-1 : An Advanced Source-to-Source Vectorizer for the S-1 Mark IIa Supercomputer. [Citation Graph (0, 0)][DBLP ] Conf ] Ron Cytron Doacross: Beyond Vectorization for Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Robert G. Babb II , Lise Storc , William C. Ragsdale A Large-Grain Data Flow Scheduler for Parallel Processing on CYBERPLUS. [Citation Graph (0, 0)][DBLP ] Conf ] Maya Gokhale Macro vs. Micro Dataflow: A Programming Example. [Citation Graph (0, 0)][DBLP ] Conf ] David P. Helmbold , Ernst W. Mayr Perfect Graphs and Parallel Algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Charles E. Leiserson , Bruce M. Maggs Communication-Efficient Parallel Graph Algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Clyde P. Kruskal , Larry Rudolph , Marc Snir Efficient Parallel Algorithms for Graph Models. [Citation Graph (0, 0)][DBLP ] Conf ] Shaunak Pawagi , P. S. Gopalakrishnan , I. V. Ramakrishnan A Parallel Algorithm for Dominators. [Citation Graph (0, 0)][DBLP ] Conf ] Ashok K. Adiga , James C. Browne A Graph Model for Parallel Computations Expressed in the Computation Structures Language. [Citation Graph (0, 0)][DBLP ] Conf ] Jik H. Chang , Oscar H. Ibarra , Michael A. Palis Parallel Parsing on a One-Way Array of Finite-State Machines. [Citation Graph (0, 0)][DBLP ] Conf ] M. Martin , Donald M. Chiarulli , S. Sitharama Iyengar Parallel Processing of Quadtrees on a Horizontally Reconfigurable Architecture Computing System. [Citation Graph (0, 0)][DBLP ] Conf ] Sandeep Sen , Isaac D. Scherson , Adi Shamir Shear Sort: A True Two-Dimensional Sorting Techniques for VLSI Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Michel Dubois , Faye A. Briggs , Indira Patil , Meera Balakrishnan Trace-Driven Simulations of Parallel and Distributed Algorithms in Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Richard J. Lipton , Daniel P. Lopresti Delta Transformations to Simplify VLSI Processor Arrays for Serial Dynamic Programming. [Citation Graph (0, 0)][DBLP ] Conf ] Eliezer Dekel , Istvan Ozsvath Parallel External Merging. [Citation Graph (0, 0)][DBLP ] Conf ] Yijie Han , Robert A. Wagner : Parallel Algorithms for Bucket Sorting and the Data Dependent Prefix Problem. [Citation Graph (0, 0)][DBLP ] Conf ] S. Sitharama Iyengar , Nageswara S. V. Rao , Rangasami L. Kashyap A Parallel Range Search Algorithm Using Multiple Attribute Tree. [Citation Graph (0, 0)][DBLP ] Conf ] Micah Beck , Dina Bitton , W. Kevin Wilkinson Design and Evaluation of a Parallel Sort Utility. [Citation Graph (0, 0)][DBLP ] Conf ] A. A. Aaby , K. T. Narayana A Distributed Implementation Scheme for Communicating Processes. [Citation Graph (0, 0)][DBLP ] Conf ] Mohan Ahuja , James C. Browne Intra-Transaction Concurrency in Distributed Databases and Protocols which use Transaction Aborts to Preserve Consistency: A Performance Study. [Citation Graph (0, 0)][DBLP ] Conf ] Pauline Markenscoff , Weikuo Liaw Task Allocation Problems in Distributed Computer Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Constantine D. Polychronopoulos , Utpal Banerjee Speedup Bounds and Processor Allocation for Parallel Programs on Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Bernard Geary Software Based Mutual Exclusion in a Multiprocessor. [Citation Graph (0, 0)][DBLP ] Conf ] Vipin Kumar , Yow-Jian Lin A Parallel Execution Scheme for Exploiting and Parallelism of Logic Programs. [Citation Graph (0, 0)][DBLP ] Conf ] Seungbeom Kim , Seungryoul Maeng , Jung Wan Cho A Parallel Execution Model of Logic Program Based on Dependency Relationship Graph. [Citation Graph (0, 0)][DBLP ] Conf ] Yu-Wen Tung , Dan I. Moldovan Detection of and Parallelism in Logic Programming. [Citation Graph (0, 0)][DBLP ] Conf ] Benjamin W. Wah , Guo-Jie Li How Good are Parallel and Ordered Depth-First Searches? [Citation Graph (0, 0)][DBLP ] Conf ] Joseph Gil , Larry Rudolph Counting and Packing in Parallel. [Citation Graph (0, 0)][DBLP ] Conf ] Nicola Santoro , Ed Suen Reduction Techniques for Selection in Distributed Files. [Citation Graph (0, 0)][DBLP ] Conf ] Eliezer Dekel , Shietung Peng , Shietung Iyengar Optimal Parallel Algorithms for Constructing Balanced m-Way Search Tree. [Citation Graph (0, 0)][DBLP ] Conf ] Yasushi Kiyoki , Ryuzo Hasegawa , Makoto Amamiya A Stream-Oriented Parallel Processing Scheme for Relational Database Operations. [Citation Graph (0, 0)][DBLP ] Conf ] Clement T. Yu , Keh-Chang Guh , David Brill , Arbee L. P. Chen Partitioning Relation for Parallel Processing in Fast Local Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Alexander V. Veidenbaum A Compiler-Assisted Cache Coherence Solution for Multiprcessors. [Citation Graph (0, 0)][DBLP ] Conf ] Michael J. Carey , Hongjun Lu Load-Balanced Task Allocation in Locally Distributed Computer Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Mohammad Ashraf Iqbal , Joel H. Saltz , Shahid H. Bokhari A Comparative Analysis of Static and Dynamic Load Balancing Strategies. [Citation Graph (0, 0)][DBLP ] Conf ] Gholamali C. Shoja , R. G. Gurr Parallel Processing in Local Networks. [Citation Graph (0, 0)][DBLP ] Conf ] 