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Conferences in DBLP

International Conference on Supercomputing (ICS) (ics)
2003 (conf/ics/2003)

  1. Louis Christodoulides
    Keynote: Wireless networks... what does the future have in store? [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:1- [Conf]
  2. Roni Rosner, Micha Moffie, Yiannakis Sazeides, Ronny Ronen
    Selecting long atomic traces for high coverage. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:2-11 [Conf]
  3. Haitham Akkary, Srikanth T. Srinivasan, Konrad Lai
    Recycling waste: exploiting wrong-path execution to improve branch prediction. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:12-21 [Conf]
  4. Paul Racunas, Yale N. Patt
    Partitioned first-level cache design for clustered microarchitectures. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:22-31 [Conf]
  5. Anasua Bhowmik, Manoj Franklin
    A fast approximate interprocedural analysis for speculative multithreading compilers. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:32-41 [Conf]
  6. Xiaogang Li, Renato Ferreira, Gagan Agrawal
    Compiler support for efficient processing of XML datasets. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:42-52 [Conf]
  7. Steven Carroll, Constantine D. Polychronopoulos
    A framework for incremental extensible compiler construction. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:53-62 [Conf]
  8. Parry Husbands, Costin Iancu, Katherine A. Yelick
    A performance analysis of the Berkeley UPC compiler. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:63-73 [Conf]
  9. James E. Smith
    Keynote: Is there anything more to learn about high performance processors? [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:75- [Conf]
  10. Wei Zhang 0002, Mustafa Karaköy, Mahmut T. Kandemir, Guangyu Chen
    A compiler approach for reducing data cache energy. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:76-85 [Conf]
  11. Enrique V. Carrera, Eduardo Pinheiro, Ricardo Bianchini
    Conserving disk energy in network servers. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:86-97 [Conf]
  12. Li Shang, Li-Shiuan Peh, Niraj K. Jha
    PowerHerd: dynamic satisfaction of peak power constraints in interconnection networks. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:98-108 [Conf]
  13. Jayanth Srinivasan, Sarita V. Adve
    Predictive dynamic thermal management for multimedia applications. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:109-120 [Conf]
  14. Julita Corbalán, Xavier Martorell, Jesús Labarta
    Evaluation of the memory page migration influence in the system performance: the case of the SGI O2000. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:121-129 [Conf]
  15. Francesco Quaglia, Andrea Santoro
    Modeling and optimization of non-blocking checkpointing for optimistic simulation on myrinet clusters. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:130-139 [Conf]
  16. Nathan R. Fredrickson, Ahmad Afsahi, Ying Qian
    Performance characteristics of openMP constructs, and application benchmarks on a large symmetric multiprocessor. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:140-149 [Conf]
  17. Calin Cascaval, David A. Padua
    Estimating cache misses and locality using stack distances. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:150-159 [Conf]
  18. G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, Marten van Dijk, Srinivas Devadas
    AEGIS: architecture for tamper-evident and tamper-resistant processing. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:160-171 [Conf]
  19. Nam Sung Kim, Trevor N. Mudge
    Reducing register ports using delayed write-back queues and operand pre-fetch. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:172-182 [Conf]
  20. Weihaw Chuang, Brad Calder
    Predicate prediction for efficient out-of-order execution. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:183-192 [Conf]
  21. Manuel Arenaz, Juan Touriño, Ramon Doallo
    A GSA-based compiler infrastructure to extract parallelism from complex loops. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:193-204 [Conf]
  22. Kleanthis Psarris, Konstantinos Kyriakopoulos
    The impact of data dependence analysis on compilation and program parallelization. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:205-214 [Conf]
  23. Liu Yang, Sun Chan, Guang R. Gao, Roy Ju, Guei-Yuan Lueh, Zhaoqing Zhang
    Inter-procedural stacked register allocation for itanium® like architecture. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:215-225 [Conf]
  24. Cécile Germain-Renaud, Nathalie Playez
    Result checking in global computing systems. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:226-233 [Conf]
  25. Greg Bronevetsky, Daniel Marques, Keshav Pingali, Paul Stodghill
    Collective operations in application-level fault-tolerant MPI. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:234-243 [Conf]
  26. Jan-Jan Wu, Da-Wei Wang, Yih-Fang Lin
    Placement of I/O servers to improve parallel I/O performance on switch-based clusters. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:244-251 [Conf]
  27. Yijian Wang, David R. Kaeli
    Profile-guided I/O partitioning. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:252-260 [Conf]
  28. Reza Azimi, Angelos Bilas
    miNI: reducing network interface memory requirements with dynamic handle lookup. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:261-272 [Conf]
  29. Ravi Rajwar, Alain Kägi, James R. Goodman
    Inferential queueing and speculative push for reducing critical communication latencies. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:273-284 [Conf]
  30. Xing Fang, Jaejin Lee, Samuel P. Midkiff
    Automatic fence insertion for shared memory multiprocessing. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:285-294 [Conf]
  31. Jiuxing Liu, Jiesheng Wu, Sushmitha P. Kini, Pete Wyckoff, Dhabaleswar K. Panda
    High performance RDMA-based MPI implementation over InfiniBand. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:295-304 [Conf]
  32. Mikio Takeuchi, Hideaki Komatsu, Toshio Nakatani
    A new speculation technique to optimize floating-point performance while preserving bit-by-bit reproducibility. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:305-315 [Conf]
  33. Daniel Ortega, Eduard Ayguadé, Mateo Valero
    Dynamic memory instruction bypassing. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:316-325 [Conf]
  34. Huiyang Zhou, Thomas M. Conte
    Enhancing memory level parallelism via recovery-free value prediction. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:326-335 [Conf]
  35. Andrew M. Wissink, David Hysom, Richard D. Hornung
    Enhancing scalability of parallel structured AMR calculations. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:336-347 [Conf]
  36. Eugene Borovikov, Alan Sussman
    A high performance multi-perspective vision studio. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:348-357 [Conf]
  37. Xiangmin Jiao, Michael T. Campbell, Michael T. Heath
    Roccom: an object-oriented, data-centric software integration framework for multiphysics simulations. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:358-368 [Conf]
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