Conferences in DBLP
Jaime H. Moreno , Mayan Moudgil Scalable Instruction-Level Parallelism Through Tree-Instructions. [Citation Graph (0, 0)][DBLP ] Conf ] David López , Mateo Valero , Josep Llosa , Eduard Ayguadé Increasing Memory Bandwidth with Wide Buses: Compiler, Hardware and Performance Trade-Offs. [Citation Graph (0, 0)][DBLP ] Conf ] Rajesh Bordawekar Implementation of Collective I/O in the Intel Paragon Parallel File System: Initial Experiences. [Citation Graph (0, 0)][DBLP ] Conf ] Ying Chen , Jarek Nieplocha , Ian T. Foster , Marianne Winslett Optimizing Collective I/O Performance on Parallel Computers: A Multisystem Study. [Citation Graph (1, 0)][DBLP ] Conf ] Graham D. Riley , J. Mark Bull , John R. Gurd Performance Improvement through Overhead Analysis: A Case Study in Molecular Dynamics. [Citation Graph (0, 0)][DBLP ] Conf ] Hyuk-Jae Lee , James P. Robertson , José A. B. Fortes Generalized Cannon's Algorithm for Parallel Matrix Multiplication. [Citation Graph (0, 0)][DBLP ] Conf ] Xian-He Sun , Yu Zhuang A Highly Accurate Fast Solver for Helmholtz Equations. [Citation Graph (0, 0)][DBLP ] Conf ] Toni Juan , Juan J. Navarro , Olivier Temam Data Caches for Superscalar Processors. [Citation Graph (0, 0)][DBLP ] Conf ] James Dundas , Trevor N. Mudge Improving Data Cache Performance by Pre-Executing Instructions Under a Cache Miss. [Citation Graph (0, 0)][DBLP ] Conf ] Antonio González , Mateo Valero , Nigel P. Topham , Joan-Manuel Parcerisa Eliminating Cache Conflict Misses through XOR-Based Placement Functions. [Citation Graph (0, 0)][DBLP ] Conf ] Kevin Hao Liu Performance Study on Optimal Processor Assignment in Parallel Relational Databases. [Citation Graph (0, 0)][DBLP ] Conf ] Daniel Andresen , Tao Yang Multiprocessor Scheduling with Client Resources to Improve the Response Time of WWW Applications. [Citation Graph (0, 0)][DBLP ] Conf ] Mangesh Kasbekar , Shailabh Nagar , Anand Sivasubramaniam pSNOW: A Tool to Evaluate Architectural Issues for NOW Environments. [Citation Graph (0, 0)][DBLP ] Conf ] Taisuke Boku , Ken'ichi Itakura , Hiroshi Nakamura , Kisaburo Nakazawa CP-PACS: A Massively Parallel Processor for Large Scale Scientific Calculations. [Citation Graph (0, 0)][DBLP ] Conf ] Naohito Sato , Satoshi Matsuoka , Jean-Marc Jézéquel , Akinori Yonezawa A Methodology for Specifying Data Distribution Using Only Standard Object-Oriented Features. [Citation Graph (0, 0)][DBLP ] Conf ] Elizabeth Johnson , Dennis Gannon HPC++: Experiments with the Parallel Standard Template Library. [Citation Graph (0, 0)][DBLP ] Conf ] Wu-chang Feng , Kang G. Shin Impact of Selection Functions on Routing Algorithm Performance in Multicomputer Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Aniruddha S. Vaidya , Anand Sivasubramaniam , Chita R. Das Performance Benefits of Virtual Channels and Adaptive Routing: An Application-Driven Study. [Citation Graph (0, 0)][DBLP ] Conf ] Nian-Feng Tzeng , Angkul Kongmunvattana Distributed Shared Memory Systems with Improved Barrier Synchronization and Data Transfer. [Citation Graph (0, 0)][DBLP ] Conf ] Elena Stöhr , Michael F. P. O'Boyle A Graph Based Approach to Barrier Synchronisation Minimisation. [Citation Graph (0, 0)][DBLP ] Conf ] Arjan J. C. van Gemund The Importance of Synchronization Structure in Parallel Program Optimization. [Citation Graph (0, 0)][DBLP ] Conf ] John G. Holm , John A. Chandy , Steven Parkes , Sumit Roy , Venkatram Krishnaswamy , Gagan Hasteer , Prithviraj Banerjee Performance Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Robert van Engelen , Ilja Heitlager , Lex Wolters , Gerard Cats Incorporating Application Dependent Information in an Automatic Code Generating Environment. [Citation Graph (0, 0)][DBLP ] Conf ] Vladimir Kotlyar , Keshav Pingali Sparse Code Generation for Imperfectly Nested Loops with Dependences. [Citation Graph (0, 0)][DBLP ] Conf ] José González , Antonio González Speculative Execution via Address Prediction and Data Prefetching. [Citation Graph (0, 0)][DBLP ] Conf ] Ando Ki , Alan E. Knowles Adaptive Data Prefetching Using Cache Information. [Citation Graph (0, 0)][DBLP ] Conf ] Jörg Cordsen , Hans Werner Pohl , Wolfgang Schröder-Preikschat Performance considerations in software multicasts. [Citation Graph (0, 0)][DBLP ] Conf ] William Pugh , Evan Rosser Iteration Space Slicing and Its Application to Communication Optimization. [Citation Graph (0, 0)][DBLP ] Conf ] Nikos Chrisochoides , Induprakas Kodukula , Keshav Pingali Compiler and Run-Time Support for Semi-Structured Applications. [Citation Graph (0, 0)][DBLP ] Conf ] Maria Cristina Pinotti , Sajal K. Das , Falguni Sarkar Conflict-Free Template Access in k -ary and Binomial Trees. [Citation Graph (0, 0)][DBLP ] Conf ] Daniel J. Scales , Kourosh Gharachorloo Design and Performance of the Shasta Distributed Shared Memory Protocol. [Citation Graph (0, 0)][DBLP ] Conf ] Hironori Nakajo , Satoshi Ohtani , Takashi Matsumoto , Masadi Kohata , Kei Hiraki , Yukio Kaneda An I/O Network Architecture of the Distributed Shared-Memory Massively Parallel Computer JUMP-1. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas Fahringer , Bernhard Scholz Symbolic Evaluation for Parallelizing Compilers. [Citation Graph (0, 0)][DBLP ] Conf ] Mahmut T. Kandemir , J. Ramanujam , Alok N. Choudhary A Compiler Algorithm for Optimizing Locality in Loop Nests. [Citation Graph (0, 0)][DBLP ] Conf ] Rizos Sakellariou , John R. Gurd Compile-Time Minimisation of Load Imbalance in Loop Nests. [Citation Graph (0, 0)][DBLP ] Conf ] Shlomo Reches , Shlomo Weiss Implementation and Analysis of Path History in Dynamic Branch Prediction Schemes. [Citation Graph (0, 0)][DBLP ] Conf ] Roger Espasa , Mateo Valero A Victim Cache for Vector Registers. [Citation Graph (0, 0)][DBLP ] Conf ] Soo-Mook Moon , Kemal Ebcioglu Performance Analysis of Tree VLIW Architecture for Exploiting Branch ILP in Non-Numerical Code. [Citation Graph (0, 0)][DBLP ] Conf ] Michael F. P. O'Boyle , Peter M. W. Knijnenburg Non-Singular Data Transformations: Definition, Validity and Applications. [Citation Graph (0, 0)][DBLP ] Conf ] Somnath Ghosh , Margaret Martonosi , Sharad Malik Cache Miss Equations: An Analytical Representation of Cache Misses. [Citation Graph (0, 0)][DBLP ] Conf ] Jai-Hoon Kim , Nitin H. Vaidya Adaptive Migratory Scheme for Distributed Shared Memory. [Citation Graph (0, 0)][DBLP ] Conf ] Dieter F. Kvasnicka , Christoph W. Ueberhuber Developing Architecture Adaptive Algorithms Using Simulation with MISS-PVM for Performance Prediction. [Citation Graph (0, 0)][DBLP ] Conf ] Jeff Bilmes , Krste Asanovic , Chee-Whye Chin , James Demmel Optimizing Matrix Multiply Using PHiPAC: A Portable, High-Performance, ANSI C Coding Methodology. [Citation Graph (0, 0)][DBLP ] Conf ] 