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Conferences in DBLP

International Conference on Supercomputing (ICS) (ics)
2006 (conf/ics/2006)

  1. Marc Tremblay
    A modern high-performance processor pipeline. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:1- [Conf]
  2. Greg Bronevetsky, Keshav Pingali, Paul Stodghill
    Experimental evaluation of application-level checkpointing for OpenMP programs. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:2-13 [Conf]
  3. Adam J. Oliner, Larry Rudolph, Ramendra K. Sahoo
    Cooperative checkpointing: a robust approach to large-scale systems reliability. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:14-23 [Conf]
  4. Arun Kejariwal, Xinmin Tian, Wei Li, Milind Girkar, Sergey Kozhukhov, Hideki Saito, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos
    On the performance potential of different types of speculative thread-level parallelism: The DL version of this paper includes corrections that were not made available in the printed proceedings. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:24- [Conf]
  5. Patrick Akl, Andreas Moshovos
    BranchTap: improving performance with very few checkpoints through adaptive speculation control. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:36-45 [Conf]
  6. Eduardo Quiñones, Joan-Manuel Parcerisa, Antonio González
    Selective predicate prediction for out-of-order processors. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:46-54 [Conf]
  7. Juan C. Moure, Domingo Benitez, Dolores I. Rexachs, Emilio Luque
    Wide and efficient trace prediction using the local trace predictor. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:55-65 [Conf]
  8. Kyle Rupnow, Arun Rodrigues, Keith D. Underwood, Katherine Compton
    Scientific applications vs. SPEC-FP: a comparison of program behavior. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:66-74 [Conf]
  9. Joshua J. Yi, Hans Vandierendonck, Lieven Eeckhout, David J. Lilja
    The exigency of benchmark and compiler drift: designing tomorrow's processors with yesterday's tools. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:75-86 [Conf]
  10. Davy Genbrugge, Lieven Eeckhout, Koen De Bosschere
    Accurate memory data flow modeling in statistical simulation. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:87-96 [Conf]
  11. Manolis Marazakis, Konstantinos Xinidis, Vassilis Papaefstathiou, Angelos Bilas
    Efficient remote block-level I/O over an RDMA-capable NIC. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:97-106 [Conf]
  12. Shinji Sumimoto, Kazuichi Ooe, Kouichi Kumon, Taisuke Boku, Mitsuhisa Sato, Akira Ukawa
    A scalable communication layer for multi-dimensional hyper crossbar network using multiple gigabit ethernet. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:107-115 [Conf]
  13. Dean Hildebrand, Lee Ward, Peter Honeyman
    Large files, small writes, and pNFS. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:116-124 [Conf]
  14. Wei Huang, Jiuxing Liu, Bülent Abali, Dhabaleswar K. Panda
    A case for high performance computing with virtual machines. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:125-134 [Conf]
  15. Mark Hampton, Krste Asanovic
    Implementing virtual memory in a vector processor with software restart markers. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:135-144 [Conf]
  16. Dan Wallin, Henrik Löf, Erik Hagersten, Sverker Holmgren
    Multigrid and Gauss-Seidel smoothers revisited: parallelization on chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:145-155 [Conf]
  17. Steven Prawer
    Quantum mechanical approaches to information processing. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:156- [Conf]
  18. Matthew Curtis-Maury, James Dzierwa, Christos D. Antonopoulos, Dimitrios S. Nikolopoulos
    Online power-performance adaptation of multithreaded programs using hardware event-based prediction. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:157-166 [Conf]
  19. Rajesh Vivekanandham, Bharadwaj Amrutur, R. Govindarajan
    A scalable low power issue queue for large instruction window processors. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:167-176 [Conf]
  20. Matteo Monchiero, Ramon Canal, Antonio González
    Design space exploration for multicore architectures: a power/performance/thermal view. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:177-186 [Conf]
  21. James D. Balfour, William J. Dally
    Design tradeoffs for tiled CMP on-chip networks. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:187-198 [Conf]
  22. Ahmad Faraj, Xin Yuan, David K. Lowenthal
    STAR-MPI: self tuned adaptive routines for MPI collective operations. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:199-208 [Conf]
  23. Montse Farreras, Toni Cortes, Jesús Labarta, George Almási
    Scaling MPI to short-memory MPPs such as BG/L. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:209-218 [Conf]
  24. Jyothish Varma, Chao Wang, Frank Mueller, Christian Engelmann, Stephen L. Scott
    Scalable, fault tolerant membership for MPI tasks on HPC systems. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:219-228 [Conf]
  25. Xiaosong Ma, Vincent W. Freeh, Tao Yang, Sudharshan Vazhkudai, Tyler A. Simon, Stephen L. Scott
    Coupling prefix caching and collective downloads for remote dataset access. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:229-238 [Conf]
  26. Jaume Abella, Antonio González
    Heterogeneous way-size cache. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:239-248 [Conf]
  27. Apan Qasem, Ken Kennedy
    Profitable loop fusion and tiling using model-driven empirical search. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:249-258 [Conf]
  28. Håkan Zeffer, Zoran Radovic, Martin Karlsson, Erik Hagersten
    TMA: a trap-based memory architecture. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:259-268 [Conf]
  29. Rahul Garg, Vijay K. Garg, Yogish Sabharwal
    Scalable algorithms for global snapshots in distributed systems. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:269-277 [Conf]
  30. Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang
    Feedback-directed memory disambiguation through store distance analysis. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:278-287 [Conf]
  31. Rahul P. Maddimsetty, Jeremy Buhler, Roger D. Chamberlain, Mark A. Franklin, Brandon Harris
    Accelerator design for protein sequence HMM search. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:288-296 [Conf]
  32. Keshav Pingali, Paul Stodghill
    A distributed system based on web services for computational science simulations. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:297-306 [Conf]
  33. Jeremiah Willcock, Andrew Lumsdaine
    Accelerating sparse matrix computations via data compression. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:307-316 [Conf]
  34. Daniel C. Vanderster, Nikitas J. Dimopoulos
    Sensitivity analysis of knapsack-based task scheduling on the grid. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:317-323 [Conf]
  35. Martin C. Rinard
    Probabilistic accuracy bounds for fault-tolerant computations that discard tasks. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:324-334 [Conf]
  36. Nicolas Vasilache, Cédric Bastoul, Albert Cohen, Sylvain Girbal
    Violated dependence analysis. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:335-344 [Conf]
  37. Jonathan Weinberg, Allan Snavely
    User-guided symbiotic space-sharing of real workloads. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:345-352 [Conf]
  38. Hu Chen, Wenguang Chen, Jian Huang, Bob Robert, H. Kuhn
    MPIPP: an automatic profile-guided parallel process placement toolset for SMP clusters and multiclusters. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:353-360 [Conf]
  39. Arun Kejariwal, Hideki Saito, Xinmin Tian, Milind Girkar, Wei Li, Utpal Banerjee, Alexandru Nicolau, Constantine D. Polychronopoulos
    Lightweight lock-free synchronization methods for multithreading. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:361-371 [Conf]
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