Conferences in DBLP

International Conference on Parallel Architectures and Compilation Techniques (PACT) (IEEEpact)
2003 (conf/IEEEpact/2003)

1. Harold W. Cain, Mikko H. Lipasti, Ravi Nair
   Constraint Graph Analysis of Multithreaded Programs. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 2003, pp:4-14 [Conf]
   
2. Steven E. Raasch, Steven K. Reinhardt
   The Impact of Resource Partitioning on SMT Processors. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 2003, pp:15-26 [Conf]
   
3. Nathan Tuck, Dean M. Tullsen
   Initial Observations of the Simultaneous Multithreading Pentium 4 Processor. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 2003, pp:26-0 [Conf]
   
4. Dong-yuan Chen, Lixia Liu, Chen Fu, Shuxin Yang, Chengyong Wu, Roy Dz-Ching Ju
   Efficient Resource Management during Instruction Scheduling for the EPIC Architecture. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 2003, pp:36-45 [Conf]
   
5. Aneesh Aggarwal, Manoj Franklin
   Instruction Replication: Reducing Delays Due to Inter-PE Communication Latency. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 2003, pp:46-55 [Conf]
   
6. Nicholas J. Wang, Michael Fertig, Sanjay J. Patel
   Y-Branches: When You Come to a Fork in the Road, Take It. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 2003, pp:56-0 [Conf]
   
7. Xavier Vera, Jaume Abella, Antonio González, Josep Llosa
   Optimizing Program Locality Through CMEs and GAs. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 2003, pp:68-78 [Conf]
   
8. Yutao Zhong, Steve Dropsho, Chen Ding
   Miss Rate Prediction across All Program Inputs. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 2003, pp:79-90 [Conf]
   
9. Hassan Al-Sukhni, Ian Bratt, Daniel A. Connors
   Compiler-Directed Content-Aware Prefetching for Dynamic Data Structures. [Citation Graph (0, 0)][DBLP]
   IEEE PACT, 2003, pp:91-0 [Conf]
   
10. Monica S. Lam
    Challenges and New Approaches to Program Analysis. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:102-0 [Conf]
    
11. Björn Franke, Michael F. P. O'Boyle
    Combining Program Recovery, Auto-Parallelisation and Locality Analysis for C Programs on Multi-Processor Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:104-113 [Conf]
    
12. John Ng, Dattatraya Kulkarni, Wei Li, Robert Cox, Scott Bobholz
    Inter-Procedural Loop Fusion, Array Contraction and Rotation. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:114-124 [Conf]
    
13. Akira Koseki, Hideaki Komatsu, Toshio Nakatani
    Spill Code Minimization by Spill Code Motion. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:125-134 [Conf]
    
14. Mauricio Breternitz Jr., Herbert H. J. Hum, Sanjeev Kumar
    Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:135-0 [Conf]
    
15. Toshiaki Yasue, Toshio Suganuma, Hideaki Komatsu, Toshio Nakatani
    An Efficient Online Path Profiling Framework for Java Just-In-Time Compilers. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:148-158 [Conf]
    
16. Martin Burtscher, Metha Jeeradit
    Compressing Extended Program Traces Using Value Predictors. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:159-168 [Conf]
    
17. María Jesús Garzarán, Milos Prvulovic, Víctor Viñals, José María Llabería, Lawrence Rauchwerger, Josep Torrellas
    Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:170-0 [Conf]
    
18. Phuong Hoai Ha, Philippas Tsigas
    Reactive Multi-Word Synchronization for Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:184-193 [Conf]
    
19. Anthony-Trung Nguyen, Josep Torrellas
    Design Trade-Offs in High-Throughput Coherence Controllers. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:194-205 [Conf]
    
20. Jean-Loup Baer, Douglas Low, Patrick Crowley, Neal Sidhwaney
    Memory Hierarchy Design for a Multiprocessor Look-up Engine. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:206-0 [Conf]
    
21. Chris Johnson
    Biomedical Computing and Visualization. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:218-0 [Conf]
    
22. Evelyn Duesterwald, Calin Cascaval, Sandhya Dwarkadas
    Characterizing and Predicting Program Behavior and its Variability. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:220-231 [Conf]
    
23. Kevin M. Lepak, Harold W. Cain, Mikko H. Lipasti
    Redeeming IPC as a Performance Metric for Multithreaded Programs. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:232-243 [Conf]
    
24. Erez Perelman, Greg Hamerly, Brad Calder
    Picking Statistically Valid and Early Simulation Points. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:244-0 [Conf]
    
25. Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose
    Reducing Datapath Energy through the Isolation of Short-Lived Operands. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:258-268 [Conf]
    
26. Xiaotong Zhuang, Santosh Pande
    Resolving Register Bank Conflicts for a Network Processor. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2003, pp:269-0 [Conf]