Conferences in DBLP
Dileep Bhandarkar Parallelism in Mainstream Enterprise Platforms of the Future. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:3-0 [Conf ] Daniel G. Chavarría-Miranda , John M. Mellor-Crummey An Evaluation of Data-Parallel Compiler Support for Line-Sweep Applications. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:7-17 [Conf ] Samuel Larsen , Emmett Witchel , Saman P. Amarasinghe Increasing and Detecting Memory Address Congruence. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:18-29 [Conf ] Gautham K. Dorai , Donald Yeung Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:30-0 [Conf ] Jaewook Shin , Jacqueline Chame , Mary W. Hall Compiler-Controlled Caching in Superword Register Files for Multimedia Extension Architectures. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:45-55 [Conf ] Jack Liu , Timothy Kong , Fred C. Chow Effective Compilation Support for Variable Instruction Set Architecture. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:56-67 [Conf ] Xiaotong Zhuang , Santosh Pande , John S. Greenland Jr. A Framework for Parallelizing Load/Stores on Embedded Processors. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:68-0 [Conf ] Lieven Eeckhout , Hans Vandierendonck , Koenraad De Bosschere Workload Design: Selecting Representative Program-Input Pairs. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:83-94 [Conf ] Bernhard Scholz , Eduard Mehofer Dataflow Frequency Analysis Based on Whole Program Paths. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:95-103 [Conf ] Eric Tune , Dean M. Tullsen , Brad Calder Quantifying Instruction Criticality. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:104-0 [Conf ] Steve Hammond The Role of Computational Science in Energy Efficiency and Renewable Energy. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:117-0 [Conf ] Taliver Heath , Eduardo Pinheiro , Jerry Hom , Ulrich Kremer , Ricardo Bianchini Application Transformations for Energy and Performance-Aware Device Management. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:121-130 [Conf ] Lin Li , Ismail Kadayif , Yuh-Fang Tsai , Narayanan Vijaykrishnan , Mahmut T. Kandemir , Mary Jane Irwin , Anand Sivasubramaniam Leakage Energy Management in Cache Hierarchies. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:131-140 [Conf ] Steve Dropsho , Alper Buyuktosunoglu , Rajeev Balasubramonian , David H. Albonesi , Sandhya Dwarkadas , Greg Semeraro , Grigorios Magklis , Michael L. Scott Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:141-0 [Conf ] Manuel E. Acacio , José González , José M. García , José Duato The Use of Prediction for Accelerating Upgrade Misses in cc-NUMA Multiprocessors. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:155-164 [Conf ] Gabriel H. Loh , Dana S. Henry Predicting Conditional Branches With Fusion-Based Hybrid Predictors. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:165-0 [Conf ] Chris Gniady , Babak Falsafi Speculative Sequential Consistency with Little Custom Storage. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:179-188 [Conf ] Daniel Ortega , Eduard Ayguadé , Jean-Loup Baer , Mateo Valero Cost-Effective Compiler Directed Memory Prefetching and Bypassing. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:189-198 [Conf ] Zhenlin Wang , Kathryn S. McKinley , Arnold L. Rosenberg , Charles C. Weems Using the Compiler to Improve Cache Replacement Decisions. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:199-0 [Conf ] Benjamin Goldberg , Emily Crutcher , Chad Huneycutt , Krishna V. Palem Software Bubbles: Using Predication to Compensate for Aliasing in Software Pipelines. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:211-221 [Conf ] Manel Fernández , Roger Espasa Speculative Alias Analysis for Executable Code. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:222-231 [Conf ] Soner Önder Cost Effective Memory Dependence Prediction using Speculation Levels and Color Sets. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:232-0 [Conf ] Richard Wolski The Computational Grid: Aggregating Performance and Enhanced Capability from Federated Resources. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:245-0 [Conf ] Tatiana Shpeisman , Guei-Yuan Lueh , Ali-Reza Adl-Tabatabai Just-In-Time Java? Compilation for the Itanium® Processor. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:249-258 [Conf ] Kazuaki Ishizaki , Tatsushi Inagaki , Hideaki Komatsu , Toshio Nakatani Eliminating Exception Constraints of Java Programs for IA-64. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:259-0 [Conf ] Yi Qian , Steve Carr , Philip H. Sweany Optimizing Loop Performance for Clustered VLIW Architectures. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:271-280 [Conf ] Alex Aletà , Josep M. Codina , F. Jesús Sánchez , Antonio González , David R. Kaeli Exploiting Pseudo-Schedules to Guide Data Dependence Graph Partitioning. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:281-290 [Conf ] Joan-Manuel Parcerisa , Julio Sahuquillo , Antonio González , José Duato Efficient Interconnects for Clustered Microarchitectures. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:291-0 [Conf ] David A. Patterson SIGARCH Conference Guidelines. [Citation Graph (0, 0)][DBLP ] IEEE PACT, 2002, pp:301-0 [Conf ]