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Conferences in DBLP

International Symposium om Computer Architecture (ISCA) (isca)
2006 (conf/isca/2006)


  1. Message from the General Chair. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:- [Conf]

  2. Message from the Program Chair. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:- [Conf]

  3. SIGARCH Guidelines. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:- [Conf]

  4. Reviewers. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:- [Conf]
  5. Yale N. Patt
    Computer Architecture Research and Future Microprocessors: Where Do We Go from Here? [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:2- [Conf]
  6. Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park
    A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:4-15 [Conf]
  7. Steve Scott, Dennis Abts, John Kim, William J. Dally
    The BlackWidow High-Radix Clos Network. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:16-28 [Conf]
  8. Arvind, Jan-Willem Maessen
    Memory Model = Instruction Reordering + Store Atomicity. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:29-40 [Conf]
  9. Christoph von Praun, Harold W. Cain, Jong-Deok Choi, Kyung Dong Ryu
    Conditional Memory Ordering. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:41-52 [Conf]
  10. Austen McDonald, JaeWoong Chung, Brian D. Carlstrom, Chi Cao Minh, Hassan Chafi, Christos Kozyrakis, Kunle Olukotun
    Architectural Semantics for Practical Transactional Memory. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:53-65 [Conf]
  11. Parthasarathy Ranganathan, Phil Leech, David E. Irwin, Jeffrey S. Chase
    Ensemble-level Power Management for Dense Blade Servers. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:66-77 [Conf]
  12. James Donald, Margaret Martonosi
    Techniques for Multicore Thermal Management: Classification and New Exploration. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:78-88 [Conf]
  13. Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner
    SODA: A Low-power Architecture For Software Radio. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:89-101 [Conf]
  14. Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, Mrinmoy Ghosh
    An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:102-113 [Conf]
  15. Richard A. Hankins, Gautham N. Chinya, Jamison D. Collins, Perry H. Wang, Ryan Rakvic, Hong Wang, John Paul Shen
    Multiple Instruction Stream Processor. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:114-127 [Conf]
  16. Philip G. Emma
    The End of Scaling? Revolutions in Technology and Microarchitecture as We Pass the 90 Nanometer Node. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:128- [Conf]
  17. Feihui Li, Chrysostomos Nicopoulos, Thomas D. Richardson, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir
    Design and Management of 3D Chip Multiprocessors Using Network-in-Memory. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:130-141 [Conf]
  18. Alok Garg, M. Wasiur Rashid, Michael C. Huang
    Slackened Memory Dependence Enforcement: Combining Opportunistic Forwarding with Decoupled Verification. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:142-154 [Conf]
  19. Chuanjun Zhang
    Balanced Cache: Reducing Conflict Misses of Direct-Mapped Caches. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:155-166 [Conf]
  20. Moinuddin K. Qureshi, Daniel N. Lynch, Onur Mutlu, Yale N. Patt
    A Case for MLP-Aware Cache Replacement. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:167-178 [Conf]
  21. Chenyu Yan, Daniel Englender, Milos Prvulovic, Brian Rogers, Yan Solihin
    Improving Cost, Performance, and Security of Memory Encryption and Authentication. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:179-190 [Conf]
  22. Benjamin C. Brodie, David E. Taylor, Ron K. Cytron
    A Scalable Architecture For High-Throughput Regular-Expression Pattern Matching. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:191-202 [Conf]
  23. Jahangir Hasan, Srihari Cadambi, Venkata Jakkula, Srimat T. Chakradhar
    Chisel: A Storage-efficient, Collision-free Hash-based Network Processing Architecture. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:203-215 [Conf]
  24. Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry
    Tolerating Dependences Between Large Speculative Threads Via Sub-Threads. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:216-226 [Conf]
  25. Luis Ceze, James Tuck, Josep Torrellas, Calin Cascaval
    Bulk Disambiguation of Speculative Threads in Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:227-238 [Conf]
  26. Seungryul Choi, Donald Yeung
    Learning-Based SMT Processor Resource Distribution via Hill-Climbing. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:239-251 [Conf]
  27. Stephen Somogyi, Thomas F. Wenisch, Anastassia Ailamaki, Babak Falsafi, Andreas Moshovos
    Spatial Memory Streaming. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:252-263 [Conf]
  28. Jichuan Chang, Gurindar S. Sohi
    Cooperative Caching for Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:264-276 [Conf]
  29. Shiliang Hu, James E. Smith
    Reducing Startup Time in Co-Designed Virtual Machines. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:277-288 [Conf]
  30. Qing Yang, Weijun Xiao, Jin Ren
    TRAP-Array: A Disk Array Architecture Providing Timely Recovery to Any Point-in-time. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:289-301 [Conf]
  31. Saisanthosh Balakrishnan, Gurindar S. Sohi
    Program Demultiplexing: Data-flow based Speculative Parallelization of Methods in Sequential Programs. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:302-313 [Conf]
  32. Steven Swanson, Andrew Putnam, Martha Mercaldi, Ken Michelson, Andrew Petersen, Andrew Schwerin, Mark Oskin, Susan J. Eggers
    Area-Performance Trade-offs in Tiled Dataflow Architectures. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:314-326 [Conf]
  33. Karin Strauss, Xiaowei Shen, Josep Torrellas
    Flexible Snooping: Adaptive Forwarding and Filtering of Snoops in Embedded-Ring Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:327-338 [Conf]
  34. Liqun Cheng, Naveen Muralimanohar, Karthik Ramani, Rajeev Balasubramonian, John B. Carter
    Interconnect-Aware Coherence Protocols for Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:339-351 [Conf]
  35. Steve Herrod
    The Future of Virtualization Technology. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:352- [Conf]
  36. Rodney Van Meter, Kae Nemoto, W. J. Munro, Kohei M. Itoh
    Distributed Arithmetic on a Quantum Multicomputer. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:354-365 [Conf]
  37. Nemanja Isailovic, Yatish Patel, Mark Whitney, John Kubiatowicz
    Interconnection Networks for Scalable Quantum Computers. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:366-377 [Conf]
  38. Darshan D. Thaker, Tzvetan S. Metodi, Andrew W. Cross, Isaac L. Chuang, Frederic T. Chong
    Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:378-390 [Conf]
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