Conferences in DBLP
Message from the General Chair. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:- [Conf ] Message from the Program Chair. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:- [Conf ] SIGARCH Guidelines. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:- [Conf ] Reviewers. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:- [Conf ] Yale N. Patt Computer Architecture Research and Future Microprocessors: Where Do We Go from Here? [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:2- [Conf ] Jongman Kim , Chrysostomos Nicopoulos , Dongkook Park A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:4-15 [Conf ] Steve Scott , Dennis Abts , John Kim , William J. Dally The BlackWidow High-Radix Clos Network. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:16-28 [Conf ] Arvind , Jan-Willem Maessen Memory Model = Instruction Reordering + Store Atomicity. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:29-40 [Conf ] Christoph von Praun , Harold W. Cain , Jong-Deok Choi , Kyung Dong Ryu Conditional Memory Ordering. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:41-52 [Conf ] Austen McDonald , JaeWoong Chung , Brian D. Carlstrom , Chi Cao Minh , Hassan Chafi , Christos Kozyrakis , Kunle Olukotun Architectural Semantics for Practical Transactional Memory. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:53-65 [Conf ] Parthasarathy Ranganathan , Phil Leech , David E. Irwin , Jeffrey S. Chase Ensemble-level Power Management for Dense Blade Servers. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:66-77 [Conf ] James Donald , Margaret Martonosi Techniques for Multicore Thermal Management: Classification and New Exploration. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:78-88 [Conf ] Yuan Lin , Hyunseok Lee , Mark Woh , Yoav Harel , Scott A. Mahlke , Trevor N. Mudge , Chaitali Chakrabarti , Krisztián Flautner SODA: A Low-power Architecture For Software Radio. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:89-101 [Conf ] Weidong Shi , Hsien-Hsin S. Lee , Laura Falk , Mrinmoy Ghosh An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:102-113 [Conf ] Richard A. Hankins , Gautham N. Chinya , Jamison D. Collins , Perry H. Wang , Ryan Rakvic , Hong Wang , John Paul Shen Multiple Instruction Stream Processor. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:114-127 [Conf ] Philip G. Emma The End of Scaling? Revolutions in Technology and Microarchitecture as We Pass the 90 Nanometer Node. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:128- [Conf ] Feihui Li , Chrysostomos Nicopoulos , Thomas D. Richardson , Yuan Xie , Narayanan Vijaykrishnan , Mahmut T. Kandemir Design and Management of 3D Chip Multiprocessors Using Network-in-Memory. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:130-141 [Conf ] Alok Garg , M. Wasiur Rashid , Michael C. Huang Slackened Memory Dependence Enforcement: Combining Opportunistic Forwarding with Decoupled Verification. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:142-154 [Conf ] Chuanjun Zhang Balanced Cache: Reducing Conflict Misses of Direct-Mapped Caches. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:155-166 [Conf ] Moinuddin K. Qureshi , Daniel N. Lynch , Onur Mutlu , Yale N. Patt A Case for MLP-Aware Cache Replacement. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:167-178 [Conf ] Chenyu Yan , Daniel Englender , Milos Prvulovic , Brian Rogers , Yan Solihin Improving Cost, Performance, and Security of Memory Encryption and Authentication. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:179-190 [Conf ] Benjamin C. Brodie , David E. Taylor , Ron K. Cytron A Scalable Architecture For High-Throughput Regular-Expression Pattern Matching. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:191-202 [Conf ] Jahangir Hasan , Srihari Cadambi , Venkata Jakkula , Srimat T. Chakradhar Chisel: A Storage-efficient, Collision-free Hash-based Network Processing Architecture. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:203-215 [Conf ] Christopher B. Colohan , Anastassia Ailamaki , J. Gregory Steffan , Todd C. Mowry Tolerating Dependences Between Large Speculative Threads Via Sub-Threads. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:216-226 [Conf ] Luis Ceze , James Tuck , Josep Torrellas , Calin Cascaval Bulk Disambiguation of Speculative Threads in Multiprocessors. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:227-238 [Conf ] Seungryul Choi , Donald Yeung Learning-Based SMT Processor Resource Distribution via Hill-Climbing. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:239-251 [Conf ] Stephen Somogyi , Thomas F. Wenisch , Anastassia Ailamaki , Babak Falsafi , Andreas Moshovos Spatial Memory Streaming. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:252-263 [Conf ] Jichuan Chang , Gurindar S. Sohi Cooperative Caching for Chip Multiprocessors. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:264-276 [Conf ] Shiliang Hu , James E. Smith Reducing Startup Time in Co-Designed Virtual Machines. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:277-288 [Conf ] Qing Yang , Weijun Xiao , Jin Ren TRAP-Array: A Disk Array Architecture Providing Timely Recovery to Any Point-in-time. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:289-301 [Conf ] Saisanthosh Balakrishnan , Gurindar S. Sohi Program Demultiplexing: Data-flow based Speculative Parallelization of Methods in Sequential Programs. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:302-313 [Conf ] Steven Swanson , Andrew Putnam , Martha Mercaldi , Ken Michelson , Andrew Petersen , Andrew Schwerin , Mark Oskin , Susan J. Eggers Area-Performance Trade-offs in Tiled Dataflow Architectures. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:314-326 [Conf ] Karin Strauss , Xiaowei Shen , Josep Torrellas Flexible Snooping: Adaptive Forwarding and Filtering of Snoops in Embedded-Ring Multiprocessors. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:327-338 [Conf ] Liqun Cheng , Naveen Muralimanohar , Karthik Ramani , Rajeev Balasubramonian , John B. Carter Interconnect-Aware Coherence Protocols for Chip Multiprocessors. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:339-351 [Conf ] Steve Herrod The Future of Virtualization Technology. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:352- [Conf ] Rodney Van Meter , Kae Nemoto , W. J. Munro , Kohei M. Itoh Distributed Arithmetic on a Quantum Multicomputer. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:354-365 [Conf ] Nemanja Isailovic , Yatish Patel , Mark Whitney , John Kubiatowicz Interconnection Networks for Scalable Quantum Computers. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:366-377 [Conf ] Darshan D. Thaker , Tzvetan S. Metodi , Andrew W. Cross , Isaac L. Chuang , Frederic T. Chong Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing. [Citation Graph (0, 0)][DBLP ] ISCA, 2006, pp:378-390 [Conf ]