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Conferences in DBLP

International Symposium om Computer Architecture (ISCA) (isca)
1997 (conf/isca/97)

  1. Sriram Vajapeyam, Tulika Mitra
    Improving Superscalar Instruction Dispatch and Issue by Exploiting Dynamic Code Sequences. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:1-12 [Conf]
  2. Ravi Nair, Martin E. Hopkins
    Exploiting Instruction Level Parallelism in Processors by Caching Scheduled Groups. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:13-25 [Conf]
  3. Kemal Ebcioglu, Erik R. Altman
    DAISY: Dynamic Compilation for 100% Architectural Compatibility. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:26-37 [Conf]
  4. Timothy Mark Pinkston, Sugath Warnakulasuriya
    On Deadlocks in Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:38-49 [Conf]
  5. Craig B. Stunkel, Rajeev Sivaram, Dhabaleswar K. Panda
    Implementing Multidestination Worms in Switch-Based Parallel Systems: Architectural Alternatives and their Impact. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:50-61 [Conf]
  6. Guillermo A. Alvarez, Walter A. Burkhard, Flaviu Cristian
    Tolerating Multiple Failures in RAID Architectures with Optimal Storage and Uniform Declustering. [Citation Graph (1, 0)][DBLP]
    ISCA, 1997, pp:62-72 [Conf]
  7. Dan Teodosiu, Joel Baxter, Kinshuk Govil, John Chapin, Mendel Rosenblum, Mark Horowitz
    Hardware Fault Containment in Scalable Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:73-84 [Conf]
  8. Richard P. Martin, Amin Vahdat, David E. Culler, Thomas E. Anderson
    Effects of Communication Latency, Overhead, and Bandwidth in a Cluster Architecture. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:85-97 [Conf]
  9. Wolf-Dietrich Weber, Stephen Gold, Pat Helland, Takeshi Shimizu, Thomas Wicki, Winfried W. Wilcke
    The Mercury Interconnect Architecture: A Cost-effective Infrastructure for High-performance Servers. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:98-107 [Conf]
  10. Ziyad S. Hakura, Anoop Gupta
    The Design and Analysis of a Cache Architecture for Texture Mapping. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:108-120 [Conf]
  11. Kenneth M. Wilson, Kunle Olukotun
    Designing High Bandwidth On-Chip Caches. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:121-132 [Conf]
  12. Keith I. Farkas, Paul Chow, Norman P. Jouppi, Zvonko G. Vranesic
    Memory-System Design Considerations for Dynamically-Scheduled Processors. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:133-143 [Conf]
  13. Parthasarathy Ranganathan, Vijay S. Pai, Hazim Abdel-Shafi, Sarita V. Adve
    The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:144-156 [Conf]
  14. Leonidas I. Kontothanassis, Galen C. Hunt, Robert Stets, Nikos Hardavellas, Michal Cierniak, Srinivasan Parthasarathy, Wagner Meira Jr., Sandhya Dwarkadas, Michael L. Scott
    VM-Based Shared Memory on Low-Latency, Remote-Memory-Access Networks. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:157-169 [Conf]
  15. Alain Kägi, Doug Burger, James R. Goodman
    Efficient Synchronization: Let Them Eat QOLB. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:170-180 [Conf]
  16. Andreas Moshovos, Scott E. Breach, T. N. Vijaykumar, Gurindar S. Sohi
    Dynamic Speculation and Synchronization of Data Dependences. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:181-193 [Conf]
  17. Avinash Sodani, Gurindar S. Sohi
    Dynamic Instruction Reuse. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:194-205 [Conf]
  18. Subbarao Palacharla, Norman P. Jouppi, James E. Smith
    Complexity-Effective Superscalar Processors. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:206-218 [Conf]
  19. Maged M. Michael, Ashwini K. Nanda, Beng-Hong Lim, Michael L. Scott
    Coherence Controller Architectures for SMP-Based CC-NUMA Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:219-228 [Conf]
  20. Babak Falsafi, David A. Wood
    Reactive NUMA: A Design for Unifying S-COMA and CC-NUMA. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:229-240 [Conf]
  21. James Laudon, Daniel Lenoski
    The SGI Origin: A ccNUMA Highly Scalable Server. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:241-251 [Conf]
  22. Doug Joseph, Dirk Grunwald
    Prefetching Using Markov Predictors. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:252-263 [Conf]
  23. Vatsa Santhanam, Edward H. Gornish, Wei-Chung Hsu
    Data Prefetching on the HP PA-8000. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:264-273 [Conf]
  24. Po-Yung Chang, Eric Hao, Yale N. Patt
    Target Prediction for Indirect Jumps. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:274-283 [Conf]
  25. Eric Sprangle, Robert S. Chappell, Mitch Alsup, Yale N. Patt
    The Agree Predictor: A Mechanism for Reducing Negative Branch History Interference. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:284-291 [Conf]
  26. Pierre Michaud, André Seznec, Richard Uhlig
    Trading Conflict and Capacity Aliasing in Conditional Branch Predictors. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:292-303 [Conf]
  27. Joel S. Emer, Nicholas C. Gloy
    A Language for Describing Predictors and Its Application to Automatic Synthesis. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:304-314 [Conf]
  28. Teresa L. Johnson, Wen-mei W. Hwu
    Run-Time Adaptive Cache Hierarchy Management via Reference Analysis. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:315-326 [Conf]
  29. Richard Fromm, Stylianos Perissakis, Neal Cardwell, Christoforos E. Kozyrakis, Bruce McGaughy, David A. Patterson, Thomas E. Anderson, Katherine A. Yelick
    The Energy Efficiency of IRAM Architectures. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:327-337 [Conf]
  30. Doug Burger, Stefanos Kaxiras, James R. Goodman
    DataScalar Architectures. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:338-349 [Conf]
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