Conferences in DBLP
Ryo Mukai , Hiroshi Sawada , Shoko Araki , Shoji Makino Frequency domain blind source separation using small and large spacing sensor pairs. [Citation Graph (0, 0)][DBLP ] Conf ] Milutin Stanacevic , Gert Cauwenberghs , Laurence Riddle Gradient flow bearing estimation with blind identification of multiple signals and interference. [Citation Graph (0, 0)][DBLP ] Conf ] Daniele Vigliano , Aurelio Uncini , Raffaele Parisi Nonlinear ICA solutions for convolutive mixing of PNL mixtures. [Citation Graph (0, 0)][DBLP ] Conf ] Masashi Ohata , Toshiharu Mukai , Kiyotoshi Matsuoka Blind separation with Gaussian mixture model for convolutively mixed sources. [Citation Graph (0, 0)][DBLP ] Conf ] Ziauddin M. Kamran , Thiagalingam Kirubarajan , Alex B. Gershman Blind estimation and equalization of time-varying channels using the interacting multiple model estimator. [Citation Graph (0, 0)][DBLP ] Conf ] Yajun Kou , Wu-Sheng Lu , Andreas Antoniou New algorithm for blind adaptive equalization based on constant modulus criterion. [Citation Graph (0, 0)][DBLP ] Conf ] Derong Liu , Sanquing Hu Sequential blind extraction of mixed source signals with guaranteed convergence. [Citation Graph (0, 0)][DBLP ] Conf ] Ke Deng , Qinye Yin , Ming Luo , Zheng Zhao A vertical layered space-time code and its blind symbol detection. [Citation Graph (0, 0)][DBLP ] Conf ] Khurram Waheed , Fathi M. Salem Blind source recovery for non-minimum phase surroundings. [Citation Graph (0, 0)][DBLP ] Conf ] Pando G. Georgiev , Andrzej Cichocki Sparse component analysis of overcomplete mixtures by improved basis pursuit method. [Citation Graph (0, 0)][DBLP ] Conf ] Yihai Zhang , T. Aaron Gulliver A dual mode decision feedback equalizer employing the conjugate gradient algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Yanxing Zeng , Qinye Yin , Le Ding , Ke Deng Blind uplink space-time channel estimation for space-time coded multicarrier code division multiple access systems. [Citation Graph (0, 0)][DBLP ] Conf ] Weizhou Su , Wei Xing Zheng A polynomial method for blind identification of MIMO channels. [Citation Graph (0, 0)][DBLP ] Conf ] Junaid A. Khan , Sadiq M. Sait Fast force-directed/simulated evolution hybrid for multiobjective VLSI cell placement. [Citation Graph (0, 0)][DBLP ] Conf ] Mongkol Ekpanyapong , Karthik Balakrishnan , Vidit Nanda , Sung Kyu Lim Simultaneous delay and power optimization in global placement. [Citation Graph (0, 0)][DBLP ] Conf ] Sheqin Dong , Zhong Yang , Xianlong Hong , Yuliang Wu Module placement based on quadratic programming and rectangle packing using less flexibility first principle. [Citation Graph (0, 0)][DBLP ] Conf ] Ling Zhang , Tong Jing , Xianlong Hong , Jingyu Xu , Jinjun Xiong , Lei He Performance and RLC crosstalk driven global routing. [Citation Graph (0, 0)][DBLP ] Conf ] Pun Hang Shiu , Ramprasad Ravichandran , Siddharth Easwar , Sung Kyu Lim Multi-layer floorplanning for reliable system-on-package. [Citation Graph (0, 0)][DBLP ] Conf ] Bo-Kyung Choi , Charles Chiang , Jamil Kawa , Majid Sarrafzadeh Routing resources consumption on M-arch and X-arch. [Citation Graph (0, 0)][DBLP ] Conf ] Lihong Zhang , Rabin Raut , Yingtao Jiang A placement algorithm for implementation of analog LSI/VLSI systems. [Citation Graph (0, 0)][DBLP ] Conf ] Changqi Yang , Xianlong Hong , Hannah Honghua Yang , Qiang Zhou , Yici Cai , Yongqiang Lu Recursively combine floorplan and Q-place in mixed mode placement based on circuit's variety of block configuration. [Citation Graph (0, 0)][DBLP ] Conf ] Bin Liu , Yici Cai , Qiang Zhou , Xianlong Hong Layer assignment algorithm for RLC crosstalk minimization. [Citation Graph (0, 0)][DBLP ] Conf ] Hailong Yao , Qiang Zhou , Xianlong Hong , Yici Cai Crosstalk driven routing resource assignment. [Citation Graph (0, 0)][DBLP ] Conf ] Jinho Park , David J. Allstot RF circuit synthesis using particle swarm optimization. [Citation Graph (0, 0)][DBLP ] Conf ] Jesús Ruiz-Amaya , José Manuel de la Rosa Utrera , Fernando Manuel Medeiro Hidalgo , Francisco V. Fernández , Rocio del Río , Maria Belen Pérez-Verdú , Ángel Rodríguez-Vázquez An optimization-based tool for the high-level synthesis of discrete-time and continuous-time /spl Sigma//spl Delta/ modulators in the Matlab/Simulink environment. [Citation Graph (0, 0)][DBLP ] Conf ] Lihong Zhang , Ulrich Kleine A novel analog layout synthesis tool. [Citation Graph (0, 0)][DBLP ] Conf ] Junjie Yang , Sheldon X.-D. Tan Behavioural modelling of analog circuits by dynamic semi-symbolic analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Matt Francis , Vivek Chaudhary , H. Alan Mantooth Compact semiconductor device modelling using higher level methods. [Citation Graph (0, 0)][DBLP ] Conf ] Hamilton Klimach , Alfredo Arnaud , Márcio C. Schneider , Carlos Galup-Montoro Consistent model for drain current mismatch in MOSFETs using the carrier number fluctuation theory. [Citation Graph (0, 0)][DBLP ] Conf ] Alessandro Savio , Luigi Colalongo , Zsolt Miklós Kovács-Vajna , Michele Quarantelli Scaling rules and parameter tuning procedure for analog design reuse in technology migration. [Citation Graph (0, 0)][DBLP ] Conf ] Natalie Nakhla , Anestis Dounavis , Ramachandra Achar , Michel S. Nakhla Fast sensitivity analysis of transmission line networks. [Citation Graph (0, 0)][DBLP ] Conf ] Hui Zhang , Alex Doboli Fast time-domain symbolic simulation for synthesis of sigma-delta analog-digital converters. [Citation Graph (0, 0)][DBLP ] Conf ] Junjie Yang , Sheldon X.-D. Tan An efficient algorithm for transient and distortion analysis of mildly nonlinear analog circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Bogdan J. Falkowski , Cicilia C. Lozano , Susanto Rahardja Generation of disjoint cubes for multiple-valued functions. [Citation Graph (0, 0)][DBLP ] Conf ] Chi-Wei Hu , TingTing Hwang Output-pattern directed decomposition for low power design. [Citation Graph (0, 0)][DBLP ] Conf ] Hongtu Jiang , Viktor Öwall FPGA implementation of controller-datapath pair in custom image processor design. [Citation Graph (0, 0)][DBLP ] Conf ] Yi-Ching Au , Chi-Ying Tsui Least leakage vector assisted technology mapping for total power optimization. [Citation Graph (0, 0)][DBLP ] Conf ] Ajit Sharma , Chenggang Xu , Wen Kung Chu , Nishath K. Verghese , Terri S. Fiez , Kartikeya Mayaram A predictive methodology for accurate substrate parasitic extraction. [Citation Graph (0, 0)][DBLP ] Conf ] Ken-ichi Okada , Hiroaki Hoshino , Hidetoshi Onodera Modelling and optimization of on-chip spiral inductor in S-parameter domain. [Citation Graph (0, 0)][DBLP ] Conf ] Robert Shreeve , Terri S. Fiez , Kartikeya Mayaram A physical and analytical model for substrate noise coupling analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Chenggang Xu , Terri S. Fiez , Kartikeya Mayaram An improved Z-parameter macro model for substrate noise coupling. [Citation Graph (0, 0)][DBLP ] Conf ] Zhao Li , C.-J. Richard Shi A coupled iterative/direct method for efficient time-domain simulation of nonlinear circuits with power/ground networks. [Citation Graph (0, 0)][DBLP ] Conf ] João M. S. Silva , Luís M. Silveira Multigrid-based substrate coupling model extraction. [Citation Graph (0, 0)][DBLP ] Conf ] Weikun Guo , Sheldon X.-D. Tan , Zuying Luo , Xianlong Hong Partial random walk for large linear network analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Janet Meiling Wang , Omar Hafiz Matrix pencil based realizable reduction for distributed interconnects. [Citation Graph (0, 0)][DBLP ] Conf ] Nisar Ahmed , Mohammad H. Tehranipour , Dian Zhou , Mehrdad Nourani Frequency driven repeater insertion for deep submicron. [Citation Graph (0, 0)][DBLP ] Conf ] Ilhan Hatirnaz , Yusuf Leblebici Modelling and implementation of twisted differential on-chip interconnects for crosstalk noise reduction. [Citation Graph (0, 0)][DBLP ] Conf ] Alexandre Verle , Xavier Michel , Philippe Maurine , Nadine Azémard , Daniel Auvergne Delay bound based CMOS gate sizing technique. [Citation Graph (0, 0)][DBLP ] Conf ] Jorge Aguila-Meza , Leticia Torres-Papaqui , Esteban Tlelo-Cuautle Improving symbolic analysis in CMOS analog integrated circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Naofumi Homma , Jun Sakiyama , Taihei Wakamatsu , Takafumi Aoki , Tatsuo Higuchi A systematic approach for analyzing fast addition algorithms using counter tree diagrams. [Citation Graph (0, 0)][DBLP ] Conf ] Fei Xu , Chip-Hong Chang , Ching-Chuen Jong HWP: a new insight into canonical signed digit. [Citation Graph (0, 0)][DBLP ] Conf ] Ching-Chung Hu , De-Sheng Chen , Yi-Wen Wang Fast multilevel floorplanning for large scale modules. [Citation Graph (0, 0)][DBLP ] Conf ] Pushkin R. Pari , Lin Yuan , Gang Qu How many solutions does a SAT instance have? [Citation Graph (0, 0)][DBLP ] Conf ] Miroslav N. Velev A new generation of ISCAS benchmarks from formal verification of high-level microprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Rouying Zhan , Haigang Feng , Haolu Xie , Albert Z. Wang ESDInspector: a new layout-level ESD protection circuitry design verification tool using a smart-parametric checking mechanism. [Citation Graph (0, 0)][DBLP ] Conf ] Andreas G. Veneris , Robert Chang , Magdy S. Abadir , Mandana Amiri Fault equivalence and diagnostic test generation using ATPG. [Citation Graph (0, 0)][DBLP ] Conf ] Chuen-Yau Chen , An-Chi Hsu A hybrid-type test pattern generating mechanism. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas Eschbach , Rolf Dreschler , Bernd Becker Placement and routing optimization for circuits derived from BDDs. [Citation Graph (0, 0)][DBLP ] Conf ] Haibo Long , Zhenghe Feng , Haigang Feng , Albert Z. Wang , Tianling Ren L-simulator: a magPEEC-based new CAD tool for simulating magnetic-enhanced IC inductors of 3D arbitrary geometry. [Citation Graph (0, 0)][DBLP ] Conf ] Yi-Wei Lin , Jing-Yang Jou An efficient approach for hierarchical submodule extraction. [Citation Graph (0, 0)][DBLP ] Conf ] Yang Wang , Yici Cai , Xianlong Hong , Qiang Zhou Algorithm for yield driven correction of layout. [Citation Graph (0, 0)][DBLP ] Conf ] Carlos Sánchez-López , Esteban Tlelo-Cuautle Symbolic noise analysis in analog integrated circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Lily Huang , Tai-Ying Jiang , Jing-Yang Jou , Heng-Liang Huang An efficient logic extraction algorithm using partitioning and circuit encoding. [Citation Graph (0, 0)][DBLP ] Conf ] Giorgio Casinovi , Giuseppe M. Veca Frequency-domain error analysis of linear multistep methods. [Citation Graph (0, 0)][DBLP ] Conf ] Shekhar Kopuri , Nazanin Mansouri Enhancing scheduling solutions through ant colony optimization. [Citation Graph (0, 0)][DBLP ] Conf ] Ling Wang , Yingtao Jiang , Henry Selvaraj Synthesis scheme for low power designs with multiple supply voltages by tabu search. [Citation Graph (0, 0)][DBLP ] Conf ] Sean E. Krakiwsky , Laurence E. Turner , Michal M. Okoniewski Graphics processor unit (GPU) acceleration of finite-difference time-domain (FDTD) algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Lakshmi Kalpana Vakati , Janet Meiling Wang A new multi-ramp driver model with RLC interconnect load. [Citation Graph (0, 0)][DBLP ] Conf ] Gülin Tulunay , Sina Balkir A compact optimization methodology for single-ended LNA. [Citation Graph (0, 0)][DBLP ] Conf ] Rodrigo L. Oliveira Pinto , Franco Maloberti X ray and blue print: tools for MOSFET analog circuit design addressing short-channel effects. [Citation Graph (0, 0)][DBLP ] Conf ] Hessa Aljunaid , Tom J. Kazmierski SEAMS - a SystemC environment with analog and mixed-signal extensions. [Citation Graph (0, 0)][DBLP ] Conf ] Bogdan J. Falkowski , Cheng Fu Properties of fastest linearly independent transforms over GF(3). [Citation Graph (0, 0)][DBLP ] Conf ] Cheng Fu , Bogdan J. Falkowski Multi-polarity helix transform over GF(3). [Citation Graph (0, 0)][DBLP ] Conf ] Kai-Yuan Jheng , Shyh-Jye Jou , An-Yeu Wu A design flow for multiplierless linear-phase FIR filters: from system specification to Verilog code. [Citation Graph (0, 0)][DBLP ] Conf ] Xin Zhao , Yici Cai , Qiang Zhou , Xianlong Hong , Lei He , Jinjun Xiong Shielding area optimization under the solution of interconnect crosstalk. [Citation Graph (0, 0)][DBLP ] Conf ] Rajani Parthasarthy , Ivan S. Kourtev Performance metrics for asynchronous digital circuits applicable to computer-aided design. [Citation Graph (0, 0)][DBLP ] Conf ] Yoichi Yuyama , Masao Aramoto , Kazutoshi Kobayashi , Hidetoshi Onodera RTL/ISS co-modeling methodology for embedded processor using SystemC. [Citation Graph (0, 0)][DBLP ] Conf ] Ralph Marczynski , Mitchell A. Thornton , Stephen A. Szygenda Test vector generation and classification using FSM traversals. [Citation Graph (0, 0)][DBLP ] Conf ] Jounaïdi Ben Hassen , Sofiène Tahar Formal verification of an SoC platform protocol converter. [Citation Graph (0, 0)][DBLP ] Conf ] Mohamed N. Wageeh , Ayman M. Wahba , Ashraf M. Salem , Mohamed A. Sheirah FPGA based accelerator for functional simulation. [Citation Graph (0, 0)][DBLP ] Conf ] Jian Wang , Xuan Zeng , Wei Cai , Charles Chiang , Jiarong Tong , Dian Zhou Frequency domain wavelet method with GMRES for large-scale linear circuit simulation. [Citation Graph (0, 0)][DBLP ] Conf ] Ali Abbasian , Safar Hatami , Ali Afzali-Kusha , Mehrdad Nourani , Carco Lucas Event-driven dynamic power management based on wavelet forecasting theory. [Citation Graph (0, 0)][DBLP ] Conf ] Chikaaki Kodama , Kunihiro Fujiyoshi , Teppei Koga A novel encoding method into sequence-pair. [Citation Graph (0, 0)][DBLP ] Conf ] Praveen Pai , Emad Gad , Ramachandra Achar , Roni Khazaka , Michel S. Nakhla Computing large-change sensitivity of periodic responses of nonlinear circuits using reduction techniques. [Citation Graph (0, 0)][DBLP ] Conf ] Meng Zhao , Xinjie Wei , Yici Cai , Xianlong Hong Quick and effective buffered legitimate skew clock routing. [Citation Graph (0, 0)][DBLP ] Conf ] Xuliang Zhang , Yoji Kajitani Theory of T-junction floorplans in terms of single-sequence. [Citation Graph (0, 0)][DBLP ] Conf ] Tao Wan , Malgorzata Chrzanowska-Jeske Generating random benchmark circuits for floorplanning. [Citation Graph (0, 0)][DBLP ] Conf ] Francesco Tenore , Ralph Etienne-Cummings , M. Anthony Lewis A programmable array of silicon neurons for the control of legged locomotion. [Citation Graph (0, 0)][DBLP ] Conf ] Dazhi Wei , John G. Harris Signal reconstruction from spiking neuron models. [Citation Graph (0, 0)][DBLP ] Conf ] Elisabetta Chicca , Giacomo Indiveri , Rodney J. Douglas An event-based VLSI network of integrate-and-fire neurons. [Citation Graph (0, 0)][DBLP ] Conf ] Jens Petter Abrahamsen , Philipp Häfliger , Tor Sverre Lande A time domain winner-take-all network of integrate-and-fire neurons. [Citation Graph (0, 0)][DBLP ] Conf ] Anuj Batra , Jaiganesh Balakrishnan , Anand Dabak Multi-band OFDM: a new approach for UWB. [Citation Graph (0, 0)][DBLP ] Conf ] Ebrahim Saberinia , Jun Tang , Ahmed H. Tewfik , Keshab K. Parhi Pulsed OFDM modulation for ultra wideband communications. [Citation Graph (0, 0)][DBLP ] Conf ] Seung Young Park , Gadi Shor , Yong Suk Kim Interference resilient transmission scheme for multiband OFDM system in UWB channels. [Citation Graph (0, 0)][DBLP ] Conf ] Jun Tang , Ahmed H. Tewfik , Keshab K. Parhi High performance solution for interfering UWB piconets with reduced complexity sphere decoding. [Citation Graph (0, 0)][DBLP ] Conf ] Irena Maravic , Martin Vetterli , Kannan Ramchandran Channel estimation and synchronization with sub-Nyquist sampling and application to ultra-wideband systems. [Citation Graph (0, 0)][DBLP ] Conf ] R. Jacob Vogelstein , Udayan Mallik , Gert Cauwenberghs Silicon spike-based synaptic array and address-event transceiver. [Citation Graph (0, 0)][DBLP ] Conf ] Ausra Saudargiene , Bernd Porr , Florentin Wörgötter Biologically inspired artificial neural network algorithm which implements local learning rules. [Citation Graph (0, 0)][DBLP ] Conf ] Håvard Kolle Riis , Philipp Häfliger Spike based learning with weak multi-level static memory. [Citation Graph (0, 0)][DBLP ] Conf ] Shih-Chii Liu , Rodney J. Douglas Spike synchronization in a network of silicon integrate-and-fire neurons. [Citation Graph (0, 0)][DBLP ] Conf ] Natasha Chia , Steve Collins A spike-based analogue circuit that emphasises in auditory stimuli. [Citation Graph (0, 0)][DBLP ] Conf ] Palghat P. Vaidyanathan , Bojan Vrcelj Transmultiplexers as precoders in modern digital communication: a tutorial review. [Citation Graph (0, 0)][DBLP ] Conf ] Cássio B. Ribeiro , Marcello L. R. de Campos , Paulo S. R. Diniz Zero-forcing equalization for time-varying systems with memory. [Citation Graph (0, 0)][DBLP ] Conf ] Wei Zhang , Xiang-Gen Xia , Pak-Chung Ching On pilot pattern design for PSAM-OFDM system. [Citation Graph (0, 0)][DBLP ] Conf ] Soura Dasgupta , Ashish Pandharipande Complete characterization of channel independent general DMT systems with cyclic prefix. [Citation Graph (0, 0)][DBLP ] Conf ] See-May Phoong , Kai-Yen Chang , Yuan-Pei Lin Antipodal paraunitary precoding for OFDM application. [Citation Graph (0, 0)][DBLP ] Conf ] Kaoru Arakawa Nonlinear digital filters for beautifying facial images in multimedia systems. [Citation Graph (0, 0)][DBLP ] Conf ] Tsung Han Tsai , Yu Xuan Lee , Yu Fong Lin Video error concealment techniques using progressive interpolation and boundary matching algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Kazuhiro Shimauchi , Masahiro Ogawa , Akira Taguchi JPEG based image compression with adaptive resolution conversion system. [Citation Graph (0, 0)][DBLP ] Conf ] C. S. Tan , D. M. Tan , H. R. Wu Perceptual coding of digital colour images based on a vision model. [Citation Graph (0, 0)][DBLP ] Conf ] Naoto Sasaoka , Yoshio Itoh , Kensaku Fujii , Yutaka Fukui Smart noise reduction system based on ALE and noise reconstruction system. [Citation Graph (0, 0)][DBLP ] Conf ] Piotr Dudek A 39/spl times/48 general-purpose focal-plane processor array integrated circuit. [Citation Graph (0, 0)][DBLP ] Conf ] Sebastien Moutault , Hervé Mathias , Jacques-Olivier Klein , Antoine Dupret An improved analog computation cell for Paris II, a programmable vision chip. [Citation Graph (0, 0)][DBLP ] Conf ] Ricardo Carmona , Carlos M. Domínguez-Matas , Jorge Cuadri , Francisco Jiménez-Garrido , Ángel Rodríguez-Vázquez A CNN-driven locally adaptive CMOS image sensor. [Citation Graph (0, 0)][DBLP ] Conf ] Asko Kananen , Mika Laiho , Kari Halonen , Ari Paasio N /spl times/ 16 cellular test chips for low-pass filtering large images. [Citation Graph (0, 0)][DBLP ] Conf ] Victor M. Brea , David López Vilariño , Diego Cabello A mixed-signal CMOS DTCNN chip for pixel-level snakes. [Citation Graph (0, 0)][DBLP ] Conf ] Inas Khalifa , Ljiljana Trajkovic An overview and comparison of analytical TCP models. [Citation Graph (0, 0)][DBLP ] Conf ] Gianluca Mazzini , Riccardo Rovatti , Gianluca Setti Self-similarity in max/average aggregated processes. [Citation Graph (0, 0)][DBLP ] Conf ] David K. Arrowsmith , Matthew Woolf Modelling of TCP packet traffic in a large interactive growth network. [Citation Graph (0, 0)][DBLP ] Conf ] Hung Xuan Nguyen , Patrick Thiran , Chadi Barakat On the correlation of TCP traffic in backbone networks. [Citation Graph (0, 0)][DBLP ] Conf ] Sabato Manfredi , Franco Garofalo , Mario di Bernardo A robust approach to active queue management control in networks. [Citation Graph (0, 0)][DBLP ] Conf ] Marco Gilli , Fernando Corinto On dynamic behavior of weakly connected cellular neural networks. [Citation Graph (0, 0)][DBLP ] Conf ] Timothy G. Constandinou , Julius Georgiou , Chris Toumazou Towards a bio-inspired mixed-signal retinal processor. [Citation Graph (0, 0)][DBLP ] Conf ] Daryl R. Kipke Brain-machine interfaces using thin-film silicon microelectrode arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Paolo Arena , Luigi Fortuna , Adriano Basile , Mattia Frasca CNN wave based computation for robot navigation planning. [Citation Graph (0, 0)][DBLP ] Conf ] Christian Merkwirth , Jochen Bröcker , Maciej Ogorzalek , Jörg D. Wichard Finite iteration DT-CNN - new design and operating principles. [Citation Graph (0, 0)][DBLP ] Conf ] Ethan Crain , Michael H. Perrott A numerical design approach for high speed, differential, resistor-loaded, CMOS amplifiers. [Citation Graph (0, 0)][DBLP ] Conf ] Makram M. Mansour , Amit Mehrotra , William W. Walker , Amit Narayan Analysis techniques for obtaining the steady-state solution of MOS LC oscillators. [Citation Graph (0, 0)][DBLP ] Conf ] Zhe Wang , Rajeev Murgai , Jaijeet S. Roychowdhury Macromodeling of digital libraries for substrate noise analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Suihua Lu , Amit Narayan , Amit Mehrotra Continuation method in multitone harmonic balance. [Citation Graph (0, 0)][DBLP ] Conf ] Chinh H. Doan , Sohrab Emami , Ali M. Niknejad , Robert W. Brodersen Millimeter-wave CMOS device modeling and simulation. [Citation Graph (0, 0)][DBLP ] Conf ] Wu-Sheng Lu , Takao Hinamoto Improved design of frequency-response-masking filters using enhanced sequential quadratic programming. [Citation Graph (0, 0)][DBLP ] Conf ] Ya Jun Yu , Yong Ching Lim , Kok Lay Teo , Guohui Zhao Frequency-response-masking technique incorporating extrapolated impulse response band-edge shaping filter. [Citation Graph (0, 0)][DBLP ] Conf ] Jianghong Yu , Yong Lian Frequency-response masking based filters with the even-length bandedge shaping filter. [Citation Graph (0, 0)][DBLP ] Conf ] Juha Yli-Kaakinen , Tapio Saramäki , Ya Jun Yu An efficient algorithm for the optimization of FIR filters synthesized using the multistage frequency-response masking approach. [Citation Graph (0, 0)][DBLP ] Conf ] Danilo B. Graziosi , Cristiano Nogueira dos Santos , Sergio L. Netto , Luiz W. P. Biscainho A constant-Q spectral transformation with improved frequency response. [Citation Graph (0, 0)][DBLP ] Conf ] Tingting Song , Nianci Huang , Adrian Ioinovici A zero-voltage and zero-current switching three-level DC-DC converter with secondary-assisted regenerative passive snubber. [Citation Graph (0, 0)][DBLP ] Conf ] Gerard Villar , Eduard Alarcón , Herminio Martínez , Eva Vidal , Francesc Guinjoan , Sonia Porta , Alberto Poveda Hysteric controller for CMOS on-chip switching power converters. [Citation Graph (0, 0)][DBLP ] Conf ] Kelvin Ka Sing Leung , Henry Shu-Hung Chung State trajectory prediction control for boost converters. [Citation Graph (0, 0)][DBLP ] Conf ] Tadashi Suetsugu , Marian K. Kazimierczuk Design equations for sub-optimum operation of class-E amplifier with nonlinear shunt capacitance. [Citation Graph (0, 0)][DBLP ] Conf ] Bruno Estibals , Corinne Alonso , Alain Salles , Angel Cid-Pastor , Henri Camon , Luis Martinez-Salamero Toward the integration of microsystems supply. [Citation Graph (0, 0)][DBLP ] Conf ] Dahua Xie , C. C. Jay Kuo Enhanced multiple Huffman table (MHT) encryption scheme using key hopping. [Citation Graph (0, 0)][DBLP ] Conf ] Wei-Qi Yan , Duo Jin , Mohan S. Kankanhalli Visual cryptography for print and scan applications. [Citation Graph (0, 0)][DBLP ] Conf ] Chandramouli Rajarathnam Web search steganalysis: some challenges and approaches. [Citation Graph (0, 0)][DBLP ] Conf ] Jeng-Shyang Pan , Min-Tsang Sung , Hsiang-Cheh Huang , Bin-Yih Liao Robust VQ-based digital watermarking for memoryless binary symmetric channel. [Citation Graph (0, 0)][DBLP ] Conf ] Yongjian Hu , Sam Kwong , Jiwu Huang Using invisible watermarks to protect visibly watermarked images. [Citation Graph (0, 0)][DBLP ] Conf ] Alyssa B. Apsel , Zhongtao Fu A 2.5 milliwatt SOS CMOS receiver for optical interconnect. [Citation Graph (0, 0)][DBLP ] Conf ] Donald M. Chiarulli , Steven P. Levitan , Jason D. Bakos , Charlie Kuznia Active substrates for optoelectronic interconnect. [Citation Graph (0, 0)][DBLP ] Conf ] Amit Lal , Hui Li , Hang Guo Integrated radioactive thin films for sensing systems. [Citation Graph (0, 0)][DBLP ] Conf ] Alexander Belenky , Alexander Fish , Shy Hamami , Vadim Milrud , Orly Yadid-Pecht Widening the dynamic range of the readout integration circuit for uncooled microbolometer infrared sensors. [Citation Graph (0, 0)][DBLP ] Conf ] Eugenio Culurciello , Andreas G. Andreou A 16 /spl times/ 16 pixel silicon on sapphire CMOS photosensor array with a digital interface for adaptive wavefront correction. [Citation Graph (0, 0)][DBLP ] Conf ] Tõnu Trump Compensation for clock skew in voice over packet networks by speech interpolation. [Citation Graph (0, 0)][DBLP ] Conf ] Arthur L. Swanson , Ravi P. Ramachandran , Steven H. Chin Fast adaptive component weighted cepstrum pole filtering for speaker identification. [Citation Graph (0, 0)][DBLP ] Conf ] Marc A. Boillot , John G. Harris A loudness enhancement technique for speech. [Citation Graph (0, 0)][DBLP ] Conf ] Robert E. Yantorno , Brett Y. Smolenski , Ananth N. Iyer , Jashmin K. Shah Usable speech detection using a context dependent Gaussian mixture model classifier. [Citation Graph (0, 0)][DBLP ] Conf ] David B. Bjornberg , Sedig Agili , Aldo Morales Decomposition and recognition of a multi-channel audio source using matching pursuit algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Gabriel Popescu , Leonid B. Goldgeisser Mixed signal aspects of behavioral modeling and simulation. [Citation Graph (0, 0)][DBLP ] Conf ] Mark Zwolinski , Andrew D. Brown Behavioural modelling of analogue faults in VHDL-AMS - a case study. [Citation Graph (0, 0)][DBLP ] Conf ] Ken G. Ruan A new model architecture for customer software integration. [Citation Graph (0, 0)][DBLP ] Conf ] Martin Vlach Programming interface requirements for an AMS simulator. [Citation Graph (0, 0)][DBLP ] Conf ] Peter R. Wilson , J. Neil Ross , Andrew D. Brown , Andrew J. Rushton Multiple domain behavioral modeling using VHDL-AMS. [Citation Graph (0, 0)][DBLP ] Conf ] Tohru Kohda Statistical properties of chaotic sequences generated by Jacobian elliptic Chebyshev rational maps. [Citation Graph (0, 0)][DBLP ] Conf ] Anthony J. Lawrance , Gan Ohama Outage in chaos communication. [Citation Graph (0, 0)][DBLP ] Conf ] Joerg Krupar , Andreas Mögel , Wolfgang M. Schwarz Analysis of hybrid systems by means of embedded return maps. [Citation Graph (0, 0)][DBLP ] Conf ] Wolfgang Mathis Andronov-Hopf bifurcation of sinusoidal oscillators under the influence of noise. [Citation Graph (0, 0)][DBLP ] Conf ] Ruedi Stoop , Norbert Stoop Computation by natural systems defined. [Citation Graph (0, 0)][DBLP ] Conf ] Shoji Makino , Shoko Araki , Ryo Mukai , Hiroshi Sawada Audio source separation based on independent component analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Laurent Albera , Anne Ferréol , Pascal Chevalier , Pierre Comon ICAR: independent component analysis using redundancies. [Citation Graph (0, 0)][DBLP ] Conf ] Shawn P. Neugebauer , Zhi Ding Blind SIMO channel estimation for CPM using the Laurent approximation. [Citation Graph (0, 0)][DBLP ] Conf ] Kiyotaka Kohno , Yujiro Inouye , Mitsuru Kawamoto , Tetsuya Okamoto Adaptive super-exponential algorithms for blind deconvolution of MIMO systems. [Citation Graph (0, 0)][DBLP ] Conf ] Andrzej Cichocki , Yuanqing Li , Pando G. Georgiev , Shun-ichi Amari Beyond ICA: robust sparse signal representations. [Citation Graph (0, 0)][DBLP ] Conf ] Tian-Tsong Ng , Shih-Fu Chang , Qibin Sun Blind detection of photomontage using higher order statistics. [Citation Graph (0, 0)][DBLP ] Conf ] Huijuan Yang , Alex C. Kot Data hiding for bi-level documents using smoothing technique. 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