The SCEAS System
Navigation Menu

Conferences in DBLP

IEEE International Symposium on Circuits and Systems (ISCAS) (iscas)
2004 (conf/iscas/2004-4)

  1. Praveen R. Singh, Wentai Liu, Mohanasankar Sivaprakasam, Mark S. Humayun, James D. Weiland
    A matched biphasic microstimulator for an implantable retinal prosthetic device. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:1-4 [Conf]
  2. Benoit Gosselin, Virginie Simard, Mohamad Sawan
    Low-power implantable microsystem intended to multichannel cortical recording. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:5-8 [Conf]
  3. Ravi S. Ananth, Edward K. Lee
    Design of a low-power, implantable electromyogram amplifier. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:9-12 [Conf]
  4. Joachim Neves Rodrigues, Viktor Öwall, Leif Sörnmo
    A wavelet based R-wave detector for cardiac pacemakers in 0.35 CMOS technology. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:13-16 [Conf]
  5. Guoxing Wang, Wentai Liu, Rizwan Bashirullah, Mohanasankar Sivaprakasam, Gurhan Alper Kendir, Ying Ji, Mark S. Humayun, James D. Weiland
    A closed loop transcutaneous power transfer system for implantable devices with enhanced stability. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:17-20 [Conf]
  6. Arantxa Uranga, Natalia Lago, Xavier Navarro, Nuria Barniol
    A low noise CMOS amplifier for ENG signals. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:21-24 [Conf]
  7. Mihir Naware, Abhishek Rege, Roman Genov, Milutin Stanacevic, Gert Cauwenberghs, Nitish Thakor
    Integrated multi-electrode fluidic nitric-oxide sensor and VLSI potentiostat array. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:25-28 [Conf]
  8. Timothy K. Horiuchi, Thomas Swindell, David Sander, Pamela Abshire
    A low-power CMOS neural amplifier with amplitude measurements for spike sorting. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:29-32 [Conf]
  9. Jordi Sacristán, M. Teresa Osés
    Low noise amplifier for recording ENG signals in implantable systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:33-36 [Conf]
  10. Chung-Yu Wu, Felice Cheng, Cheng-Ta Chiang, Po-Kang Lin
    A low-power implantable Pseudo-BJT-based silicon retina with solar cells for artificial retinal prostheses. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:37-40 [Conf]
  11. Gurhan Alper Kendir, Wentai Liu, Rizwan Bashirullah, Guoxing Wang, Mark S. Humayun, James D. Weiland
    An efficient inductive power link design for retinal prosthesis. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:41-44 [Conf]
  12. Idris El-Feghi, Yasser Alginahi, Maher A. Sid-Ahmed, Majid Ahmadi
    Craniofacial landmarks extraction by Partial Least Squares Regression. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:45-48 [Conf]
  13. Rastislav Lukac, Konstantinos N. Plataniotis, Bogdan Smolka, Anastasios N. Venetsanopoulos
    Fuzzy vector filters for microarray image enhancement. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:49-52 [Conf]
  14. Flavio Heer, Wendy Franks, Ian McKay, Stefano Taschini, Andreas Hierlemann, Henry Baltes
    CMOS microelectrode array for extracellular stimulation and recording of electrogenic cells. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:53-56 [Conf]
  15. Chua-Chin Wang, Ya-Hsin Hsueh, U. Fat Chio, Yu-Tzu Hsiao
    A C-less ASK demodulator for implantable neural interfacing chips. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:57-60 [Conf]
  16. Shuang Gao, Yang Xiao, Shao-Hai Hu
    A comparison of two similarity measures in intensity-based ultrasound image registration. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:61-64 [Conf]
  17. Manuela La Rosa, Maide Bucolo, Gea Bucolo, Luigi Fortuna, Mattia Frasca, David Shannahoff-Khalsa, Massimiliano Sorbello
    Nonlinear techniques and neural activity: emergent trends in MEG data. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:65-68 [Conf]
  18. Hakan Gürkan, Ümit Güz, B. Siddik Yarman
    A novel representation method for electromyogram (EMG) signal with predefined signature and envelope functional bank. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:69-72 [Conf]
  19. Daniele Lo Iacono, Ettore Messina, Giuseppe Avellone, Agostino Galluzzo
    Memory optimization techniques for UMTS code generation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:73-76 [Conf]
  20. Yuanbin Guo, Dennis McCain, Joseph R. Cavallaro
    Low complexity System-on-Chip architectures of Parallel-Residue-Compensation in CDMA systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:77-80 [Conf]
  21. Yijun Li, Mahmoud Elassal, Magdy A. Bayoumi
    Power efficient architecture for (3, 6)-regular low-density parity-check code decoder. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:81-84 [Conf]
  22. Theodoros Giannopoulos, Vassilis Paliouras
    An efficient architecture for peak-to-average power ratio reduction in OFDM systems in the presence of pulse-shaping filtering. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:85-88 [Conf]
  23. Stamatis Krommydas, Vassilis Paliouras
    An efficient memory compression scheme for 8 k FFT in a DVB-T receiver and the corresponding error model. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:89-92 [Conf]
  24. Eugene Grayver, Eugene M. ElTawil, Jean-François Frigon, Kambiz Shoarinejad, Ali-Azam Abbasfar, Danijela Cabric
    A novel multipath searcher implementation for WCDMA receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:93-96 [Conf]
  25. Boris D. Andreev, Edward L. Titlebaum, Eby G. Friedman
    Low power flexible Rake receivers for WCDMA. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:97-100 [Conf]
  26. Sang Soon Park, Han Kyong Kim, Heung Ki Baik
    A simple STF-OFDM transmission scheme with maximum frequency diversity gain. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:101-104 [Conf]
  27. Chi-Fang Li, Yuan-Sun Chu, Wern-Ho Sheen
    Low-power design for cell search in W-CDMA. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:105-108 [Conf]
  28. Wasimon Panichpattanakul, Watit Bejapolakul
    Improvement of fuzzy power control for DS-CDMA cellular mobile system having variable number of users. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:109-112 [Conf]
  29. Kai-Chuan Chang, Gerald E. Sobelman, Ebrahim Saberinia, Ahmed H. Tewfik
    Analysis of higher-order N-tone sigma-delta modulators for ultra wideband communications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:113-116 [Conf]
  30. Chun Yi Lee, Chris Toumazou
    3-state pseudorandom noise (PN) sequence 3-pulse Reference Sharing Ultra Wideband System. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:117-120 [Conf]
  31. Chun Yi Lee, Chris Toumazou
    Reference Sharing Ultra Wideband Communication System. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:121-124 [Conf]
  32. Chia-Hsiang Yang, Yu-Hsuan Lin, Shih-Chun Lin, Tzi-Dar Chiueh
    Design of a low-complexity receiver for impulse-radio ultra-wideband communication systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:125-128 [Conf]
  33. Youngkyun Jeong, Sungyong Jung, Jin Liu
    A CMOS impulse generator for UWB wireless communication systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:129-132 [Conf]
  34. Yalcin A. Eken, John P. Uyemura
    The design of a 14 GHz I/Q ring oscillator in 0.18 /spl mu/m CMOS. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:133-136 [Conf]
  35. Apisak Worapishet, Sarayut Virunphun, Mitchai Chongcheawchamnan, Sarayut Srisathit
    A mutual-negative-resistance quadrature CMOS LC oscillator. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:137-140 [Conf]
  36. Shaorui Li, Yannis P. Tsividis
    Analysis of oscillator amplitude control, and its application to automatic tuning of quality factor for active LC filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:141-144 [Conf]
  37. Byunghoo Jung, Ramesh Harjani
    A wide tuning range VCO using capacitive source degeneration. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:145-148 [Conf]
  38. Tamer Riad, Raafat Mansour
    Behavior modelling for LC tank based oscillators. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:149-152 [Conf]
  39. Amr Hafez, Waleed F. Aboueldahab, Ahmed Helmy
    On the design of an offset-PLL modulation loop for the EGSM band. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:153-156 [Conf]
  40. Krzysztof Iniewski, Sebastian Magierowski, Marek Syrzycki
    Phase Locked Loop gain shaping for gigahertz operation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:157-160 [Conf]
  41. Sokratis D. Vamvakos, Carl Werner, Borivoje Nikolic
    Phase-locked loop architecture for adaptive jitter optimization. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:161-164 [Conf]
  42. Salvatore Levantino, Luca Romanò, Carlo Samori, Andrea L. Lacaita
    Fast-switching analog PLL with finite-impulse response. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:165-168 [Conf]
  43. Ravindran Mohanavelu, Payam Heydari
    A novel ultra high-speed flip-flop-based frequency divider. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:169-172 [Conf]
  44. Emmanuel Casseau, Bertrand Le Gal, Christophe Jégo, Nathalie Le Heno, Eric Martin
    Reed-Solomon behavioral virtual component for communication systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:173-176 [Conf]
  45. Tong Zhang
    A high throughput limited search trellis decoder for convolutional code decoding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:177-180 [Conf]
  46. Billy Tomatsopoulos, Andreas Demosthenous
    A low-power, hard-decision analogue convolutional decoder using the modified feedback decoding algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:181-184 [Conf]
  47. Alaa Eldin Fahmy, Wael M. Badawy
    A new digital signature scheme. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:185-188 [Conf]
  48. Rohit Singhal, Gwan S. Choi, Nathan Mickler, Prabhavati Koteeswaran
    Scaleable check node centric architecture for LDPC decoder. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:189-192 [Conf]
  49. Nicola Lofù, Gianfranco Avitabile, Biagio Bisanti, Stefano Cipriani
    Direct Sigma Delta GMSK modulator modeling and design for 2.5 G TX applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:193-196 [Conf]
  50. Haiqiao Xiao, Rolf Schaumann, W. Robert Daasch, Phillip K. Wong, Branimir Pejcinovic
    A radio-frequency CMOS active inductor and its application in designing high-Q filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:197-200 [Conf]
  51. Yefim Poberezhskiy, Gennady Poberezhskiy
    Implementation of novel sampling and reconstruction circuits in digital radios. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:201-204 [Conf]
  52. Noushin Riahi, Ali Fotowat Ahmady, Lawrence Loh
    A high speed trans-impedance amplifier using 0.13 /spl mu/m triple-well CMOS technology. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:205-208 [Conf]
  53. Shanfeng Cheng, José Silva-Martínez
    6.8 mW 2.5 Gb/s and 42.5 mW 5 Gb/s 1: 8 CMOS demultiplexers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:209-212 [Conf]
  54. Sung Min Park
    Four-channel SiGe transimpedance amplifier array for parallel optical interconnects. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:213-216 [Conf]
  55. Sharon Goldberg, Stephen Liu, Sean Nicolson, Khoman Phang
    CMOS limiting optical preamplifiers using dynamic biasing for wide dynamic range. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:217-220 [Conf]
  56. Heikki Kariniemi, Jari Nurmi
    Improved multicast switch architecture for optical cable television and video surveillance networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:221-224 [Conf]
  57. Meng-Lin Hsia, Oscal T.-C. Chen, Huang-Tzung Jan, Sun-Chen Wang, Yaw-Tyng Wu
    Rapid bit-error-rate measurements of infrared communication systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:225-228 [Conf]
  58. Mohamed Lamine Tounsi, Abdfelhamid Khodja, Mustapha Chérif-Eddine Yagoub
    Efficient analysis of multilayered broadside edge-coupled anisotropic structures for microwave applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:229-232 [Conf]
  59. Hiroomi Hikawa
    Direct digital frequency synthesizer with multi-stage linear interpolation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:233-236 [Conf]
  60. Sadeka Ali, Martin Margala
    A 5.1-GHz CMOS PLL based integer-N frequency synthesizer with ripple-free control voltage and improved acquisition time. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:237-240 [Conf]
  61. Ahmed Wafa, Ayman Ahmed
    High-speed RF multi-modulus prescaler architecture for /spl Sigma/-/spl Delta/ fractional-N PLL frequency synthesizers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:241-244 [Conf]
  62. Chin-Sheng Chen, Robert C. Chang
    A new prescaler for fully integrated 5-GHz CMOS frequency synthesizer. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:245-248 [Conf]
  63. Sau-Mou Wu, Wei-Liang Chen
    A 5-GHz delta-sigma PLL frequency synthesizer for WLAN applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:249-252 [Conf]
  64. Wesley A. Gee, Phillip E. Allen
    CMOS integrated transformer-feedback Q-enhanced LC bandpass filter for wireless receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:253-256 [Conf]
  65. Mikko Hotti, Jussi Ryynänen, Kalle Kivekäs, Kari Halonen
    An IIP2 calibration technique for direct conversion receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:257-260 [Conf]
  66. Horst Fischer, Frank Henkel, Michael Engels, Peter Waldow
    UMTS/GSM multi mode receiver design. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:261-264 [Conf]
  67. Ho-Kwon Yoon, Mohammed Ismail
    A CMOS multi-standard receiver architecture for ISM and UNII band applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:265-268 [Conf]
  68. Paul W. M. Laferriere, Dave Rahn, Calvin Plett, John W. M. Rogers
    A 5 GHz direct-conversion receiver with DC offset correction. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:269-272 [Conf]
  69. Rony E. Amaya, Jorge Aguirre, Calvin Plett
    Gain bandwidth considerations in fully integrated distributed amplifiers implemented in silicon. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:273-276 [Conf]
  70. Brett E. Klehn, Syed S. Islam
    An exact analysis of Class-E power amplifiers for RF communications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:277-280 [Conf]
  71. Trung-Kien Nguyen, Yang-Moon Su, Sang-Gug Lee
    A power constrained simultaneous noise and input matched low noise amplifier design technique. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:281-284 [Conf]
  72. Bendong Sun, Fei Yuan, Ajoy Opal
    Inductive peaking in wideband CMOS current amplifiers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:285-288 [Conf]
  73. Chris D. Holdenried, James W. Haslett
    A DC-6 GHz, 50 dB dynamic range, SiGe HBT true logarithmic amplifier. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:289-292 [Conf]
  74. Jin Kyu Kwon, Tae Kwan Heo, Sang-Bock Cho, Sung Min Park
    A 5-Gb/s 1/8-rate CMOS clock and data recovery circuit. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:293-296 [Conf]
  75. Francesco Centurelli, Massimo Pozzoni, Giuseppe Scotti, Alessandro Trifiletti
    A high-speed low-voltage phase detector for clock recovery from NRZ data. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:297-300 [Conf]
  76. Xinyu Chen, Michael M. Green
    A CMOS 10 Gb/s clock and data recovery circuit with a novel adjustable Kpd phase detector. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:301-304 [Conf]
  77. Pedram Sameni, Shahriar Mirabbasi
    A 1/8-rate clock and data recovery architecture for high-speed communication systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:305-308 [Conf]
  78. Afshin Haftbaradaran, Ken Martin
    An interpolation filter based on spline functions for non-synchronized timing recovery. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:309-312 [Conf]
  79. Chunyu Xin, Edgar Sánchez-Sinencio
    A linearization technique for RF low noise amplifier. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:313-316 [Conf]
  80. Qun Gu, Zhiwei Xu, Jenwei Ko, Szukang Hsien, M. Frank Chang
    A self-synchronized RF-interconnect for 3-dimensional integrated circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:317-320 [Conf]
  81. Arif A. Siddiqi, Tad A. Kwasniewski
    2.4 GHz RF down-conversion mixers in standard CMOS technology. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:321-324 [Conf]
  82. Chris DeVries, Ralph Mason
    A 0.18 /spl mu/m CMOS 900 MHz receiver front-end using RF Q-enhanced filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:325-328 [Conf]
  83. Mark P. Houlgate, Daniel J. Olszewski, Karim Abdelhalim, Leonard MacEachern
    Adaptable MOS current mode logic for use in a multi-band RF prescaler. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:329-332 [Conf]
  84. Yeong-Kang Lai, Li-Chung Chang, Lien-Fei Chen, Chi-Chung Chou, Chun-Wei Chiu
    A novel memoryless AES cipher architecture for networking applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:333-336 [Conf]
  85. Svetoslav Gueorguiev, Saska Lindfors
    Coupling effects in an integrated beam-forming transmitter. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:337-340 [Conf]
  86. Archana Chidanandan, Magdy A. Bayoumi
    Enhanced Parallel Interference Cancellation using Decorrelator for the base-station receiver. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:341-344 [Conf]
  87. Nicola Scolari, Christian C. Enz
    Digital receiver architectures for the IEEE 802.15.4 standard. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:345-348 [Conf]
  88. Takahide Terada, Shingo Yoshizumi, Yukitoshi Sanada, Tadahiro Kuroda
    Transceiver circuits for pulse-based ultra-wideband. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:349-352 [Conf]
  89. Muhammad Usama, Tad A. Kwasniewski
    Design and comparison of CMOS Current Mode Logic latches. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:353-356 [Conf]
  90. Kuo-Hsing Cheng, Yu-lung Lo
    A fast-lock DLL with power-on reset circuit. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:357-360 [Conf]
  91. Ken Yamamoto, Takayasu Norimatsu, Minoru Fujishima
    High-speed and wide-tuning-range LC frequency dividers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:361-364 [Conf]
  92. Syed Irfan Ahmed, Ralph D. Mason
    Improving the acquisition time of a PLL-based, integer-N frequency synthesizer. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:365-368 [Conf]
  93. Hung Tien Bui, Yvon Savaria
    Shunt-peaking in MCML gates and its application in the design of a 20 Gb/s half-rate phase detector. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:369-372 [Conf]
  94. Xuezhen Wang, Robert Weber, Degang Chen
    A novel 1.5 V CMFB CMOS down-conversion mixer design for IEEE 802.11 A WLAN systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:373-376 [Conf]
  95. Hussain A. Al-Zaher, Mohammad K. Al-Ghamdi
    A CMOS low power buffer based bandpass IF filter for Bluetooth. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:377-380 [Conf]
  96. Saman S. Abeysekera
    Bandpass sigma-delta (/spl Sigma/-/spl Delta/) architecture based efficient FM demodulator for software radio. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:381-384 [Conf]
  97. Christoph Kienmayer, Marc Tiebout, Werner Simbürger, Arpad L. Scholtz
    A low-power low-voltage NMOS bulk-mixer with 20 GHz bandwidth in 90 nm CMOS. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:385-388 [Conf]
  98. Pere Palà-Schönwälder, F. Xavier Moncunill-Geniz, Francisco del Águìla López, Jordi Bonet-Dalmau, M. Rosa Giralt-Mas
    A simple and robust super-regenerative oscillator for the 2.4 GHz ISM band. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:389-392 [Conf]
  99. Hung-Chieh Tsai, Jyh-Yih Yeh, Wei-Hsuan Tu, Tai-Cheng Lee, Chorng-Kuang Wang
    A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:393-396 [Conf]
  100. Ming-Ta Hsieh, Gerald E. Sobelman
    Simultaneous bidirectional signaling with adaptive pre-emphasis. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:397-400 [Conf]
  101. Hsiu-Ping Lin, Nancy Fang-Yih Chen, Jyh-Ting Lai, An-Yeu Wu
    1000BASE-T Gigabit Ethernet baseband DSP IC design. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:401-404 [Conf]
  102. Saeid Mehrmanesh, Seyed Mojtaba Atarodi, Hesam Amir Aslanzadeh, Saeed Saeedi, Amin Quasem Safarian
    A new full CMOS 2.5 V two-stage line driver with variable gain for ADSL applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:405-408 [Conf]
  103. Yuen-Hui Chee, Jan M. Rabaey, Ali M. Niknejad
    A class A/B low power amplifier for wireless sensor networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:409-412 [Conf]
  104. Arto Malinen, Kari Stadius, Kari Halonen
    Characteristics and modeling of a broadband transmission-line transformer. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:413-416 [Conf]
  105. Pui-In Mak, Seng-Pan U., Rui Paulo Martins
    A low-IF/zero-IF reconfigurable receiver with two-step channel selection technique for multistandard applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:417-420 [Conf]
  106. Rizwan Murji, M. Jamal Deen
    A low-power, 10 GHz back-gated tuned voltage controlled oscillator with automatic amplitude and temperature compensation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:421-424 [Conf]
  107. Pavan Kumar Hanumolu, Bryan Casper, Randy Mooney, Gu-Yeon Wei, Un-Ku Moon
    Jitter in high-speed serial and parallel links. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:425-428 [Conf]
  108. Xinping Huang, Pierre Tardif, Mario Caron
    Experimental results of a type-based predistorter for SSPA linearization. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:429-432 [Conf]
  109. Peter Rauschert, Arasch Honarbacht, Anton Kummert
    R&D platform for man scale wireless AD HOC networks towards a hardware demonstrator for 4G+ systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:433-436 [Conf]
  110. A. Prasad Vinod, Edmund Ming-Kit Lai, A. Benjamin Premkumar, Chiew Tong Lau
    Optimization method for designing filter bank channelizer of a software defined radio using vertical common subexpression elimination. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:437-440 [Conf]
  111. Kamran Farzan, David A. Johns
    A low-power crosstalk-insensitive signaling scheme for chip-to-chip communication. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:441-444 [Conf]
  112. Chun Yi Lee, Chris Toumazou
    Power spectral density of Transmit Reference Doublet trains and Reference Sharing Doublet trains in ultra wideband systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:445-448 [Conf]
  113. Alex W. Paek, Hichem Besbes, Yu Zhang, Ted Burk, Saf Asghar, Celite Milbrandt, Bruce Webb
    Burst receiver for upstream communications over twisted pair lines. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:449-452 [Conf]
  114. Jérémie Chabloz, Christian C. Enz
    A novel I/Q mismatch compensation scheme for a low-IF receiver front-end. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:453-456 [Conf]
  115. Amro M. Elshurafa, Ezz I. El-Masry
    Tunable matching networks for future MEMS-based transceivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:457-460 [Conf]
  116. Ediz Çetin, Izzet Kale, Richard C. S. Morling
    On various low-hardware-complexity LMS algorithms for adaptive I/Q correction in quadrature receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:461-464 [Conf]
  117. Yair Linn
    A new NDA timing error detector for BPSK and QPSK with an efficient hardware implementation for ASIC-based and FPGA-based wireless receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:465-468 [Conf]
  118. Gang Zhang, L. Richard Carley
    A CMOS-MEMS magnetic thin-film inductor for radio frequency and intermediate frequency filter circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:469-472 [Conf]
  119. John C. McEachen, John Zachary, Daniel W. Ettlich
    Differentiating network conversation flow for intrusion detection and diagnostics. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:473-476 [Conf]
  120. Zhan Guo, Peter Nilsson
    VLSI implementation issues of lattice decoders for MIMO systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:477-480 [Conf]
  121. Marco Cassia, Peter Shah, Erik Bruun
    A calibration method for PLLs based on transient response. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:481-484 [Conf]
  122. Christian Borgelt, Daniela Girimonte, Giuseppe Acciani
    Modeling and diagnosis of analog circuits with probabilistic graphical models. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:485-488 [Conf]
  123. Keiji Kida, Xiaoke Zhu, Changwen Zhuang, Yasuhiro Takashima, Shigetoshi Nakatake
    A fast algorithm for crosspoint assignment under crosstalk constraints with shielding effects. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:489-492 [Conf]
  124. Elena Dubrova, Maxim Teslenko, Andrés Martinelli
    On relation between non-disjoint decomposition and multiple-vertex dominators. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:493-496 [Conf]
  125. Yuki Shibata, Haruki Kubo, Hitoshi Watanabe
    Studies on distributed algorithm for network flow optimization problem based on tie-set flow vector space. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:497-500 [Conf]
  126. Atsushi Ohta, Kohkichi Tsuji
    Unfolding of Petri nets with semilinear reachability set. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:501-504 [Conf]
  127. Yohei Ishimaru, Keishi Sakanushi, Shinsuke Kobayashi, Yoshinori Takeuchi, Masaharu Imai
    S-sequence: a new floorplan representation method preserving room abutment relationships. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:505-508 [Conf]
  128. Andrea Arcangeli, Stefano Squartini, Francesco Piazza
    Calculation of non-mixed second derivatives in multirate systems through signal flow graph techniques. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:509-512 [Conf]
  129. Flavio Cannavó, Luigi Fortuna, Mattia Frasca, Luca Patané
    Chaotic sequences in ACO algorithms. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:513-516 [Conf]
  130. Mark G. Karpovsky, Radomir S. Stankovic, Jaakko Astola
    Construction of linearly transformed planar BDD by Walsh coefficients. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:517-520 [Conf]
  131. Christopher J. Augeri, Hesham H. Ali
    New graph-based algorithms for partitioning VLSI circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:521-524 [Conf]
  132. Rung-Bin Lin, Shuyu Chen
    Multi-layer constrained via minimization with conjugate conflict continuation graphs. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:525-528 [Conf]
  133. Thomas Zeitlhofer, Bernhard Wess
    A comparison of graph coloring heuristics for register allocation based on coalescing in interval graphs. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:529-532 [Conf]
  134. Dean A. Badillo, Sayfe Kiaei
    A low phase noise 2.0 V 900 MHz CMOS voltage controlled ring oscillator. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:533-536 [Conf]
  135. Hervé Barthélemy, Stéphane Meillére, Sylvain Bourdel
    Single ended rail-to-rail CMOS OTA based variable-frequency ring-oscillator. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:537-540 [Conf]
  136. Bernabé Linares-Barranco, Teresa Serrano-Gotarredona, J. Ramos-Martos, J. Ceballos-Cáaceres, J. M. Mora, Alejandro Linares-Barranco
    A precise 90/spl deg/ quadrature OTA-C VCO between 50-130 MHz. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:541-544 [Conf]
  137. Jie Long, Robert J. Weber
    A 2.4 GHz low-power low-phase-noise CMOS VCO using spiral inductors and junction varactors. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:545-548 [Conf]
  138. Montree Siripruchyanun, Poolsak Koseeyaporn, Jeerasuda Koseeyaporn, Paramote Wardkein
    Fully current controllable AM/FM modulator and quadrature sinusoidal oscillator based on CCCIIs. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:549-552 [Conf]
  139. Roberto Nonis, Nicola Da Dalt, Pierpaolo Palestri, Luca Selmi
    Modeling, design and characterization of a new low jitter analog dual tuning LC-VCO PLL architecture. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:553-556 [Conf]
  140. Soeren R. Sappok, Andre Kruth, Guerkan Ordu, Ralf Wunderlich, Stefan Heinen
    Spectral shaping by generalized transfer function design in frequency modulation Sigma-Delta synthesizers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:557-560 [Conf]
  141. Bortecene Terlemez, John P. Uyemura
    The design of a differential CMOS charge pump for high performance phase-locked loops. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:561-564 [Conf]
  142. Ari Y. Valero-López, Alberto Valdes-Garcia, Edgar Sánchez-Sinencio
    Frequency synthesizer for on-chip testing and automated tuning. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:565-568 [Conf]
  143. Dorin Emil Calbaza, Ioan Cordos, Nigel Seth-Smith, Yvon Savaria
    An ADPLL circuit using a DDPS for genlock applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:569-572 [Conf]
  144. Tomohiro Yoshimura, Tohru Kohda
    Resonance properties of Chebyshev chaotic sequences. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:573-576 [Conf]
  145. Ljupco Kocarev, Marjan Sterjev, Paolo Amato
    RSA encryption algorithm based on torus automorphisms. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:577-580 [Conf]
  146. Mustak E. Yalcin, Johan A. K. Suykens, Joos Vandewalle
    A double scroll based true random bit generator. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:581-584 [Conf]
  147. Stefano Poli, Sergio Callegari, Riccardo Rovatti, Gianluca Setti
    Post-processing of data generated by a chaotic pipelined ADC for the robust generation of perfectly random bitstreams. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:585-588 [Conf]
  148. Di He, Henry Leung
    A novel CFAR intrusion detection method using chaotic stochastic resonance. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:589-592 [Conf]
  149. Ji Yao
    Optimal chaos shift keying communications with correlation decoding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:593-596 [Conf]
  150. Géza Kolumbán, Gábor Kis, Francis Chi-Moon Lau, Chi K. Michael Tse
    Optimum noncoherent FM-DCSK detector: application of chaotic GML decision rule. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:597-600 [Conf]
  151. Wai M. Tam, Francis C. M. Lau, Chi K. Michael Tse
    Generalized correlation-delay-shift-keying scheme for noncoherent chaos-based communication systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:601-604 [Conf]
  152. Wai M. Tam, Francis C. M. Lau, Chi K. Michael Tse
    An improved multiple access scheme for chaos-based digital communications using adaptive receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:605-608 [Conf]
  153. Hiroshi Fujisaki
    On distributions of multiple access interference for spread spectrum communication systems using M-phase spreading sequences of Markov chains. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:609-612 [Conf]
  154. Riccardo Rovatti, Gianluca Setti, Gianluca Mazzini
    Pulse shaping and SIR-energy trade-off in chaos-based asynchronous DS-CDMA. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:613-616 [Conf]
  155. Nobuoki Eshima, Yutaka Jitsumatsu, Tohru Kohda
    Markovian SS codes imply inversion-free code acquisition in asynchronous DS/CDMA systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:617-620 [Conf]
  156. Dejan Spasov, Gian Mario Maggio, Ljupco Kocarev
    A practical algorithm for turbo-decoding enhancement. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:621-624 [Conf]
  157. Sabato Manfredi, Franco Garofalo, Mario di Bernardo
    Analysis and effects of retransmission mechanisms on data network performance. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:625-628 [Conf]
  158. Johnson Chen, Ljiljana Trajkovic
    Analysis of Internet topology data. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:629-632 [Conf]
  159. Yoshihiro Yamagami, Hiroo Yabe, Yoshifumi Nishio, Akio Ushida
    Distortion analysis of nonlinear networks based on SPICE-oriented harmonic balance method. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:633-636 [Conf]
  160. Marco Zorzi, Francesco Franzè, Nicolo Speciale, Guido Masetti
    A tool for the integration of new VHDL-AMS models in SPICE. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:637-640 [Conf]
  161. Robert B. Staszewski, Chan Fernando, Poras T. Balsara
    Event-driven simulation and modeling of an RF oscillator. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:641-644 [Conf]
  162. Janne Aikio, Timo Rahkonen
    Fitting of 2-dimensional polynomial device model based on simulated voltage and current spectra. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:645-648 [Conf]
  163. Masato Ogata, Yoshiaki Okabe, Tetsuo Nishi
    Simple RC models of distributed RC lines in consideration with the delay time. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:649-652 [Conf]
  164. David Schwingshackl, Gernot Kubin
    Polyphase representation of multirate Volterra filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:653-656 [Conf]
  165. Raymond Flynn, Orla Feely
    Nonlinear dynamics of gear-shifting digital phase-locked loops. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:657-660 [Conf]
  166. Ching-Hsiang Tseng
    A novel method for identifying cubically nonlinear systems using minimally bandpass sampled data. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:661-664 [Conf]
  167. Oscar De Feo, Marco Storace
    PWL identification of dynamical systems: some examples. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:665-668 [Conf]
  168. Markus Christen, Albert Kern, Jan-Jan van der Vyver, Ruedi Stoop
    Pattern detection in noisy signals. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:669-672 [Conf]
  169. Hiroshi Hamanaka, Hiroyuki Torikai, Toshimichi Saito
    Spike position map with quantized state and its application to algorithmic A/D converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:673-676 [Conf]
  170. Gianluca Giustolisi, Gaetano Palumbo
    Sigma-Delta A/D fuzzy converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:677-680 [Conf]
  171. Fabio Pareschi, Gianluca Setti, Riccardo Rovatti
    Noise robustness condition for chaotic maps with piecewise constant invariant density. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:681-684 [Conf]
  172. Frank Dachselt, Stefan Quitzk
    Structure and information content in sequences from the single-loop sigma-delta modulator with DC input. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:685-688 [Conf]
  173. Stefano Santi, Gianluca Setti, Riccardo Rovatti
    Spectral aliasing effects of PWM signals with time-quantized switching instants. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:689-692 [Conf]
  174. Gerard Olivar, Fabiola Angulo, Mario di Bernardo
    Hopf-like transitions in nonsmooth dynamical systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:693-696 [Conf]
  175. Vaibhav Donde, Ian A. Hiskens
    . Grazing bifurcations in periodic hybrid systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:697-700 [Conf]
  176. Yue Ma, Hiroshi Kawakami, Chi K. Michael Tse
    Analysis of bifurcation in switched dynamical systems with periodically moving borders: application to power converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:701-704 [Conf]
  177. Fabiola Angulo, Enric Fossas, Gerard Olivar, Mario di Bernardo
    Controlling limit cycles in planar dynamical systems: a nonsmooth bifurcation approach. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:705-708 [Conf]
  178. Luigi Iannelli, Francesco Vasca
    Dither for chattering reduction in sliding mode control systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:709-712 [Conf]
  179. Ahmed S. Elwakil, Serdar Özoguz
    Pulse-excited RC nonautonomous chaotic oscillator structures. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:713-715 [Conf]
  180. Zbigniew Galias
    Towards full characterization of continuous systems in terms of periodic orbits. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:716-719 [Conf]
  181. Hisato Fujisaka, Daisuke Hamano, Masahiro Sakamoto, Takeshi Kamio
    A binary-quantized pseudo-diffusion system. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:720-723 [Conf]
  182. Chai Wah Wu
    Synchronization in systems coupled via complex networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:724-727 [Conf]
  183. Floriane Anstett, Gilles Millerioux, Gérard Bloch
    Global adaptive synchronization based upon polytopic observers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:728-731 [Conf]
  184. Ding Liu, Haipeng Ren, Xiaoyan Liu
    Chaos control in permanent magnet synchronous motor. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:732-735 [Conf]
  185. Visarath In, Andy Kho, Adi R. Bulsara, Antonio Palacios, Salvatore Baglio, Bruno Ando, Patrick Longhini, Joseph D. Neff, Brian K. Meadows
    Self-induced oscillations in coupled fluxgate magnetometer: a novel approach to operating the magnetic sensors. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:736-739 [Conf]
  186. Hiroto Tanaka, Toshimitsu Ushio
    Design of bursting in two-dimensional discrete-time neuron models. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:740-743 [Conf]
  187. Young-Jun Lee, Jihyun Lee, Yong-Bin Kim, Joseph Ayers, A. Volkovskii, Allen I. Selverston, Henry D. I. Abarbanel, Mikhail I. Rabinovich
    Low power real time electronic neuron VLSI design using subthreshold technique. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:744-747 [Conf]
  188. Vladimir Aparin, Gary Brown, Lawrence E. Larson
    Linearization of CMOS LNA's via optimum gate biasing. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:748-751 [Conf]
  189. Daniel Pacheco Bautista, Mónico Linares Aranda
    A low power and high speed CMOS Voltage-Controlled Ring Oscillator. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:752-755 [Conf]
  190. Yogesh K. Ramadass, Nirmal B. Chakrabarti
    Design and implementation of CMOS distributed mixers and oscillators for wide-band RF front-end. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:756-759 [Conf]
  191. Chandrika Durbha, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal
    Novel architectures of class AB CMOS mirrors with programmable gain. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:760-763 [Conf]
  192. Montree Siripruchyanun, Poolsak Koseeyaporn, Jeerasuda Koseeyaporn, Paramote Wardkein
    Two low-voltage high-speed CMOS frequency-insensitive PWM signal generators based on relaxation oscillator. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:764-767 [Conf]
  193. Hua Zhang, Jianzhong Zhang, Dian Zhou, Jin Liu, Liangjun Jiang, Yan Pan
    A closed-form phase noise solution for an ideal LC oscillator. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:768-771 [Conf]
  194. Octavian Dranga, Hirohito Funato, Satoshi Ogasawara, Chi K. Michael Tse, Herbert H. C. Iu
    Stability analysis of power circuit comprising virtual inductance. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:772-775 [Conf]
  195. Kwangoh Kim, Nohman Park, Taekyu Kim
    An unlimited lock range DLL for clock generator. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:776-779 [Conf]
  196. Mücahit Kozak, Eby G. Friedman
    Design and simulation of Fractional-N PLL frequency synthesizers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:780-783 [Conf]
  197. Masaharu Adachi
    Maintaining chaos in an associative chaotic neural network exhibiting intermittency. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:784-787 [Conf]
  198. Yong-Cheol Bae, Gu-Yeon Wei
    A mixed PLL/DLL architecture for low jitter clock generation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:788-791 [Conf]
  199. Keiji Konishi
    . Experimental evidence for amplitude death induced by dynamic coupling: van der Pol oscillators. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:792-795 [Conf]
  200. Takuji Kousaka, Masahiko Mori
    Bifurcation analysis in a piecewise-smooth system with periodic threshold. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:796-799 [Conf]
  201. Paolo Checco, Ljupco Kocarev, Gian Mario Maggio, Mario Biey
    On the synchronization region in networks of coupled oscillators. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:800-803 [Conf]
  202. Emer Condon, Orla Feely
    Nonlinear dynamics of a nonideal sigma-delta modulator with periodic input. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:804-807 [Conf]
  203. Armen H. Zemanian
    Hyperreal operating points for nonlinear transfinite networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:808-811 [Conf]
  204. Francesco Centurelli, Stefano Costi, Mauro Olivieri, Salvatore Pennisi, Alessandro Trifiletti
    Robust three-state PFD architecture with enhanced frequency acquisition capabilities. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:812-815 [Conf]
  205. Lihong Feng, Xuan Zeng, Jiarong Tong, Charles Chiang, Dian Zhou
    Two-sided projection method in variational equation model order reduction of nonlinear circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:816-819 [Conf]
  206. Sabato Manfredi, Mario di Bernardo, Franco Garofalo
    Small world effects in networks: an engineering interpretation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:820-823 [Conf]
  207. Xin Qi, Xiaochuan Guo, John G. Harris
    A time-to-first spike CMOS imager. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:824-827 [Conf]
  208. Eugenio Culurciello, Ralph Etienne-Cummings
    Second generation of high dynamic range, arbitrated digital imager. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:828-831 [Conf]
  209. Kimihiro Nishio, Hiroo Yonezu, Shinya Sawa, Yoichi Yoshikawa, Yuzo Furukawa
    Analog integrated circuit for detection of approaching object against moving background based on lower animal vision. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:832-835 [Conf]
  210. Evgeny Artyomov, Orly Yadid-Pecht
    Adaptive multiple resolution CMOS active pixel sensor. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:836-839 [Conf]
  211. Qiang Luo, John G. Harris
    A time-based CMOS image sensor. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:840-843 [Conf]
  212. Tobi Delbrück, Daniel Oberhoff
    Self-biasing low power adaptive photoreceptor. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:844-847 [Conf]
  213. Swati Mehta, Ralph Etienne-Cummings
    Normal Optical Flow measurement on a CMOS APS imager. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:848-851 [Conf]
  214. Alexander Fish, Vadim Milrud, Orly Yadid-Pecht
    High speed and high resolution current winner-take-all circuit in conjunction with adaptive thresholding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:852-855 [Conf]
  215. Bhaskar Choubey, Satoshi Aoyama, Dileepan Joseph, Stephen Otim, Steve Collins
    An electronic calibration scheme for logarithmic CMOS pixels. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:856-859 [Conf]
  216. Viktor Gruev, Ralph Etienne-Cummings, Timothy K. Horiuchi
    Linear current mode imager with low fix pattern noise. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:860-863 [Conf]
  217. Claudia Bonomo, Luigi Fortuna, Salvatore Graziani, Dino Mazza
    A circuit to model an Ionic Polymer-Metal Composite as actuator. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:864-867 [Conf]
  218. Salvatore Baglio, Salvatore Castorina, Jaume Esteve, Nicolò Savalli
    Highly sensitive silicon micro-g accelerometers with optical output. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:868-871 [Conf]
  219. Tuomo W. Pirinen, Jari Yli-Hietanen, Pasi Pertilä, Ari Visa
    Detection and compensation of sensor malfunction in time delay based direction of arrival estimation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:872-875 [Conf]
  220. Fatih Kocer, Paul M. Walsh, Michael P. Flynn
    An RF powered, wireless temperature sensor in quarter micron CMOS. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:876-879 [Conf]
  221. Francisco Tejada, Andreas G. Andreou, Joseph A. Miragliotta, Robert Osiander, Danielle Wesolek
    Silicon on sapphire CMOS architectures for interferometric array readout. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:880-883 [Conf]
  222. Matthew A. Clapp, Ralph Etienne-Cummings
    Bearing angle estimation for sonar micro-array using analog VLSI spatiotemporal processing. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:884-887 [Conf]
  223. Diego Ruben Barrettino, Markus Graf, Kay-Uwe Kirstein, Andreas Hierlemann, Henry Baltes
    A monolithic fully-differential CMOS gas sensor microsystem for microhotplate temperatures up to 450/spl deg/C. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:888-891 [Conf]
  224. Steven M. Martin, Fadi H. Gebara, Timothy D. Strong, Richard B. Brown
    A low-voltage, chemical sensor interface for systems-on-chip: the fully-differential potentiostat. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:892-895 [Conf]
  225. Raimon Casanova, José Luis Merino, Ángel Dieguez, Sebastià A. Bota, Josep Samitier
    A mixed-mode temperature control circuit for gas sensors. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:896-909 [Conf]
  226. Rock Z. Shi, Timothy K. Horiuchi
    VLSI model of the bat lateral superior olive for azimuthal echolocation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:900-903 [Conf]
  227. Zheng Zeng-Wei, Wu Zhao-Hui, Lin Huai-Zhong
    Clustering routing algorithm using game-theoretic techniques for WSNs. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:904-907 [Conf]
  228. Martin Haenggi
    Toward a circuit theory for sensor networks with fading channels. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:908-911 [Conf]
  229. Koji Fujii, Jun Terada, Junichi Kodate, Tsuneo Tsukahara, Shin'ichiro Mutoh, Yuichi Kado
    A 2-Mb/s, UHF-band, wireless sensor node for real-time multi-point sensing. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:912-915 [Conf]
  230. Sazzadur Chowdhury, Majid Ahmadi, William C. Miller
    Electrical connectivity analysis of a MEMS micropackage. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:916-919 [Conf]
  231. Francisco Tejada, Andreas G. Andreou, Dennis K. Wickenden, Arthur S. Francomacaro
    Surface micromachining in Silicon on Sapphire CMOS technology. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:920-923 [Conf]
  232. Hisako Shiraishi, André van Schaik
    A 2-Dimensional active cochlear model for analog VLSI implementation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:924-927 [Conf]
  233. Alistair McEwan, André van Schaik
    An alternative analog VLSI implementation of the Meddis inner hair cell model. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:928-931 [Conf]
  234. Leif Lindgren
    Elimination of quantization effects in measured temporal noise. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:932-935 [Conf]
  235. Walter D. Leon, Sina Balkir, Khalid Sayood, Michael W. Hoffman
    Charge-based prediction circuits for focal plane image compression. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:936-939 [Conf]
  236. Jarkko Jussila, Kari Halonen
    Minimization of power dissipation of analog channel-select filter and Nyquist-rate A/D converter in UTRA/FDD. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:940-943 [Conf]
  237. Reid R. Harrison
    A single-chip CMOS visual orientation sensor. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:944-947 [Conf]
  238. Ananth Bashyam, Paul M. Furth, Michael K. Giles
    A high speed centroid computation circuit in analog VLSI. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:948-951 [Conf]
  239. Alasdair J. Sutherland, Alister Hamilton, David A. Renshaw, Yaxiong Zhang, Mark A. Glover
    Minipix: focal plane temporal frequency image processor. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:952-955 [Conf]
  240. Eugenio Culurciello, Andreas G. Andreou
    ALOHA CMOS imager. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:956-959 [Conf]
  241. Shy Hamami, Leonid Fleshel, Orly Yadid-Pecht
    CMOS APS imager employing 3.3 V 12 bit 6.3 MS/s pipelined ADC. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:960-963 [Conf]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002