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IEEE International Symposium on Circuits and Systems (ISCAS) (iscas)
1999 (conf/iscas/1999)

  1. Axel Wenzler, Ernst Lücker
    Analysis of the periodic steady-state in nonlinear circuits using an adaptive function base. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:1-4 [Conf]
  2. Dorin Emil Calbaza, Yvon Savaria
    Jitter model of direct digital synthesis clock generators. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:1-4 [Conf]
  3. Kjersti Engan, Sven Ole Aase, John Håkon Husøy
    Frame based signal compression using method of optimal directions (MOD). [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:1-4 [Conf]
  4. S. Basu
    New results in multidimensional linear phase filter bank design. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:1-4 [Conf]
  5. Henrik T. Jensen, Joseph F. Jensen
    A low-complexity dynamic element matching technique for reduced-distortion digital-to-analog conversion. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:1-4 [Conf]
  6. Simone Fiori, Aurelio Uncini, Francesco Piazza
    Blind deconvolution by modified Bussgang algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:1-4 [Conf]
  7. A. A. Beex, Peijun Shan
    A time-varying Prony method for instantaneous frequency estimation at low SNR. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:5-8 [Conf]
  8. H. Ryu, Y. Miyanaga, K. Tochinai
    An image compression using self-organization with genetic algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:5-8 [Conf]
  9. P. Zaris, J. Wood, E. Rogers, D. H. Owens
    A behavioural approach to the pole/zero structure of nD linear systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:5-8 [Conf]
  10. D. M. W. Leenaerts
    Symbolic analysis of large signals in nonlinear systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:5-8 [Conf]
  11. Jesper Steensgaard, Un-Ku Moon, Gabor C. Temes
    Mismatch-shaping serial digital-to-analog converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:5-8 [Conf]
  12. Graham A. Jullien, Vassil S. Dimitrov, B. Li, William C. Miller, A. Lee, Majid Ahmadi
    A hybrid DBNS processor for DSP computation. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:5-8 [Conf]
  13. Bruno Aiazzi, Stefano Baronti, Luciano Alparone
    Lossless image compression based on a fuzzy-clustered prediction. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:9-12 [Conf]
  14. John Håkon Husøy, Sven Ole Aase, Karl Skretting, Kjersti Engan
    Design of general block oriented expansions for efficient signal representation. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:9-12 [Conf]
  15. C. C. Ho, C. J. Kuo
    Gain mismatch effect of cascaded sigma delta modulator reduced by serial technique. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:9-12 [Conf]
  16. Allan R. Dyck, S. Evenson, H. Fu, Richard F. Hobson
    User selectable feature support for an embedded processor. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:9-12 [Conf]
  17. W. M. Lawton, Zhiping Lin
    Matrix completion problems in multidimensional systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:9-12 [Conf]
  18. C. M. Arturi, A. Gandelli, S. Leva, S. Marchi, A. P. Morando
    Multiresolution analysis of time-variant electrical networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:9-13 [Conf]
  19. E. K. Ogoubi, Eduard Cerny
    Synthesis of checker EFSMs from timing diagram specifications. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:13-18 [Conf]
  20. M. F. Fahmy, G. M. A. El-Raheem, A. A. El-Sallam
    Two rapidly convergent algorithms for signal separation. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:13-16 [Conf]
  21. Saska Lindfors, M. Lansirinne, T. Lindeman, Kari Halonen
    On the design of 2nd order multi-bit Sigma-Delta-modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:13-16 [Conf]
  22. Sven Ole Aase, John Håkon Husøy, P. Waldemar
    A critique of SVD-based image coding systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:13-16 [Conf]
  23. Li Xu, O. Saito, Jiang Qian Ying
    2D feedback system design: the tracking and disturbance rejection problems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:13-16 [Conf]
  24. Takashi Hisakado, Kohshi Okumura
    Steady states prediction in nonlinear circuit by wavelet transform. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:14-17 [Conf]
  25. Yngvar Berg, Tor Sverre Lande
    Tunable current mirrors for ultra low voltage. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:17-20 [Conf]
  26. Sheng-Chieh Huang, Liang-Gee Chen, Hao-Chieh Chang
    A novel image compression algorithm by using Log-Exp transform. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:17-20 [Conf]
  27. Alfred Fettweis, G. A. Seraji
    New results in numerically integrating PDES by the wave digital approach. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:17-20 [Conf]
  28. Tak Keung Yeung, Sze-Fong Yau
    A multi-input multi-output adaptive FIR filter with guaranteed convergence for feedforward ANC system. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:17-20 [Conf]
  29. P. Eriksson, Hannu Tenhunen
    A model for predicting sampler RF bandwidth and conversion loss. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:18-21 [Conf]
  30. Arthur T. G. Fuller, Behrouz Nowrouzian
    An exact BIBO stability condition for Bode-type variable-amplitude digital equalizers. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:19-22 [Conf]
  31. C. D. Schmitz, W. Kenneth Jenkins
    Adaptive noise subspace construction for harmonic retrieval. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:21-24 [Conf]
  32. C.-H. Lin, M. Ismail
    Design and analysis of an ultra low-voltage CMOS class-AB V-I converter for dynamic range enhancement. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:21-24 [Conf]
  33. Yining Deng, Charles S. Kenney, Michael S. Moore, B. S. Manjunath
    Peer group filtering and perceptual color image quantization. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:21-24 [Conf]
  34. Rudolf Rabenstein, Lutz Trautmann
    Solution of vector partial differential equations by transfer function models. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:21-24 [Conf]
  35. Dario D'Amore, Paolo Maffezzoni
    A new diode model formulation for electro-thermal analysis. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:22-25 [Conf]
  36. Dimitrios Kagaris, Spyros Tragoudas
    Embedded cores using built-in mechanisms. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:23-26 [Conf]
  37. J. Francisco Duque-Carrillo, José L. Ausín, Guido Torelli, Juan M. Carrillo, P. Merchan
    Input common-mode feedback technique for very low voltage CMOS amplifiers. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:25-28 [Conf]
  38. Makoto Nakashizuka, Hisakazu Kikuchi
    Edge-based image synthesis model and its application to image coding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:25-28 [Conf]
  39. B. G. Mertzios, F. N. Koumboulis
    Analysis and numerical integration of nonlinear systems using MD passive circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:25-28 [Conf]
  40. He-Chi Hwang, Che-Ho Wei
    Adaptive blind demodulation of DS/CDMA signals with transform domain Griffiths' algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:25-28 [Conf]
  41. C. S. Petrie, J. Alvin Connelly
    The sampling of noise for random number generation. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:26-29 [Conf]
  42. Ahmed M. Shams, Magdy A. Bayoumi
    Performance evaluation of 1-bit CMOS adder cells. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:27-30 [Conf]
  43. S. Wyrsch, A. Kaelin
    Subband signal processing for hearing aids. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:29-32 [Conf]
  44. S. H. Saeid, J. K. Gautam
    Restoration of noise corrupted images using new 2-D window families. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:29-32 [Conf]
  45. Wu-Sheng Lu, Andreas Antoniou
    Design of nonrecursive 2-D digital filters using semidefinite programming. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:29-32 [Conf]
  46. Jesper Steensgaard
    Bootstrapped low-voltage analog switches. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:29-32 [Conf]
  47. K. W. Tam, P. Viror, J. C. Freire, R. P. Martins
    New microwave bandstop filter using lumped and transversal network. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:30-32 [Conf]
  48. Andreas G. Veneris, Ibrahim N. Hajj
    Correcting multiple design errors in digital VLSI circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:31-34 [Conf]
  49. V. K. Gopalakrishnan, Ravi P. Ramachandran, J. Wilder, Richard J. Mammone
    Restoration of three dimensional microscopic images using the row action projection method. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:33-36 [Conf]
  50. Ahmet Kemal Özdemir, Orhan Arikan
    A theoretical investigation on exact blind channel and input sequence estimation. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:33-36 [Conf]
  51. Ravindranath Naiknaware, Terri S. Fiez
    Time-referenced single-path multi-bit Sigma-Delta ADC using a VCO based quantizer. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:33-36 [Conf]
  52. A. Kamo, T. Watanabe, H. Asai
    Expanded GMC for transient analysis of transmission line networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:33-36 [Conf]
  53. I. Yamada, K. Nakajima
    A simple M-dimensional model-based phase unwrapping based on integration by parts. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:33-36 [Conf]
  54. Gustavo R. Alves, José M. M. Ferreira
    A system verification strategy based on the BST infrastructure. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:35-38 [Conf]
  55. M. R. Sherkat, Steven B. Bibyk
    A novel decoder for Sigma-Delta modulator providing both high resolution and low latency. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:37-40 [Conf]
  56. Shu Hung Leung, Jian-Feng Weng
    Adaptive filters with nonlinear RLS algorithm in impulse noise. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:37-40 [Conf]
  57. I. Yamada
    Approximation of convexly constrained pseudoinverse by hybrid steepest descent method. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:37-40 [Conf]
  58. D. B. Carvalho, Sidnei Noceti Filho, Rui Seara
    Design of phase equalizers via symmetry of the impulse response. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:37-40 [Conf]
  59. Sung Deuk Kim, Sung Kyu Jang, Myung Jun Kim, Jong Beom Ra
    Efficient block-based coding of noise images by combining pre-filtering and DCT. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:37-40 [Conf]
  60. Seung-Wook Lee, Daeyun Shim, Yeon-Jae Jung, Dong-Yun Lee, Chang-Hyun Kim, Wonchan Kim
    A load-adaptive, low switching-noise data output buffer. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:39-42 [Conf]
  61. D. Mukherjee, S. K. Mitra
    On the robustness of vector set partitioning image coders to bit errors. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:41-45 [Conf]
  62. Corneliu Rusu, Pauli Kuosmanen
    Logarithmic sampling of gain and phase approximation. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:41-44 [Conf]
  63. S. Nishimura, M. Aloys
    Rejection of narrow-band interference in BPSK demodulation using adaptive IIR notch filter. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:41-44 [Conf]
  64. Q. Li, Jan Van der Spiegel, K. R. Laker
    A low-voltage/low-power second-order $\Sigma\Delta$ modulator with signal adaptive control architecture. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:41-44 [Conf]
  65. Hyungju Park
    Complete parametrization of synthesis in multidimensional perfect reconstruction FIR systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:41-44 [Conf]
  66. Hanan A. Mahmoud, Magdy A. Bayoumi
    A 10-transistor low-power high-speed full adder cell. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:43-46 [Conf]
  67. W. M. Lawton, Zhiping Lin
    Matrix completion problems in multidimensional systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:45-48 [Conf]
  68. Y. Botteron, Behrouz Nowrouzian, Arthur T. G. Fuller
    Design and switched-capacitor implementation of a new cascade-of-resonators Sigma-Delta converter configuration. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:45-48 [Conf]
  69. Kisuk Yoo, Sanggee Kang, Jae-Ick Choi, Jong-Suk Chae
    Adaptive feed-forward linear power amplifier (LPA) for the IMT-2000 frequency band. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:45-48 [Conf]
  70. Remzi Öten, Rui J. P. de Figueiredo
    Adaptive alpha-trimmed mean filters based on asymptotic variance minimization. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:45-48 [Conf]
  71. Wing-Kuen Ling, Bing Zeng
    A novel method for blocking effect reduction in DCT-coded images. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:46-49 [Conf]
  72. Chung-Yu Wu, Yu-Yee Liow
    A new dynamic ternary sense amplifier for 1.5-bit/cell multi-level low-voltage CMOS DRAMs. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:47-50 [Conf]
  73. Ruey-Wen Liu, Yujiro Inouye
    Direct blind deconvolution of multiuser-multichannel systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:49-52 [Conf]
  74. E. Bidari, M. Keskin, Franco Maloberti, Un-Ku Moon, Jesper Steensgaard, Gabor C. Temes
    Low-voltage switched-capacitor circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:49-52 [Conf]
  75. David Báez-López, E. Jimenez-Lopez
    A modified inverse-Chebyshev filter with an all positive elements ladder passive realization. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:49-52 [Conf]
  76. Zhipei Chi, Jun Ma, Keshab K. Parhi
    Pipelined QR decomposition based multi-channel least square lattice adaptive filter architectures. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:49-53 [Conf]
  77. Te-Chung Yang, Sunil Kumar, C. C. Jay Kuo
    Low-overhead error-resilient bit-plane image coding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:50-53 [Conf]
  78. Chin-Liang Wang, Ching-Hsien Chang
    A novel DHT-based FFT/IFFT processor for ADSL transceivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:51-54 [Conf]
  79. Sepp Hochreiter, Jürgen Schmidhuber
    Nonlinear ICA through low-complexity autoencoders. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:53-56 [Conf]
  80. L. A. Carastro, R. Poddar, E. Moon, Martin A. Brooke, Nan M. Jokerst
    Passive device modeling methodology using nonlinear optimization. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:53-56 [Conf]
  81. S. Karthikeyan, A. Tammineedi, C. Boecker, E. K. F. Lee
    A 1 V front-end interface for switched-op amp circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:53-56 [Conf]
  82. Anthony Chan Carusone, David A. Johns
    Obtaining digital gradient signals for analog adaptive filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:54-57 [Conf]
  83. D. Gibson, M. Spann
    Multi-frame motion estimation: application to motion compensated prediction. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:54-57 [Conf]
  84. K. Bacrania, Tzi-Hsiung Shu
    A CMOS 10 b 60 Msample/s ADC with ultra fast gain control. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:55-58 [Conf]
  85. Bor-Ren Lin, Hsin-Hung Lu
    Multilevel PWM for single-phase power factor pre-regulator. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:57-60 [Conf]
  86. Seng-Pan U., Rui Paulo Martins, José E. Franca
    Highly accurate mismatch-free SC delay circuits with reduced finite gain and offset sensitivity. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:57-60 [Conf]
  87. Aapo Hyvärinen
    Fast ICA for noisy data using Gaussian moments. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:57-61 [Conf]
  88. Klaus Wiehler, Rolf-Rainer Grigat
    Real-time adaptive signal processing using a dynamic reconfigurable systolic architecture in analog VLSI. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:58-61 [Conf]
  89. K. Cisowski, M. Niedzwiecki
    Smart copying-a new approach to reconstruction of audio signals. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:58-63 [Conf]
  90. Sven Simon, Marek Wróblewski
    Low power datapath design using transformation similar to temporal localization of SFGs. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:59-61 [Conf]
  91. Mikko Waltari, Kari Halonen
    Timing skew insensitive switching for double sampled circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:61-64 [Conf]
  92. Michiel H. L. Kouwenhoven, J. Mulder, Wouter A. Serdijn, Arthur H. M. van Roermund
    Analysis of noise in higher-order translinear filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:61-64 [Conf]
  93. Kei-Yong Khoo, Zhan Yu, Alan N. Willson Jr.
    Improved-Booth encoding for low-power multipliers. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:62-65 [Conf]
  94. Stefano Traferro, Aurelio Uncini
    Power-of-two adaptive filters using tabu search. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:62-65 [Conf]
  95. Gert Cauwenberghs
    Monaural separation of independent acoustical components. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:62-65 [Conf]
  96. Thomas P. Costello, Wasfy B. Mikhael
    Asymmetric, space-variant point spread function model for a spherical lens optical system. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:64-67 [Conf]
  97. G. Efthivoulidis, Yannis P. Tsividis
    Signal analysis of externally linear filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:65-68 [Conf]
  98. L. G. Bustamante, Michael A. Soderstrand
    High-range switched-capacitor tracking filter. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:65-68 [Conf]
  99. S. Ohno, H. Sakai, H. Yoshida
    Adaptive blind equalization of multichannel FIR systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:66-69 [Conf]
  100. Fathi M. A. Salam, Gail Erten
    The state space framework for blind dynamic signal extraction and recovery. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:66-69 [Conf]
  101. Ashok Kumar, Magdy A. Bayoumi, Raghava V. Cherabuddi
    Minimizing switchings of the function units through binding for low power. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:66-69 [Conf]
  102. John Gates, Miki Haseyama, Hideo Kitajima
    A real-time line extraction algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:68-71 [Conf]
  103. F. C. M. Kuijstermans, F. M. Diepstraten, Wouter A. Serdijn, P. van der Kloet, Arie van Staveren, Arthur H. M. van Roermund
    The linear time-varying approach applied to a first-order dynamic translinear filter. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:69-72 [Conf]
  104. R. Boi, S. Brigati, F. Francesconi, C. Ghidini, Piero Malcovati, Franco Maloberti, M. Poletti
    Switched-capacitor Litton-code matched filter for satellite ODBH bus. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:69-72 [Conf]
  105. Rahul Sarpeshkar
    Energy-efficient adaptive signal decomposition: the silicon and biological cochlea. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:70-73 [Conf]
  106. C. J. Kuo, C. Y. Lin, John R. Deller Jr.
    Set theoretic estimation through triangular noise distribution. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:70-73 [Conf]
  107. Imed Ben Dhaou, Hannu Tenhunen
    Combinatorial architectural level power optimization for a class of orthogonal transforms. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:70-75 [Conf]
  108. Narasimha Kaulgud, Uday B. Desai
    Restoration of color images subjected to interchannel blurring. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:72-75 [Conf]
  109. M. Keramat
    Theoretical bases of convolution technique in gradient estimation of average quality index of electronic circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:73-76 [Conf]
  110. Antonio Petraglia, Jacqueline S. Pereira
    Switched-capacitor decimation filters with direct form polyphase structure having very small sensitivity characteristics. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:73-76 [Conf]
  111. M. Erturk, David J. Klein, Shihab A. Shamma
    Auditory cortical spectral shape analysis in analog VLSI. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:74-77 [Conf]
  112. A. Abou-El-Azm, F. S. Mohammed
    Variable-rate punctured convolutional coding over fading mobile communication channels. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:74-77 [Conf]
  113. O-Hyung Kwon, Young-Sik Kim, Rae-Hong Park
    Watermarking for still images using the human visual system in the DCT domain. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:76-79 [Conf]
  114. C. Chakrabarti, D. Gaitonde
    Instruction level power model of microcontrollers. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:76-79 [Conf]
  115. Seng-Pan U., Rui Paulo Martins, José E. Franca
    High performance multirate SC circuits with predictive correlated double sampling technique. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:77-80 [Conf]
  116. Bor-Ren Lin, Yuen-Chou Hsieh
    High power factor of metal halide lamp with dimming control. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:77-80 [Conf]
  117. Andrzej Cichocki, Liqing Zhang, Tomasz M. Rutkowski
    Blind separation and filtering using state space models. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:78-81 [Conf]
  118. Liang Jin, Wenjie Wang, Qinye Yin
    Two-dimensional direction finding for wideband signals using simplified array configuration. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:78-81 [Conf]
  119. Young-Sik Kim, O-Hyung Kwon, Rae-Hong Park
    Wavelet based watermarking method for digital images using the human visual system. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:80-83 [Conf]
  120. Mark S. Bright, Tughrul Arslan
    Multi-objective design strategy for high-level low power design of DSP systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:80-83 [Conf]
  121. M. Yamauchi, T. Watanabe
    A heuristic algorithm SDS for scheduling with timed Petri nets. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:81-84 [Conf]
  122. Ramachandra Achar, Michel S. Nakhla
    Efficient simulation of on-chip RF components using model-reduction techniques. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:81-84 [Conf]
  123. S. Chandrasekaran, D. K. Lindner, D. Boroyevich
    Analysis of subsystem integration in aircraft power distribution systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:82-85 [Conf]
  124. Ten-Szu Chen, Der-Zheng Liu, Che-Ho Wei
    Combined carrier phase tracking and equalization for pi/4-DQPSK signals in mobile radio. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:82-85 [Conf]
  125. Leilei Song, Keshab K. Parhi
    Low-energy software Reed-Solomon codecs using specialized finite field datapath and division-free Berlekamp-Massey algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:84-89 [Conf]
  126. K. Suzuki, M. Nagao, H. Ikeda, Y. Shimodaira, M. Yamazaki
    Reduction of waiting time for retrieving images from distributed image databases. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:84-89 [Conf]
  127. Shijun Yang, Ralph Mason, Calvin Plett
    6.5 mW CMOS low noise amplifier at 1.9 GHz. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:85-88 [Conf]
  128. J. Martínez-Castillo, J. Silva-Martinez
    Transimpedance amplifiers for optical fiber systems based on common-base transistors. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:85-88 [Conf]
  129. J. Mannerkoski, Visa Koivunen
    Error analysis of a multi-step prediction based blind equalizer. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:86-89 [Conf]
  130. M. C. Tavares, J. Pissolato, C. M. Portela
    New mode-domain representation of transmission line for power system studies-comparing with existing models. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:86-89 [Conf]
  131. Abdelouahab Djemouai, Mohamad Sawan, Mustapha Slamani
    A 200 MHz frequency-locked loop based on new frequency-to-voltage converters approach. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:89-92 [Conf]
  132. Chang-Hyeon Lee, K. McCellan, John Choma Jr.
    Supply noise insensitive bandgap regulator using capacitive charge pump DC-DC converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:89-92 [Conf]
  133. Lazhar Khriji, Moncef Gabbouj
    Vector median-rational hybrid filters for multichannel image processing. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:90-93 [Conf]
  134. A. R. Messina, E. Baracio, E. Sanchez C
    Application of perturbation methods to the analysis of inter-area oscillations. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:90-93 [Conf]
  135. J. Gao, Y. H. Leung
    A new adaptive equalizer for carrierless amplitude and phase (CAP) receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:90-93 [Conf]
  136. Christian V. Schimpfle, Sven Simon, Josef A. Nossek
    Device level based cell modeling for fast power estimation. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:90-93 [Conf]
  137. Laleh Behjat, Anthony Vannelli
    VLSI concentric partitioning using interior point quadratic programming. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:93-96 [Conf]
  138. Hormoz Djahanshahi, C. Andre T. Salama
    Differential 0.35µm CMOS circuits for 622 MHz/933 MHz monolithic clock and data recovery applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:93-96 [Conf]
  139. H. Mori, A. Yuihara
    Calculation of multiple power flow solutions with the Krawczyk method. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:94-97 [Conf]
  140. Miki Haseyama, N. Iwai, Hideo Kitajima
    A criterion-based image segmentation method with a genetic algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:94-97 [Conf]
  141. Parag K. Lala, A. L. Burress
    A technique for designing self-checking logic for FPGAs. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:94-96 [Conf]
  142. J. Vesma, Tapio Saramäki, Markku Renfors
    Combined matched filter and polynomial-based interpolator for symbol synchronization in digital receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:94-97 [Conf]
  143. G. P. Hartman, K. W. Martin, A. McLaren
    Continuous-time adaptive-analog coaxial cable equalizer in 0.5 um CMOS. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:97-100 [Conf]
  144. W. Quddus, Abhijit Jas, Nur A. Touba
    Configuration self-test in FPGA-based reconfigurable systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:97-100 [Conf]
  145. A. Harb, Mohamad Sawan
    New low-power low-voltage high-CMRR CMOS instrumentation amplifier. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:97-100 [Conf]
  146. Gonçalo Nuno Gomes Tavares, Luís Miguel Gomes Tavares, Moisés Simões Piedade
    Improved feedforward ML timing estimation for PSK signaling. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:98-101 [Conf]
  147. D. Shmilovitz, Dariusz Czarkowski, Zivan Zabar
    New switch-mode topology for VAR compensation. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:98-101 [Conf]
  148. N. Yabuki, Y. Matsuda, Y. Fukui, S. Miki
    Region detection using color similarity. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:98-101 [Conf]
  149. S. Wang, M. Omair Ahmad
    A switched-current ratio-independent algorithmic D/A converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:101-104 [Conf]
  150. Kamran Zarrineh, Shambhu J. Upadhyaya
    A design for test perspective on memory synthesis. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:101-104 [Conf]
  151. P. A. Ramamoorthy
    Nonlinear signal processor design: a building block approach. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:101-104 [Conf]
  152. B. LaRoy Berg, A. A. Beex
    Investigating speaker features from very short speech records. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:102-105 [Conf]
  153. Ka Nang Leung, Philip K. T. Mok, Wing-Hung Ki
    A novel frequency compensation technique for low-voltage low-dropout regulator. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:102-105 [Conf]
  154. Chun-Pong Chau, Wan-Chi Siu
    New dominant point detection for image recognition. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:102-105 [Conf]
  155. Chunyan Wang, M. Omair Ahmad, M. N. S. Swamy
    Design of a transistor-mismatch-insensitive switched-current memory cell. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:105-108 [Conf]
  156. K. Raahernifar, M. Ahmadi
    On-line IDDQ fault testing for CMOS/BiCMOS logic families. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:105-109 [Conf]
  157. R. J. Pieper, S. Michael
    Circuit modeling to predict the performance of force-cooled cold plate structures. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:105-108 [Conf]
  158. A. P. Berg, Wasfy B. Mikhael
    A survey of mixed transform techniques for speech and image coding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:106-109 [Conf]
  159. Richard A. Guinee, C. Lyden
    Accurate modelling and simulation of a DC brushless motor drive system for high performance industrial applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:106-109 [Conf]
  160. A. M. Abdelatty Ali, G. Haentjens, O. Palmer, K. Pinnaduwage, Jan Van der Spiegel, Paul Mueller
    A GUI system for speech synthesis through graphical manipulation of spectrograms. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:106-109 [Conf]
  161. Sassan Tabatabaei, André Ivanov
    A built-in current monitor for testing analog circuit blocks. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:109-114 [Conf]
  162. M. D. Bagewadi, B. G. Fernandes, R. V. S. Subrahmanyam
    A novel QRDCL circuit for zero voltage switched inverter. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:109-112 [Conf]
  163. Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, J. Figueras, S. Manich, P. Teixeira, M. Santos
    Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:110-113 [Conf]
  164. M. R. Nakhai, Farrokh Marvasti
    A 4.1 kb/s hybrid speech coder. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:110-113 [Conf]
  165. Stefano Rovetta, Rodolfo Zunino
    VLSI circuits with fractal layout for spatial image decorrelation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:110-113 [Conf]
  166. Chung-Chieh Fang, E. H. Abed
    Sampled-data modeling and analysis of closed-loop PWM DC-DC converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:110-115 [Conf]
  167. D. L. Youngblood
    Multi-mode impedance synthesis for subscriber line applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:113-116 [Conf]
  168. Adnan M. Alattar, Sarah A. Rajala
    Estimating head's measurements from front-view head and shoulders images. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:114-117 [Conf]
  169. Eric W. M. Yu, Cheung-fat Chan
    A variable-rate harmonic speech coder with efficient spectral quantization. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:114-117 [Conf]
  170. Paulo F. Flores, Horácio C. Neto, K. Chakrabarty, João P. Marques Silva
    Test pattern generation for width compression in BIST. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:114-118 [Conf]
  171. A. M. Fahim, Mohamed I. Elmasry
    A low-power CMOS frequency synthesizer design methodology for wireless applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:115-119 [Conf]
  172. K. T. Miller, G. L. Borrows
    Feature tracking linear optic flow sensor chip. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:116-119 [Conf]
  173. Guo-Hui Lin, Guoliang Xue
    Balancing Steiner minimum trees and shortest-path trees in the rectilinear plane. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:117-120 [Conf]
  174. A. M. Abdelatty Ali, Jan Van der Spiegel, Paul Mueller, G. Haentjens, J. Berman
    An acoustic-phonetic feature-based system for automatic phoneme recognition in continuous speech. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:118-121 [Conf]
  175. M. A. Kohler, P. Yarlagadda
    Naturalness preserving transform for missing frame compensation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:118-122 [Conf]
  176. P. K. Jaini, Nur A. Touba
    Observing test response of embedded cores through surrounding logic. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:119-123 [Conf]
  177. Soliman A. Mahmoud, Ahmed M. Soliman
    The current-feedback differential difference amplifier: new CMOS realization with rail to rail class-AB output stage. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:120-123 [Conf]
  178. Gail Erten, Fathi M. A. Salam
    Modified cellular neural network architecture for integrated image sensing and processing. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:120-123 [Conf]
  179. E. Miuno, T. Abaashi, T. Watanabe
    Extracting nonplanar connections in a terminal-vertex graph. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:121-124 [Conf]
  180. Y. Kuroiwa, T. Shimamura
    An improvement of LPC based on noise reduction using pitch synchronous addition. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:122-125 [Conf]
  181. C. Chakrabarti
    A DWT-based encoder architecture for symmetrically extended images. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:123-126 [Conf]
  182. D. M. W. Leenaerts
    A new concept for flash AD conversion. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:124-127 [Conf]
  183. W. B. Lawler
    CMOS drive circuit for opto-electronic readout of image sensors. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:124-127 [Conf]
  184. R. A. Said
    Internal testing of integrated circuits by noncontact sampling electrostatic force microscopy using pulse width modulation technique. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:124-128 [Conf]
  185. Guo-Hui Lin, A. P. Thurber, Guoliang Xue
    The 1-Steiner tree problem in lambda-3 geometry plane. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:125-128 [Conf]
  186. S. Varho, P. Alku
    A new predictive method for all-pole modelling of speech spectra with a compressed set of parameters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:126-129 [Conf]
  187. Takayuki Hamamoto, Yasuhiro Ohtsuka, Kiyoharu Aizawa
    Very fast tracking and depth estimation by using focal plane compression sensors. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:127-130 [Conf]
  188. H. Schmid, George S. Moschytz
    A tunable, video-frequency, low-power, single-amplifier biquadratic filter in CMOS. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:128-131 [Conf]
  189. Piero Malcovati, Franco Maloberti
    A fully integrated CMOS magnetic current monitor. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:128-131 [Conf]
  190. Robert C. Chang, Lung-Chih Kuo, Chih-Yuan Hsieh
    VLSI implementation of a multicast ATM switch. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:129-132 [Conf]
  191. K. Tsuji
    Structural properties for transformation of extended marked graphs. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:129-132 [Conf]
  192. Lan-Da Van, Shuenn-Shyang Wang, Shing Tenqchen, Wu-Shiung Feng, Bor-Shenn Jeng
    Design of a lower-error fixed-width multiplier for speech processing application. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:130-133 [Conf]
  193. Victor E. DeBrunner, Linda DeBrunner, Longji Wang
    Recovery of lost blocks by dynamic pixel interleaving. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:131-134 [Conf]
  194. Y. Sugimoto, S. Imai
    The design of a 1 V, 40 MHz, current-mode sample-and-hold circuit with 10-bit linearity. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:132-135 [Conf]
  195. Lorenzo Gonzo, Massimo Gottardi, J.-Angelo Beraldin, Andrea Simoni
    A novel optical Bi-Cell with integrated readout circuitry. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:132-135 [Conf]
  196. R. Vargas Bernal, A. Samtiento Reyes
    A topology-based method for identifying flip-flop graphs in BJT circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:133-136 [Conf]
  197. Lihong Jia, Yonghong Gao, Jouni Isoaho, Hannu Tenhunen
    Design of a super-pipelined Viterbi decoder. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:133-136 [Conf]
  198. Mariane R. Petraglia, Rogerio Guedes Alves, Paulo S. R. Diniz
    Convergence analysis of a new subband adaptive structure with critical sampling. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:134-137 [Conf]
  199. Rodolfo Zunino, Stefano Rovetta
    Visual location of license plates by vector quantization. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:135-138 [Conf]
  200. C.-H. Liu, M. Ismail
    A 2 V 5th-order fully-differential CMOS Gm-C filter for wideband communication. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:136-139 [Conf]
  201. A. Rasmussen, Mona E. Zaghloul
    The design and fabrication of microfluidic flow sensors. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:136-139 [Conf]
  202. Chi-Ying Tsui, R. S.-K. Cheng, C. Ling
    Low power ACS unit design for the Viterbi decoder [CDMA wireless systems]. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:137-140 [Conf]
  203. Jun Inagaki, Miki Haseyama, Hideo Kitajima
    A genetic algorithm for determining multiple routes and its applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:137-140 [Conf]
  204. Mariane R. Petraglia, P. R. V. Piber
    Prototype filter design for oversampled subband adaptive filtering structures. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:138-141 [Conf]
  205. K. Eginzarian, Mika Helsingius, Pauli Kuosmanen, Jaakko Astola
    Removal of blocking and ringing artifacts using transform domain denoising. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:139-142 [Conf]
  206. C. Pala, G. Schuppener, M. Mokhtari
    A 6 GHz, 1.8 V, divide-by-2 circuit implemented in silicon bipolar technology. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:140-143 [Conf]
  207. Louiza Sellami, Robert W. Newcomb
    A MOSFET bridge fluid biosensor. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:140-143 [Conf]
  208. J. Scanlon, N. Deo
    Graph-theoretic algorithms for image segmentation. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:141-144 [Conf]
  209. Li-minn Ang, Hon Nin Cheung, Kamran Eshraghian
    VLSI decoder architecture for embedded zerotree wavelet algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:141-144 [Conf]
  210. S. Gollamudi, Yih-Fang Huang
    Adaptive minimax filtering via recursive optimal quadratic approximations. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:142-145 [Conf]
  211. Seyfullah H. Oguz, Truong Q. Nguyen, Yen Hen Hu
    Critical quantization decisions in transform coding and blocking artifacts. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:143-146 [Conf]
  212. V. Milanovic, M. Hopcroft, C. A. Zincke, M. Gaitan, Mona E. Zaghloul
    Optimization of CMOS MEMS microwave power sensors. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:144-147 [Conf]
  213. Mohamed Dessouky, Andreas Kaiser
    Rail-to-rail operation of very low voltage CMOS switched-capacitor circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:144-147 [Conf]
  214. Gregory Tumbush, Dinesh Bhatia
    Clustering to improve bi-partition quality and run time. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:145-148 [Conf]
  215. Guoqing Zhang, M. Talley, Wael M. Badawy, Michael Weeks, Magdy A. Bayoumi
    A low power prototype for a 3D discrete wavelet transform processor. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:145-148 [Conf]
  216. Guo-Fang Xu, Tamal Bose, Jim Schroeder
    The Euclidean direction search algorithm for adaptive filtering. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:146-149 [Conf]
  217. Chi-Man Lee, Bing Zeng
    A novel interpolation scheme for quincunx-subsampled images. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:147-150 [Conf]
  218. F. Dudek, Bashir M. Al-Hashimi, M. Moniri
    Compensation of nonideal effects in video-frequency sinc(x)-equalizers using tunable gm-C structure. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:148-151 [Conf]
  219. Nenad Stevanovic, Matthias Hillebrand, Bedrich J. Hosticka, Uri Iurgel, Andreas Teuner
    A high speed camera system based on an image sensor in standard CMOS technology. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:148-151 [Conf]
  220. S. Masupe, T. Arslan
    Low power DCT implementation approach for VLSI DSP processors. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:149-152 [Conf]
  221. Chen Liu, Mingde Dai, Xin-Yu Wu, Wai-Kai Chen
    A new algorithm for computing the overall network reliability. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:149-152 [Conf]
  222. Robert A. Soni, Kyle A. Gallivan, W. Kenneth Jenkins
    Rapid convergence in fault tolerant adaptive algorithms. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:150-153 [Conf]
  223. A. David, Tyseer Aboulnasr
    A maximum entropy Kalman filter for signal reconstruction. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:151-154 [Conf]
  224. Lizhong Sun, Thierry Lepley, Franck Nozahic, Amaud Bellissant, Tad A. Kwasniewski, Bany Heim
    Reduced complexity, high performance digital delta-sigma modulator for fractional-N frequency synthesis. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:152-155 [Conf]
  225. Kavita Nair, Ramesh Harjani
    A telemetry and interface circuit for piezoelectric sensors. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:152-155 [Conf]
  226. Hiroshi Tamura, Masakazu Sengoku, Keisuke Nakano, Shoji Shinoda
    Graph theoretic or computational geometric research of cellular mobile communications. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:153-156 [Conf]
  227. Jie Chen, K. J. Ray Liu
    Cost-effective low-power architectures of video coding systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:153-156 [Conf]
  228. K. Mayyas, Tyseer Aboulnasr, Taisir Eldos
    A study of the robustness of the M-Max NLMS adaptive algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:154-157 [Conf]
  229. Wolfgang Niehsen
    A stochastic model for correlated signal sources based on higher-order statistics. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:155-158 [Conf]
  230. Phanumas Khumsat, A. J. Payne
    Low-noise, low-distortion Gilbert current gain-cell and Gilbert cell transconductor. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:156-159 [Conf]
  231. Zheng Li, Kiyoharu Aizawa, Mitsutoshi Hatori
    Implementation of a 2D motion vector detection on image sensor focal plane. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:156-159 [Conf]
  232. Hongfang Liu, D. Frank Hsu, S. Horiguchi
    Generalized shuffle-exchange digraphs: Hamiltonian properties. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:157-160 [Conf]
  233. Mladen Berekovic, K. Jacob, Peter Pirsch
    Architecture of a hardware module for MPEG-4 shape decoding. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:157-160 [Conf]
  234. Masahiro Fukumoto, Hajime Kubota, Shigeo Tsujii
    Simplification of stochastic fastest NLMS algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:158-161 [Conf]
  235. Teresa Serrano-Gotarredona, Andreas G. Andreou, Bernabé Linares-Barranco
    Programmable 2D image filter for AER vision processing. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:159-162 [Conf]
  236. R. Ahola, Kari Stadius, Kari Halonen
    Design of a fully integrated 2 GHz CMOS frequency synthesizer. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:160-163 [Conf]
  237. M. Engels, Bernhard Hoppe, Hermann Meuth, R. Peters
    A single chip 200 MHz digital correlation system for laser spectroscopy with 512 correlation channels. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:160-163 [Conf]
  238. Krishnaiyan Thulasiraman, Anindya Das, Kaiyuan Huang, Vinod K. Agarwal
    Correct diagnosis of almost all faulty units in a multiprocessor system. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:161-164 [Conf]
  239. C.-C. Wang, C. J. Huang, P.-M. Lee
    A comparison of two alternative architectures of digital ratioed compressor design for inner product processing. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:161-164 [Conf]
  240. Ting Wai Siu, Sze Fong Yau, Wai Kuen Lai
    An adaptive projection pursuit filter for separating stationary interferences from nonstationary signals. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:162-165 [Conf]
  241. E. F. Sagiroglu
    Localization of wide-band signals via extended Kalman filter. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:163-166 [Conf]
  242. Meng Tong Tan, Joseph Sylvester Chang, Yit Chow Tong
    A novel self-tuning pulse width modulator based on master-slave architecture for a Class D amplifier. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:164-167 [Conf]
  243. Eui-Jung Yun, Hyun-Joon Jin, Nho-Kyung Park
    Development of the hydrogen gas sensor for the nondestructive test evaluation (NDE) application. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:164-167 [Conf]
  244. T. Yamada, S. Imai, S. Ueno
    On VLSI decompositions for deBruijn graphs. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:165-169 [Conf]
  245. R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
    Power implications of precision limited arithmetic in floating point FIR filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:165-168 [Conf]
  246. M. H. Costa, José Carlos M. Bermudez, Neil J. Bershad
    Statistical analysis of the FXLMS algorithm with a nonlinearity in the secondary-path. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:166-169 [Conf]
  247. S. Mandayam, R. P. Ramachandran
    An invariance transformation technique for interpreting images obtained from unknown operational conditions. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:167-170 [Conf]
  248. P. Costa, Carlo Fiocchi, Umberto Gatti, Franco Maloberti
    High-performance BiCMOS output buffer design strategies. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:168-171 [Conf]
  249. Yu-Chuan Shih, Chung-Yu Wu
    The design of high-performance 128×128 CMOS image sensors using new current-readout techniques. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:168-171 [Conf]
  250. Gustavo R. Alves, T. Amaral, José M. M. Ferreira
    Board-level prototype validation: a built-in controller and extended BST architecture. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:169-172 [Conf]
  251. Wai-Kei Mak, D. F. Wong
    A fast hypergraph minimum cut algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:170-173 [Conf]
  252. K. T. Wong
    Geolocation for partially polarized electromagnetic sources using multiple sparsely and uniformly spaced "spatially stretched vector sensors". [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:170-174 [Conf]
  253. Ahmet Kemal Özdemir, Orhan Arikan
    Efficient computation of the ambiguity function and the Wigner distribution on arbitrary line segments. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:171-174 [Conf]
  254. S. A. Chickamenahalli, S. Mahadevan, V. Nallaperumal
    A three-phase TMS320C30 DSP based resonant-commutated converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:172-175 [Conf]
  255. Alexandre Schmid, D. Bowler, R. Baumgartner, Yusuf Leblebici
    A novel analog-digital flash converter architecture based on capacitive threshold gates. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:172-175 [Conf]
  256. Shyue-Kung Lu, Cheng-Wen Wu
    A novel approach to testing LUT-based FPGAs. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:173-177 [Conf]
  257. Kengo R. Azegami, Atsushi Takahashi, Y. Kajitan
    Enumerating the min-cuts for applications to graph extraction under size constraints. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:174-177 [Conf]
  258. Soo-Chang Pei, Peng-Hua Wang
    Analytical design of digital nonrecursive maximally flat fractional Hilbert transformer. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:175-178 [Conf]
  259. S. C. Matz, R. J. P. de Figueiredo
    A nonlinear technique for image contrast enhancement and sharpening. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:175-178 [Conf]
  260. Lizhong Sun, Tad A. Kwasniewski, K. Iniewski
    A quadrature output voltage controlled ring oscillator based on three-stage sub-feedback loops. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:176-179 [Conf]
  261. D. Shmilovitz, Dariusz Czarkowski, Zivan Zabar
    Simple criteria to evaluate converter dynamics suitability for operation in active power factor correction systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:176-179 [Conf]
  262. Bin Zhang, K. J. Chen, Ruan Gang, Richard M. M. Chen
    A novel RTD-HEMT-RTD structure based on simulations. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:178-181 [Conf]
  263. M. Sarrafzadeh, T. Takahashi
    A fast algorithm for routability testing. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:178-181 [Conf]
  264. Mei-Yin Shen, Jongwon Kim, C. C. Jay Kuo
    Fast compression artifact reduction technique based on nonlinear filtering. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:179-182 [Conf]
  265. Soo-Chang Pei, Min-Hung Yeh
    Discrete fractional Hadamard transform. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:179-182 [Conf]
  266. L. A. MacEachern, Eyad Abou-Allam, L. Wang, Tajinder Manku
    Low voltage mixer biasing using monolithic integrated transformer dc-coupling. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:180-183 [Conf]
  267. S.-S. Qiu, Igor M. Filanovsky
    Harmonic analysis of PWM switching power converter state variable in steady-state operation. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:180-183 [Conf]
  268. M. Fedeli, C. Vacchi
    A receiver for stardard IEEE 1596-1992 scalable coherent interface. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:182-185 [Conf]
  269. Guoliang Xue, Guo-Hui Lin, Ding-Zhu Du
    Grade of service Euclidean Steiner minimum trees. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:182-185 [Conf]
  270. Marius Tico, Pauli Kuosmanen
    A multiresolution method for singular points detection in fingerprint images. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:183-186 [Conf]
  271. Holger Boche
    On the input output behavior of the Hilbert transform. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:183-186 [Conf]
  272. D. Python, Christian C. Enz
    An antialiasing filter using complementary MOS transconductors biased in the triode region. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:184-187 [Conf]
  273. C. M. Wu, W. H. Lau, H. Chung
    Generic analytical solution for calculating the harmonic characteristics of multilevel sinusoidal PWM inverter. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:184-187 [Conf]
  274. John P. Fishburn
    Optimization-based calibration of a static timing analyzer to path delay measurements. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:186-189 [Conf]
  275. P. J. Amantia, M. J. Kane, E. A. Kimball, S. L. Garverick
    A mixed-signal IC for a semi-implantable hearing aid. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:186-189 [Conf]
  276. Hsiang-Feng Chi
    A high-speed RSD adaptive filter architecture with a fast carry-free SPT converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:187-190 [Conf]
  277. Timothy P. Donovan, Nelson L. Passos
    Fine tuning the GALE edge detection method. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:187-190 [Conf]
  278. B. K. H. Wong, H. S. H. Chung
    Modular graphing technique for small-signal low-frequency characterizations of PWM DC/DC regulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:188-191 [Conf]
  279. E. W. Justh, F. J. Kub
    Analog CMOS high-frequency continuous wavelet transform circuit. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:188-191 [Conf]
  280. Yehea I. Ismail, Eby G. Friedman, José Luis Neves
    Signal waveform characterization in RLC trees. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:190-193 [Conf]
  281. E. Andre, G. Martel, P. Senn
    Digital I/Q demodulation and digital filtering for a DAB receiver. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:190-193 [Conf]
  282. Luxi Yang, Ziyi Lu, Zhenya He, J. Cheung
    Blind source separation from hybrid mixture based on nonlinear InfoMax approach. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:191-194 [Conf]
  283. Yu-Jie Yang, Wen-Nung Lie
    Sort-scan predictive vector quantization on multispectral satellite images. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:191-194 [Conf]
  284. Omid Oliaei
    Clock jitter noise spectra in continuous-time delta-sigma modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:192-195 [Conf]
  285. A. Garg, D. J. Perreault, George C. Verghese
    Feedback control of paralleled symmetric systems, with applications to nonlinear dynamics of paralleled power converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:192-197 [Conf]
  286. Mark Clements, Kasin Vichienchom, Wentai Liu, C. Hughes, E. McGucken, C. DeMarco, J. Mueller, Mark S. Humayun, E. De Juan, James D. Weiland, R. Greenberg
    An implantable power and data receiver and neuro-stimulus chip for a retinal prosthesis system. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:194-197 [Conf]
  287. Jinghong Chen, Sung-Mo Kang
    A mixed frequency-time approach for quasi-periodic steady-state simulation of multi-level modeled circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:194-197 [Conf]
  288. Hsiang-Feng Chi, Shawn X. Gao, Sigfrid D. Soli
    A novel approach of adaptive feedback cancellation for hearing aids. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:195-198 [Conf]
  289. Vladimir Katkovnik, Hakan Öktem, Karen Egiazarian
    Filtering heavy noised images using ICI rule for adaptive varying bandwidth selection. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:195-198 [Conf]
  290. Giovanni Palmisano, Salvatore Pennisi
    A 20-dB CMOS IF amplifier with embedded single-to-differential input converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:196-199 [Conf]
  291. M. Perakis, A. E. Tzimas, E. G. Metaxakis, Dimitrios Soudris, G. A. Kalivas, C. Katis, Chrissavgi Dre, Constantinos E. Goutis, Adonios Thanailakis, Thanos Stouraitis
    The VLSI implementation of a baseband receiver for DECT-based portable applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:198-201 [Conf]
  292. Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos
    An analytical, transistor-level energy model for SRAM-based caches. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:198-201 [Conf]
  293. C. M. Wu, W. H. Lau, H. Chung
    A five-level neutral-point-clamped H-bridge PWM inverter with superior harmonics suppression: a theoretical analysis. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:198-201 [Conf]
  294. R. Esteller, George J. Vachtsevanos, J. R. Echauz, B. Lilt
    A comparison of fractal dimension algorithms using synthetic and experimental data. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:199-202 [Conf]
  295. R. Agarwal, J. Gotman
    Adaptive segmentation of electroencephalographic data using a nonlinear energy operator. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:199-202 [Conf]
  296. Alberto Yufera, Adoración Rueda
    Programmable low-voltage continuous-time filter for audio applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:200-203 [Conf]
  297. Juha Häkkinen, Timo Rahkonen, Juha Kostamovaara
    A frequency hopping synthesizer IC for IF and RF applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:202-205 [Conf]
  298. H. S. H. Chung, W. C. Chow
    Development of switched-capacitor-based DC/DC converter with bi-directional power flow. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:202-205 [Conf]
  299. S. Pavan, Yannis P. Tsividis, K. Nagaraj
    Modeling of accumulation MOS capacitors for analog design in digital VLSI processes. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:202-205 [Conf]
  300. T. Enomoto, Y. Sasajima, A. Hirobe, T. Ohsawa
    Fast motion estimation algorithm and low-power CMOS motion estimation array LSI for MPEG-2 encoding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:203-206 [Conf]
  301. Marcel Joho, Heinz Mathis, George S. Moschytz
    An FFT-based algorithm for multichannel blind deconvolution. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:203-206 [Conf]
  302. Arie van Staveren, T. H. A. J. Cordenier, F. C. M. Kuijstermans, P. van der Kloet, F. L. Neerhoff, Chris J. M. Verhoeven, Arthur H. M. van Roermund
    The linear time-varying approach applied to the design of a negative-feedback class-B output amplifier. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:204-207 [Conf]
  303. Gerard Olivar, Enric Fossas, C. Batlle
    Non-smooth continuation of periodic orbits in a chaotic buck converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:206-209 [Conf]
  304. E. Gondro, P. Klein, F. Schuler
    An analytical source-and-drain series resistance model of quarter micron MOSFETs and its influence on circuit simulation. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:206-209 [Conf]
  305. E. Westesson, Lars Sundström
    A complex polynomial predistorter chip in CMOS for baseband or IF linearization of RF power amplifiers. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:206-209 [Conf]
  306. Yasuyuki Nakajima, Akio Yoneyama, Masaru Sugano, Hiromasa Yanagihara
    A fast motion estimation algorithm for MPEG2 video using ripple-shaped search. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:207-210 [Conf]
  307. K. T. Wong
    A novel closed-form azimuth/elevation angle and polarization estimation technique using only electric dipole triads or only magnetic loop triads with arbitrary unknown spacings. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:207-210 [Conf]
  308. Martin Lantz, Henrik Floberg
    Bipolar, wideband, bias current source. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:208-211 [Conf]
  309. H. S. H. Chung
    Development of DC/DC regulators based on switched-capacitor circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:210-213 [Conf]
  310. Wuping Chen, Hongwei Duan, S. H. Jones
    Integrated 1.2 um CMOS photodiodes, transimpedance amplifier, 12 bits A/D converter, and DSP interface for microinstrument applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:210-213 [Conf]
  311. Sang Won Song, M. Ismail, Gyu Moon, Dong Yong Kim
    Accurate modeling of simultaneous switching noise in low voltage digital VLSI. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:210-213 [Conf]
  312. Seung Hwan Kim, Dong-Il Chang, Choong Woong Lee, Sang Uk Lee
    Complexity reduction method for overlapped block motion compensation based on spatio-temporal correlation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:211-214 [Conf]
  313. T. Y. Al-Naffouri, Azzedine Zerguine, M. Bettayeb
    Convergence properties of mixed-norm algorithms under general error criteria. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:211-214 [Conf]
  314. Carlo Fiocchi, Umberto Gatti
    A very flexible BiCMOS low-voltage high-performance source follower. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:212-215 [Conf]
  315. Chang-Ki Kwon, Kwyro Lee
    A low-power minimum distance 1D-search engine using hybrid digital/analog circuit techniques. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:214-217 [Conf]
  316. Ichirou Oota, Noriaki Hara, Fumio Ueno
    Influence of parasitic inductance on serial fixed type switched-capacitor transformer. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:214-217 [Conf]
  317. Yi-Kan Cheng, Sung-Mo Kang
    Temperature-driven power and timing analysis for CMOS ULSI circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:214-217 [Conf]
  318. Chung J. Kuo, Chia H. Yeh, Souheil F. Odeh
    Polynomial search algorithms for motion estimation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:215-218 [Conf]
  319. Paolo Campolucci, A. Migliaccio, Francesco Piazza
    Intrinsically stable adaptive recursive filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:215-218 [Conf]
  320. R. Ganti, L. R. Carley, B. A. Myers
    A low distortion high frequency transconductor structure. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:216-219 [Conf]
  321. Anil Samavedam, Kartikeya Mayaram, Terri S. Fiez
    Design-oriented substrate noise coupling macromodels for heavily doped CMOS processes. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:218-221 [Conf]
  322. W. H. Lau, H. S. H. Chung, C. M. Wu, N. K. Poon
    Design and analysis of digital audio amplifier using ZVS PWM converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:218-221 [Conf]
  323. J. C. Bernier, G. D. Croft, W. R. Young
    A process independent ESD design methodology. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:218-221 [Conf]
  324. Vasily G. Moshnyaga
    A new architecture for computationally adaptive full-search block-matching motion estimation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:219-222 [Conf]
  325. Yuexian Zou, Shing-Chow Chan, Tung-Sang Ng
    Transform domain adaptive Volterra filter algorithm based on constrained optimization. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:219-222 [Conf]
  326. S. Kumar, A. Govil, A. Bhattacharyya, D. Dutta
    A wide-range tunable bandpass filter cum sinusoidal oscillator using a new current-controlled resistor. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:220-223 [Conf]
  327. Massimo Conti, Paolo Crippa, Simone Orcioni, Claudio Turchetti
    Statistical modeling of MOS transistor mismatch based on the parameters' autocorrelation function. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:222-225 [Conf]
  328. Lap-Pui Chau, Nam Ling, Gunnar Hovden, Hui Lan, Hon-Cheong Ng, Keng-Pang Lim
    A real-time realization of MPEG-4 video decoder. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:222-225 [Conf]
  329. H. Wei, I. Batarseh
    A single-stage power factor correction converter with soft-switching operation. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:222-225 [Conf]
  330. H. A. Hasan, J. A. K. Hasan
    Fast algorithms for signal subspace estimation with applications to DOA estimation. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:223-226 [Conf]
  331. Lorenzo Favalli, Alessandro Mecocci
    Improving rate and quality in MPEG 2 sequences using global motion information. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:223-226 [Conf]
  332. S. Vlassis, S. Siskos
    High speed and high resolution WTA circuit. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:224-227 [Conf]
  333. Seung-Moon Yoo, Sung-Mo Kang
    CMOS Pass-gate No-race Charge-recycling Logic (CPNCL). [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:226-229 [Conf]
  334. J. H. Wang
    Event-overlapping processing in current waveform simulation. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:226-229 [Conf]
  335. H. Wei, G. Zhu, I. Batarseh, C. Iannello, P. Kornetzky
    Single-stage single-switch AC-DC power factor correction converter with low output voltage (3.3 V). [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:226-229 [Conf]
  336. X. Q. Gao, C. J. Duanmu, C. R. Zou, Z. Y. He
    Multi-level successive elimination algorithm for motion estimation in video coding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:227-230 [Conf]
  337. M. Okamoto, Y. Nishikawa, T. Furukawa
    The performance of simplified CGM-BOPA in noisy environment [adaptive processing]. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:227-230 [Conf]
  338. Todd Hinck, Z. Yang, Q. Zhang, Allyn E. Hubbard
    A current-mode implementation of a traveling wave amplifier model similar to the cochlea. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:228-231 [Conf]
  339. A. M. Fahim, Mohamed I. Elmasry
    A Low-Voltage High-Performance Differential Static Logic (LVDSL) family. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:230-233 [Conf]
  340. Massimo De Santo, Nicola Femia, Giovanni Spagnuolo, F. Arcelli
    A novel software architecture for computer-aided analysis of circuits with uncertain parameters. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:230-233 [Conf]
  341. T. Myono, E. Nishibe, S. Kikuchi, K. Iwatsu, T. Suzuki, Y. Sasaki, K. Itoh, H. Kobayashi
    Modeling and parameter extraction technique for high-voltage MOS device. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:230-233 [Conf]
  342. M. Mimura, T. Fukukawa
    A nonlinear equalizer based on estimation of RBF's centers. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:231-234 [Conf]
  343. Alexis M. Tourapis, Oscar C. Au
    Fast motion estimation using modified circular zonal search. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:231-234 [Conf]
  344. R. Kalim, D. M. Wilson
    Semi-parallel rank-order filtering in analog VLSI. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:232-235 [Conf]
  345. Alexander Chatzigeorgiou, Spiridon Nikolaidis, Ioannis Tsoukalas, Odysseas G. Koufopavlou
    CMOS gate modeling based on equivalent inverter. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:234-237 [Conf]
  346. Abdoul Rjoub, Odysseas G. Koufopavlou
    Low voltage swing gates for low power consumption. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:234-237 [Conf]
  347. G. Zhu, H. Wei, I. Batarseh, Adrian Ioinovici
    A new switched-capacitor dc-dc converter with improved line and load regulations. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:234-237 [Conf]
  348. Y. Kitaoka, T. Furukawa, K. Urahama
    Blind identification of second-order statistics using periodic Toeplitz system. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:235-238 [Conf]
  349. William E. Lynch, V. Papadakis, R. Krishnamurthy, Tho Le-Ngoc
    Syntax and discontinuity based error concealment. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:235-238 [Conf]
  350. Bradley A. Minch, Paul E. Hasler, Chris Diorio
    Synthesis of multiple-input translinear element networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:236-239 [Conf]
  351. R. Lowther
    Compact modeling of interconnect and substrate coupling at GHz frequencies. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:238-241 [Conf]
  352. Enric Vidal-Idiarte, Luis Martinez-Salamero, H. Valderrama, Francesc Guinjoan
    Hinfty control of DC-to-DC switching converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:238-241 [Conf]
  353. Hongchin Lin, Kai-Hsun Chang, Shyh-Chyi Wong
    Novel high positive and negative pumping circuits for low supply voltage. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:238-241 [Conf]
  354. Yon Jun Chung, Young-Gook Kim, Jongwon Kim, C. C. Jay Kuo
    Receiver-based congestion control mechanism for Internet video transmission. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:239-242 [Conf]
  355. Qingwen Zhang, J. R. Roman, D. W. Davis, Wasfy B. Mikhael
    Modeling performance of the two dimensional frequency domain least squares algorithm in airborne surveillance radar applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:239-242 [Conf]
  356. Alberto Pesavento, Christof Koch
    A wide linear range four quadrant multiplier in subthreshold CMOS. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:240-243 [Conf]
  357. Radu M. Secareanu, Eby G. Friedman, Juan Becerra, Scott Warner
    A universal CMOS voltage interface circuit. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:242-245 [Conf]
  358. Pavan K. Gunupudi, Michel S. Nakhla, Ramachandra Achar
    Multi-point multi-port reduction of high-speed distributed interconnects using Krylov-space techniques. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:242-245 [Conf]
  359. Domingo Biel, E. Fossas, Francesc Guinjoan, R. Ramos
    Sliding mode control of a boost-buck converter for AC signal tracking task. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:242-245 [Conf]
  360. M. A. Hasan, A. A. Hasan
    Signal subspace approximation with applications to system identification. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:243-246 [Conf]
  361. Jeongnam Youn, Ming-Ting Sun
    A fast motion vector composition method for temporal transcoding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:243-246 [Conf]
  362. M. Dominguez, L. Castaner
    Bounding of thermal Sigma-Delta modulators output for sensors. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:244-247 [Conf]
  363. Chingwei Yeh, Min-Cheng Chang, Shih-Chieh Chang, Wen-Ben Jone
    Power reduction through iterative gate sizing and voltage scaling. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:246-249 [Conf]
  364. Marian K. Kazimierczuk, A. J. Edstrom
    DC and AC analysis of buck PWM DC-DC converter with peak-voltage-modulation feedforward control. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:246-249 [Conf]
  365. Zhong-Fang Jin, J.-J. Laurin, Yvon Savaria, P. Garon
    A new approach to analyze interconnect delays in RC wire models. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:246-249 [Conf]
  366. Y. J. Park, B. C. Ihm, D. J. Park
    Reduction of errors in blind identification of FIR systems under order overestimation. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:247-250 [Conf]
  367. Hisashi Inoue, Akio Miyazaki, T. Araki, Takashi Katsura
    A digital watermark method using the wavelet transform for video data. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:247-250 [Conf]
  368. P. K. Chan, L. S. Ng, L. Siek, M. S. Tse, J. Y. Ong, K. S. Lok
    Bulk compensated CMOS squaring circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:248-251 [Conf]
  369. Wen-Tsong Shiue, Chaitali Chakrabarti
    Memory exploration for low power embedded systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:250-253 [Conf]
  370. Ninglong Lu, Ibrahim N. Hajj
    A reduced-order scheme for coupled lumped-distributed interconnect simulation. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:250-253 [Conf]
  371. Marian K. Kazimierczuk, A. Massarini, M. A. Izadi
    Feedforward control with reference voltage modulation. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:250-253 [Conf]
  372. S. G. Sankaran, A. A. Beex
    Convergence analysis results for the class of affine projection algorithms. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:251-254 [Conf]
  373. Hani Sorial, William E. Lynch, André Vincent
    Joint transcoding of multiple MPEG video bitstreams. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:251-254 [Conf]
  374. Bo Shi, Lars Sundström
    Design and implementation of a CMOS power feedback linearization IC for RF power amplifiers. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:252-255 [Conf]
  375. Ching-Rong Chang, Jinn-Shyan Wang
    A new high-speed/low-power dynamic CMOS logic and its application to the design of an AOI-type ROM. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:254-257 [Conf]
  376. Yefim Berkovich, Adrian Ioinovici
    Dynamic model of PWM zero-voltage-transition DC-DC boost converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:254-257 [Conf]
  377. Fenghao Mu, Christer Svensson
    Methodology of layout based schematic and its usage in efficient high performance CMOS design. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:254-257 [Conf]
  378. Thomas P. Costello, Wasfy B. Mikhael
    Adaptively-fit, space-variant point spread function model for a spherical lens optical system. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:255-258 [Conf]
  379. Warnakulasuriya Anil Chandana Fernando, Cedric Nishan Canagarajah, David R. Bull
    Automatic detection of fade-in and fade-out in video sequences. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:255-258 [Conf]
  380. Wei-Shinn Wey, Yu-Chung Huang
    A CMOS RMS-to-DC converter using $\Sigma\Delta$ multiplier-divider. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:256-258 [Conf]
  381. Haksu Kim, Dian Zhou
    An automatic clock tree design system for high-speed VLSI designs: planar clock routing with the treatment of obstacles. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:258-261 [Conf]
  382. G. Zhu, H. Wei, C. Iannello, I. Batarseh
    Large-signal simulation of a distributed power supply system with power factor correction. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:258-261 [Conf]
  383. P. Palojarvi, T. Ruotsalainen, Juha Kostamovaara
    A new approach to avoid walk error in pulsed laser rangefinding. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:258-261 [Conf]
  384. W. Xiong, J. Li, Richard M. M. Chen, S. Qian
    A fast decomposition of banded symmetric Toeplitz matrices for parallel processing. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:259-262 [Conf]
  385. Oscar C. Au, Ming Sun Fu, Peter H. W. Wong, Justy W. C. Wong, Zihua Guo
    Hybrid inverse halftoning using adaptive filtering. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:259-262 [Conf]
  386. Abdelouahab Djemouai, Mohamad Sawan, Mustapha Slamani
    An efficient RF power transfer and bidirectional data transmission to implantable electronic devices. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:259-262 [Conf]
  387. M. Kaneko
    Analysis and suppression of unnecessary transitions in weakly complementary MOS logic networks for low power. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:262-265 [Conf]
  388. Mario di Bernardo, A. R. Champneys, Chris J. Budd, Francesco Vasca
    Sliding orbits and double spiral bifurcation diagrams in power electronic DC/DC converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:262-265 [Conf]
  389. D. Stroobannt
    PIN count prediction in ratio cut partitioning for VLSI and ULSI. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:262-265 [Conf]
  390. Yuk-Hee Chan, H. T. Kwong, K. T. Lo, C. K. Li
    An error diffusion technique with reduced directional hysteresis. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:263-266 [Conf]
  391. W.-S. Lu
    Design of nonlinear-phase FIR digital filters: a semidefinite programming approach. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:263-266 [Conf]
  392. Khaled Hayatleh, W. J. Su, F. J. Lidgey
    Improved current-feedback op-amp with good DC and CMRR performance. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:263-266 [Conf]
  393. Herbert H. C. Iu, C. K. Tse
    A study of synchronization in chaotic autonomous Cuk converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:266-269 [Conf]
  394. R. Sheen, S. Wang, Oscal T.-C. Chen, Ruey-Liang Ma
    Power consumption of a 2's complement adder minimized by effective dynamic data ranges. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:266-269 [Conf]
  395. T. Watanabe, H. Asai
    Efficient synthesis technique of time-domain models for interconnects having 3-D structures based on FDTD method. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:266-269 [Conf]
  396. Wei-Ping Zhu, M. Omair Ahmad, M. N. S. Swamy
    A new approach for weighted least-square design of FIR filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:267-270 [Conf]
  397. Ali Toker, Serdar Özoguz, Oguzhan Cicekoglu
    High output impedance current-mode multifunction filter using FTFNs. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:267-269 [Conf]
  398. R. E. Parker Jr., M. Tummala
    Modeling of layered video for low-bit-rate video conferencing applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:267-270 [Conf]
  399. G. Luckjiff, I. Dobson
    Power spectrum of a sigma-delta modulator with hexagonal vector quantization and constant input. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:270-273 [Conf]
  400. Hwang-Cherng Chow
    Bidirectional buffer for mixed voltage applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:270-273 [Conf]
  401. Erik Bruun
    On dynamic range limitations of CMOS current conveyors. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:270-273 [Conf]
  402. Yen-Tai Lai, Chi-Chou Kao, Wu-Chien Shieh
    A quadratic programming method for interconnection crosstalk minimization. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:270-273 [Conf]
  403. M. Schwarzenberg, M. Traber, M. Scholles, René Schüffny
    A VLSI chip for wavelet image compression. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:271-274 [Conf]
  404. Andrzej Tarczynski, G. D. Cain, E. Hermanowicz, M. Rojewski
    Stable IIR filters - a new design approach. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:271-274 [Conf]
  405. Edgar F. M. Albuquerque, Manuel M. Silva
    Current-balanced logic for mixed-signal IC's. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:274-277 [Conf]
  406. J. H. B. Deane
    From circuits to spectral peaks. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:274-277 [Conf]
  407. A. Hyogo, Y. Fukutomi, K. Sekine
    Low voltage four-quadrant analog multiplier using square-root circuit based on CMOS pair. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:274-277 [Conf]
  408. Yiqun Lin, R. Lomenick, R. Lowther, Wenhua Ni, W. Rafie-Hibner, O. Ruiz, J. Furino
    Interconnect model generation tool. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:274-277 [Conf]
  409. H. Fujishima, Y. Takemoto, T. Yoneda, Takao Onoye, Isao Shirakawa
    Hybrid media-processor core for natural and synthetic video decoding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:275-278 [Conf]
  410. Soontorn Oraintara, Truong Q. Nguyen
    A new method in FIR filter design. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:275-278 [Conf]
  411. A. Maxim, D. Andreu, M. Cousineau, J. Boucher
    A novel SPICE behavioral macromodel of operational amplifiers including a high accuracy description of frequency characteristics. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:278-281 [Conf]
  412. Ravindranath Naiknaware, Terri S. Fiez
    Switched-capacitor integrator design optimizing for power and process variations. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:278-281 [Conf]
  413. P. Mattavelli, Alex M. Stankovic
    Dynamical phasors in modeling and control of active filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:278-282 [Conf]
  414. Elvi Räisänen-Ruotsalainen, Timo Rahkonen, Juha Kostamovaara
    A BiCMOS time-to-digital converter with 30 ps resolution. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:278-281 [Conf]
  415. Kibum Suh, Kyung Yuk Min, Kyeounsoo Kim, Jong-Seog Koh, Jong-Wha Chong
    A design of DPCM hybrid coding loop using single 1-D DCT in MPEG-2 video encoder. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:279-282 [Conf]
  416. Saed Samadi, Akinori Nishihara, H. Iwakura
    Generalized half-band maximally flat FIR filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:279-282 [Conf]
  417. Robert H. Caverly, N. Quinn
    A SPICE model for simulating the impedance-frequency characteristics of high frequency PIN switching diodes. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:282-285 [Conf]
  418. P. Simek, V. Musil
    An advanced S3I sigma-delta modulator with reduced distortion. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:282-285 [Conf]
  419. A. Tezel, T. Akin
    A low-power switched-current algorithmic A/D converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:282-285 [Conf]
  420. P. T. Krein
    Ripple correlation control, with some applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:283-286 [Conf]
  421. Soohwan Ong, Hyunjune Yoo, Myung Hoon Sunwoo
    A MDSP (multimedia DSP) chip for portable multimedia applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:283-286 [Conf]
  422. Soo-Chang Pei, Chien-Cheng Tseng
    FIR filter design based on total least squares error criterion. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:283-286 [Conf]
  423. Ecevit Yilmaz, Michael M. Green
    Some standard SPICE dc algorithms revisited: why does SPICE still not converge? [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:286-289 [Conf]
  424. George Theodoridis, S. Theoharis, Dimitrios Soudris, Thanos Stouraitis, Constantinos E. Goutis
    An efficient probabilistic method for logic circuits using real delay gate model. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:286-289 [Conf]
  425. Julius Georgiou, Emmanuel M. Drakakis, Christofer Toumazou, P. Premanoj
    An analogue micropower log-domain silicon circuit for the Hodgkin and Huxley nerve axon. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:286-289 [Conf]
  426. J. L. Rodriguez Marrero, R. Santos Bueno, G. C. Verghese
    Analysis and control of chaotic DC-DC switching power converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:287-292 [Conf]
  427. M. Shahkarami, Graham A. Jullien, William C. Miller
    Designing FIR filters with enhanced Fermat ALUs. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:287-290 [Conf]
  428. Friederich Mombers, Daniel Mlynek
    A multithreaded multimedia processor merging on-chip multiprocessors and distributed vector pipelines. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:287-290 [Conf]
  429. Yumin Zhang, Xiaobo Hu, Danny Z. Chen
    Low energy register allocation beyond basic blocks. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:290-293 [Conf]
  430. A. Dyes, E. Chan, H. Hofmann, W. Horia, L. Trajkovic
    Simple implementations of homotopy algorithms for finding DC solutions of nonlinear circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:290-293 [Conf]
  431. E. Fogleman, Ian Galton, Henrik T. Jensen
    A dynamic element matching technique for reduced-distortion multibit quantization in delta-sigma ADCs. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:290-293 [Conf]
  432. Håkan Johansson
    Multirate single-stage and multistage structures for high-speed recursive digital filtering. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:291-294 [Conf]
  433. Vasily G. Moshnyaga
    An MSB truncation scheme for low-power video processors. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:291-294 [Conf]
  434. S. Banerjee, D. Kastha, S. Das, G. Vivek, Celso Grebogi
    Robust chaos - the theoretical formulation and experimental evidence. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:293-296 [Conf]
  435. Zbigniew Galias
    Proving the existence of periodic solutions using global interval Newton method. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:294-297 [Conf]
  436. J. S. Shor, Vladimir Koifman, Yachin Afek
    Novel method to compensate for resistor non-linearities and its application to the integration of analog functions on system-on-a-chip ICs. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:294-297 [Conf]
  437. Chaeryung Park, Taewhan Park, C. L. Liu
    An efficient data path synthesis algorithm for behavioral-level power optimization. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:294-297 [Conf]
  438. A. Lee, Majid Ahmadi, Graham A. Jullien, R. S. Lashkan, William C. Miller
    Design of 1-D FIR filters with genetic algorithms. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:295-298 [Conf]
  439. A. Dinh, R. Mason, J. Toth
    High speed V.32 trellis encoder/decoder implementation using FPGA. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:295-298 [Conf]
  440. Y. H. Lim, D. C. Hamill
    Problems of computing Lyapunov exponents in power electronics. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:297-301 [Conf]
  441. Kei-Yong Khoo, Chao-Liang Chen, Alan N. Willson Jr.
    A CMOS pipelined carry-save array using true single-phase single-transistor-latch clocking. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:298-301 [Conf]
  442. Peter B. Aronhime, Zbigniew Lata, Jie Deng, Brent Maundy
    Effects of parasitic admittances in active synthesis of current-mode circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:298-301 [Conf]
  443. F. Bonani, Marco Gilli
    A harmonic balance approach to bifurcation analysis of limit cycles. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:298-301 [Conf]
  444. Jun-Fu Shen, Liang-Gee Chen, Hao-Chieh Chang, Tu-Chih Wang
    Low power full-search block-matching motion estimation chip for H.263+. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:299-302 [Conf]
  445. Håkan Johansson, Tapio Saramäki
    A class of complementary IIR filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:299-302 [Conf]
  446. Lidia Daldoss, P. Gubian, Michele Quarantelli
    Transient sensitivity computation in circuit simulation. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:302-305 [Conf]
  447. John M. Emmert, Dinesh Bhatia
    Fast timing driven placement using tabu search. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:302-305 [Conf]
  448. Teresa Serrano-Gotarredona, Bernabé Linares-Barranco, Andreas G. Andreou
    A general subthreshold MOS translinear theorem. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:302-305 [Conf]
  449. Leonid B. Goldgeisser, M. M. Green
    Some two-transistor circuits possess more than three operating points. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:302-305 [Conf]
  450. Masahiro Iwahashi, Narong Buabthong, Somchart Chokchaitam, Noriyoshi Kambayashi
    Lossless multi channel predictive coding for images. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:303-306 [Conf]
  451. Sergio L. Netto, Paulo S. R. Diniz
    On WLS-Chebyshev IIR digital filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:303-306 [Conf]
  452. Antonio J. López-Martín, Alfonso Carlosena
    A systematic approach to the synthesis of square-root domain systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:306-309 [Conf]
  453. M. A. Al-Saleh, M. Mir
    A modified univariate search algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:306-309 [Conf]
  454. Wai-Kwong Lee, Chi-Ying Tsui
    Finite state machine partitioning for low power. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:306-309 [Conf]
  455. Zihua Guo, Oscar C. Au
    Map automatic input based on NN and GAs. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:306-309 [Conf]
  456. Hwangjun Song, Jongwon Kim, C. C. Jay Kuo
    Real-time H.263+ frame rate control for low bit rate VBR video. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:307-310 [Conf]
  457. K. Uesaka, M. Kawamata
    Synthesis of low coefficient sensitivity digital filters using genetic programming. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:307-310 [Conf]
  458. Pier Paolo Civalleri, Marco Gilli
    Analysis of nonlinear dynamic arrays, through spatial mode decomposition. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:310-313 [Conf]
  459. L. A. MacEachern
    Constrained circuit optimization via library table genetic algorithms. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:310-313 [Conf]
  460. Chingwei Yeh, Yin-Shuin Kang
    A simulated annealing based method supporting dual supply voltages in standard cell placement. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:310-313 [Conf]
  461. Hsin-Shu Chen, A. Ito
    Characterization of 1/f noise vs. number of gate stripes in MOS transistors. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:310-313 [Conf]
  462. Chia-Wen Lin, E. Fei, Yung-Chang Chen
    Rate-distortion constrained quadtree segmentation for stereoscopic video coding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:311-314 [Conf]
  463. Khaled H. Moustafa, Mohamed I. Sobhy
    Lumped/distributed single-pulse matched filter for radar applications based on wave digital filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:311-314 [Conf]
  464. L. Weiss, Wolfgang Mathis
    Noise equivalent circuit for nonlinear resistors. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:314-317 [Conf]
  465. Radu M. Secareanu, Eby G. Friedman
    A high precision CMOS current mirror/divider. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:314-317 [Conf]
  466. A. El-Aboudi, El Mostapha Aboulhamid
    An algorithm for the verification of timing diagrams realizability. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:314-317 [Conf]
  467. Yaser M. A. Khalifa, David H. Horrocks
    Isomorphism elimination for the enhancement of genetically generated analog circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:314-317 [Conf]
  468. H. A. U. Khan, Mark J. T. Smith, Steven W. McLaughlin
    Trellis coded residual vector quantization with application to image coding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:315-318 [Conf]
  469. M. Price, Mark B. Sandler
    Investigation of a least squares method for high order filter synthesis. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:315-318 [Conf]
  470. G. J. Coram, J. L. Wyatt
    Poisson models for noisy nonlinear devices. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:318-321 [Conf]
  471. R. Brannen, Hassan O. Elwan, Mohammed Ismail
    A simple low-voltage all MOS linear-dB AGC/multiplier circuit. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:318-321 [Conf]
  472. Jer-Sheng Chen, P. Banerjee
    Parallel construction algorithms for BDDs. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:318-322 [Conf]
  473. N. Shinomiya, H. Watanabe
    Distributed meta-heuristic method for network optimization problems in information network. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:318-321 [Conf]
  474. M. Vucic, H. Babic
    IIR filters with maximum impulse response symmetry. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:319-322 [Conf]
  475. Yong He, Ishfaq Ahmad, M. L. Liou
    Dynamic scheduling of multiple video objects for MPEG-4 encoding with user interactions. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:319-322 [Conf]
  476. D. Frey
    On the equivalence of various methods for finding the periodic steady state solution of nonlinear networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:322-326 [Conf]
  477. Mikio Hasegawa, Tohru Ikeguchi, Kazuyuki Aihara
    A novel approach for combinatorial optimization problems using chaotic neurodynamics. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:322-325 [Conf]
  478. F. Kaess, R. Kanan, B. Hochet, Michel J. Declercq
    Performance/power tradeoffs in high-speed GaAs ADCs. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:322-325 [Conf]
  479. Lennart Harnefors, Johnny Holmberg, Svante Signell
    Suppression of overflow limit cycles in LDI allpass/lattice filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:323-326 [Conf]
  480. Veeru N. Ramaswamy, Kameswara Rao Namuduri, N. Ranganathan
    Context based lossless intraframe coding of video sequence using embedded zerotree wavelets. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:323-326 [Conf]
  481. Jinsung Park, J. A. Tabler, Martin A. Brooke, Nan M. Jokerst, D. Scott Wills
    Adaptive digital bias control for an optical receiver and transmitter. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:323-326 [Conf]
  482. Maitham Shams, Mohamed I. Elmasry
    A formulation for quick evaluation and optimization of digital CMOS circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:326-329 [Conf]
  483. Zhiliang Zheng, Un-Ku Moon, Jesper Steensgaard, Bo Wang, Gabor C. Temes
    Capacitor mismatch error cancellation technique for a successive approximation A/D converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:326-329 [Conf]
  484. J. J. Chang, Myunghee Lee, Sungyong Jung, Martin A. Brooke, Nan M. Jokerst, D. Scott Wills
    Fully differential current-input CMOS amplifier front-end suppressing mixed signal substrate noise for optoelectronic applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:327-330 [Conf]
  485. K. Konishi, H. Sugiyama, H. Kokame, K. Hirata
    Decentralized delayed-feedback control of a coupled ring map lattice. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:327-330 [Conf]
  486. Johnny Holmberg, Lennart Harnefors, Svante Signell
    A comparison of quantization noise levels of LDI and wave digital circulator allpass filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:327-330 [Conf]
  487. Dapeng Wu, Y. T. Hou, Wenwu Zhu, Ya-Qin Zhang, H. Jonathan Chao
    MPEG4 compressed video over the Internet. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:327-331 [Conf]
  488. Huawen Jin, E. K. F. Lee
    A digital technique for reducing clock jitter effects in time-interleaved A/D converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:330-333 [Conf]
  489. Wei Wang, M. N. S. Swamy, M. Omair Ahmad, Yuke Wang
    A high-speed residue-to-binary converter and a scheme for its VLSI implementation. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:330-333 [Conf]
  490. T. Yalcin, N. Ismailoglu
    Design of a fully-static differential low-power CMOS flip-flop. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:331-333 [Conf]
  491. F. Yuan, A. Opal
    Sensitivity analysis of periodically switched linear circuits using an adjoint network technique. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:331-334 [Conf]
  492. T. Hinamoto, S. Yokoyama
    A novel expression for L2 sensitivity evaluation in state-space digital filters and its minimization. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:331-334 [Conf]
  493. J. T. H. Chung-How, D. R. Bull
    Robust image and video coding with pyramid vector quantisation. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:332-335 [Conf]
  494. Mark Vesterbacka
    A robust differential scan flip-flop. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:334-337 [Conf]
  495. Rajamohana Hegde, Naresh R. Shanbhag
    Lower bounds on energy dissipation and noise-tolerance for deep submicron VLSI. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:334-337 [Conf]
  496. Alberto L. Sangiovanni-Vincentelli, Marco Re, Luciano Lavagno, Gian-Carlo Cardarilli, Roberto Lojacono
    Analysis of the quantization noise effects on the SQNR behaviour in analog to digital conversion. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:334-338 [Conf]
  497. Simone Fiori, Paola Baldassarri, Francesco Piazza
    An efficient architecture for independent component analysis. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:335-338 [Conf]
  498. W.-S. Lu
    Minimum-norm realization of 2D recursive filters: a quasiconvex programming approach. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:335-338 [Conf]
  499. Chularat Tanprasert, Sutat Sae-tang
    Thai type style recognition. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:336-339 [Conf]
  500. S. Hranilovic, D. A. Johns
    A multilevel modulation scheme for high-speed wireless infrared communications. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:338-341 [Conf]
  501. Esther Rodríguez-Villegas, Maria J. Avedillo, José M. Quintana, Gloria Huertas, Adoración Rueda
    vMOS-based sorters for multiplier implementations. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:338-341 [Conf]
  502. Yang Xiao, Rolf Unbehauen, Xiyu Du
    A finite test algorithm for 2D Schur polynomials based on complex Lyapunov equation. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:339-342 [Conf]
  503. Simone Fiori, Francesco Piazza
    Neural blind separation of complex sources by extended Hebbian learning (EGHA). [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:339-342 [Conf]
  504. D. Gardino, Franco Maloberti
    High resolution rail-to-rail ADC in CMOS digital technology. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:339-342 [Conf]
  505. Adnan M. Alattar, Ghassan Al-Regib
    Evaluation of selective encryption techniques for secure transmission of MPEG-compressed bit-streams. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:340-343 [Conf]
  506. Chi Wai Yung, Hung Fai Fu, Chi-Ying Tsui, Roger S. Cheng, D. George
    Unequal error protection for wireless transmission of MPEG audio. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:342-345 [Conf]
  507. Antonio J. López-Martín, Alfonso Carlosena
    Geometric-mean based current-mode CMOS multiplier/divider. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:342-345 [Conf]
  508. S. Summerfield, Zhongfeng Wang, Keshab K. Parhi
    Area-power-time efficient pipeline-interleaved architectures for wave digital filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:343-346 [Conf]
  509. B. E. Jonsson, Hannu Tenhunen
    A dual 3-V 32-MS/s CMOS switched-current ADC for telecommunication applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:343-346 [Conf]
  510. Mirko Solazzi, Aurelio Uncini, Elio D. Di Claudio, Raffaele Parisi
    Complex discriminative learning Bayesian neural equalizer. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:343-346 [Conf]
  511. Michael C. Doggett, Michael Meißner
    A memory addressing and access design for real time volume rendering. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:344-347 [Conf]
  512. V. Borich, J. East, G. Haddad
    A fixed-point harmonic balance approach for circuit simulation under modulated carrier excitation. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:346-349 [Conf]
  513. Pietro Andreani, Lars Sundström, N. Karlsson, M. Svensson
    A chip for linearization of RF power amplifiers using digital predistortion with a bit-parallel complex multiplier. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:346-349 [Conf]
  514. B. Mendil, Khier Benmahammed
    Simple activation functions for neural and fuzzy neural networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:347-350 [Conf]
  515. E. Fogleman, Ian Galton, Henrik T. Jensen
    An area-efficient differential input ADC with digital common mode rejection. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:347-350 [Conf]
  516. Jun Ma, Keshab K. Parhi, Ed F. Deprettere
    Derivation of parallel and pipelined orthogonal filter architectures via algorithm transformations. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:347-350 [Conf]
  517. Trevor Yensen, Marios Parperis, Rafik A. Goubran, Ioannis Lambadaris
    Echo target determination using acoustic round trip delay for voice over IP conferences. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:348-351 [Conf]
  518. Roman Genov, Gert Cauwenberghs
    16-channel single-chip current-mode track-and-hold acquisition system with 100 dB dynamic range. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:350-353 [Conf]
  519. Majid Sarrafzadeh, Salil Raje
    Scheduling with multiple voltages under resource constraints. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:350-353 [Conf]
  520. Tamal Bose, Guo-Fang Xu
    Stability of two-dimensional discrete systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:351-353 [Conf]
  521. Paolo Arena, Luigi Fortuna
    Autowaves in single layer CNNs. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:351-354 [Conf]
  522. B. E. Jonsson, Hannu Tenhunen
    A 3 V switched-current pipelined analog-to-digital converter in a 5 V CMOS process. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:351-354 [Conf]
  523. Anssi Huttunen, Irek Defée
    Performance of desktop software MPEG-2 TS decoder. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:352-355 [Conf]
  524. S. Nagavarapu, J. Yan, E. K. F. Lee, Randall L. Geiger
    An asynchronous data recovery/retransmission technique with foreground DLL calibration. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:354-357 [Conf]
  525. Ali Manzak, Chaitali Chakrabarti
    A low power scheduling scheme with resources operating at multiple voltages. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:354-357 [Conf]
  526. Fengqi Yu, Alan N. Willson Jr.
    Hardware efficient architectures for coupled-form IIR filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:355-358 [Conf]
  527. J. A. E. P. van Engelen, Rudy J. van de Plassche
    Stability and design of continuous-time bandpass sigma delta modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:355-359 [Conf]
  528. Ismail Salih, Stanley H. Smith, Derong Liu
    Design of bidirectional associative memories based on the perceptron training technique. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:355-358 [Conf]
  529. K. Palomaki, Jarkko Niittylahti, Markku Renfors
    Numerical sine and cosine synthesis using a complex multiplier. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:356-359 [Conf]
  530. Meghanad D. Wagh, Chien-In Henry Chen
    High-level design synthesis with redundancy removal for high speed testable adders. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:358-361 [Conf]
  531. Gangadhar Konduri, James Goodman, Anantha Chandrakasan
    Energy efficient software through dynamic voltage scheduling. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:358-361 [Conf]
  532. Ahmet T. Erdogan, Tughrul Arslan
    A coefficient segmentation algorithm for low power implementation of FIR filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:359-362 [Conf]
  533. Cesare Alippi
    Feedforward neural networks with improved insensitivity abilities. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:359-362 [Conf]
  534. Hassan Aboushady, E. de Lira Mendes, M. Dessouky, Patrick Loumeau
    A current-mode continuous-time Sigma-Delta modulator with delayed return-to-zero feedback. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:360-363 [Conf]
  535. Riku Uusikartano, Jarkko Nittylahti, Markku Renfors
    Area-optimized FPGA implementation of a digital FM modulator. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:360-362 [Conf]
  536. Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri
    A genetic approach to simultaneous parameter space exploration and constraint transformation in analog synthesis. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:362-365 [Conf]
  537. Gang Qu, Darko Kirovski, Miodrag Potkonjak, Mani B. Srivastava
    Energy minimization of system pipelines using multiple voltages. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:362-365 [Conf]
  538. Mitsuji Muneyasu, K. Asou, Y. Wada, Takao Hinamoto
    An edge-preserving fuzzy filter based on differences between pixels. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:363-366 [Conf]
  539. W. Rhee, A. Ali
    An on-chip phase compensation technique in fractional-N frequency synthesis. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:363-366 [Conf]
  540. Dengwei Fu, Alan N. Willson Jr.
    Design of an improved interpolation filter using a trigonometric polynomial. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:363-366 [Conf]
  541. Luis Hernández, Susanna Patón
    A continuous-time noise-shaping modulator for logarithmic A/D conversion. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:364-367 [Conf]
  542. Kaushik Roy, Liqiong Wei, Zhanping Chen
    Multiple-Vdd multiple-Vth CMOS (MVCMOS) for low power applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:366-370 [Conf]
  543. Akihisa Yamada, Koichi Nishida, Ryoji Sakurai, Andrew Kay, Toshio Nomura, Takashi Kambe
    Hardware synthesis with the Bach system. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:366-369 [Conf]
  544. Hiroomi Hikawa
    An efficient pulse mode multilayer neural network. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:367-370 [Conf]
  545. Xi Zhang, Toshinori Yoshikawa
    Design of symmetric orthonormal wavelet filters using a single complex allpass filter. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:367-370 [Conf]
  546. Stefano Rovetta, Rodolfo Zunino
    Analog vector quantization chip for flexible video compression systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:367-370 [Conf]
  547. Chi-Hung Lin, Chunlei Shi, Mohammed Ismail, Moon Gyu
    A 5 MHz Nyquist rate continuous-time sigma-delta modulator for wideband wireless communication. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:368-371 [Conf]
  548. J. O. Dedou, Daniel Chillet, Olivier Sentieys
    Behavioral synthesis of asynchronous systems: a methodology. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:370-373 [Conf]
  549. Benyong Zhang, P. Allen
    Feed-forward compensated high switching speed digital phase-locked loop frequency synthesizer. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:371-374 [Conf]
  550. J. Liu, M. Brooke
    Fully parallel on-chip learning hardware neural network for real-time control. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:371-374 [Conf]
  551. C. K. Goh, Y. C. Lim, R. Yang
    A weighted least squares algorithm for the design of lattice-type perfect reconstruction cosine modulated filter banks. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:371-374 [Conf]
  552. Ashok Kumar, Magdy A. Bayoumi
    Multiple voltage-based scheduling methodology for low power in the high level synthesis. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:371-374 [Conf]
  553. Tsung-Yuan Chang, Steven B. Bibyk
    Exact analysis of second order bandpass delta-sigma modulator with sinusoidal inputs. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:372-375 [Conf]
  554. Xiaowei Li, Paul Y. S. Cheung
    An approach to behavioral synthesis for loop-based BIST. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:374-377 [Conf]
  555. P. Acco, Michael Peter Kennedy, C. Mira, B. Morley, B. Frigyik
    Behavioral modeling of charge pump phase locked loops. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:375-378 [Conf]
  556. S. Ramachandran, S. Srinivasan, R. Chen
    EPLD-based architecture of real time 2D-discrete cosine transform and quantization for image compression. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:375-378 [Conf]
  557. Gunnar Gudnason, Erik Bruun, Morten Haugland
    An implantable mixed analog/digital neural stimulator circuit. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:375-378 [Conf]
  558. T. Sailer, G. Troster
    Performance-driven design of high speed receivers for wireless indoor networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:375-377 [Conf]
  559. G. Fischer, Deokhwan Hyun
    Limit cycles in single-stage delta-sigma modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:376-379 [Conf]
  560. Nikolaos D. Zervas, Kostas Masselos, Odysseas G. Koufopavlou, Constantinos E. Goutis
    Power exploration of multimedia applications realized on embedded cores. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:378-381 [Conf]
  561. Z. X. Shen, C. C. Jong
    A lower bound on general minimal resource interval scheduling with arbitrary component selection. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:378-381 [Conf]
  562. Hoda S. Abdel-Aty-Zohdy, Mahmoud Al-Nsour
    Reinforcement learning neural network circuits for electronic nose. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:379-382 [Conf]
  563. Chip-Hong Chang, Bogdan J. Falkowski
    Reed-Muller weight and literal vectors for NPN classification. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:379-382 [Conf]
  564. J. Living, Bashir M. Al-Hashimi
    New differential coefficient coding algorithm for recursive FIR filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:379-382 [Conf]
  565. Saman S. Abeysekera, Xue Yao, Zhuquan Zang
    A comparison of various low-pass filter architectures for sigma-delta demodulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:380-383 [Conf]
  566. M. B. Maaz, Magdy A. Bayoumi
    A non-zero clock skew scheduling algorithm for high speed clock distribution network. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:382-385 [Conf]
  567. L. Horvath, Imed Ben Dhaou, Hannu Tenhunen, Jouni Isoaho
    A novel, high-speed, reconfigurable demapper-symbol deinterleaver architecture for DVB-T. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:382-385 [Conf]
  568. Bogdan J. Falkowski, Chip-Hong Chang
    Optimization of partially-mixed-polarity Reed-Muller expansions. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:383-386 [Conf]
  569. Wu-Sheng Lu, Tian-Bo Deng
    An improved weighted least-squares design of FIR digital filters with variable fractional delay. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:383-386 [Conf]
  570. Spiridon Vlassis, Stilianos Siskos
    Analog CMOS four-quadrant multiplier and divider. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:383-386 [Conf]
  571. S. Brigati, F. Francesconi, Piero Malcovati, D. Tonietto, Andrea Baschirotto, Franco Maloberti
    Modeling sigma-delta modulator non-idealities in SIMULINK(R). [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:384-387 [Conf]
  572. Ali Shatnawi, M. Omair Ahmad, M. N. S. Swamy
    Scheduling of DSP data flow graphs onto multiprocessors for maximum throughput. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:386-389 [Conf]
  573. Hyung-Chuk Park, Seung-Hyuck Ahn, Young-Jin Kim, Chang-Ki Kwon, Kwyro Lee
    Implementation and performance analysis of programmable test beds for real-time wireless W-CDMA. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:386-389 [Conf]
  574. Paul E. Hasler, Jeff Dugger
    Correlation learning rule in floating-gate pFET synapses. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:387-390 [Conf]
  575. Wolfgang Günther, Rolf Drechsler
    Minimization of BDDs using linear transformations based on evolutionary techniques. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:387-390 [Conf]
  576. J. Singh, Andreas Antoniou, Dale J. Shpak
    A distributed memory and control architecture for 2D discrete wavelet transform. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:387-390 [Conf]
  577. Paul E. Hasler, Bradley A. Minch, Chris Diorio
    Floating-gate devices: they are not just for digital memories any more. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:388-391 [Conf]
  578. Jie Song, K. J. Ray Liu
    A data embedding scheme for H.263 compatible video coding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:390-393 [Conf]
  579. Ching-Han Tsai, Sung-Mo Kang
    Macrocell placement with temperature profile optimization. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:390-393 [Conf]
  580. Massimo Conti, Paolo Crippa, Simone Orcioni, Claudio Turchetti
    A current-mode circuit for fuzzy partition membership functions. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:391-394 [Conf]
  581. Malgorzata Chrzanowska-Jeske
    Regular symmetric arrays for non-symmetric functions. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:391-394 [Conf]
  582. S. Saab, Wu-Sheng Lu, Andreas Antoniou
    Design and implementation of low-power IIR digital filter systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:391-394 [Conf]
  583. A. Okada, T. Shibata
    A neuron-MOS parallel associator for high-speed CDMA matched filter. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:392-395 [Conf]
  584. Frank Schmiedle, Rolf Drechsler, Bernd Becker
    Exact channel routing using symbolic representation. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:394-397 [Conf]
  585. T. M. Almaida, Moisés S. Piedade
    High performance analog and digital PLL design. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:394-397 [Conf]
  586. Azhar Quddus, Moustafa M. Fahmy
    Detection of corners and smooth joins using wavelet transform. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:395-398 [Conf]
  587. B. Foruzandeh, Steven F. Quigley
    An analogue multilayer perceptron circuit with on-chip training. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:395-398 [Conf]
  588. A. Crews, F. Brewer
    Shape-based sequential machine analysis. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:395-399 [Conf]
  589. Yngvar Berg, Tor Sverre Lande
    Area efficient circuit tuning with floating-gate techniques. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:396-399 [Conf]
  590. Hao-Chieh Chang, Liang-Gee Chen, Yung-Chi Chang, Sheng-Chieh Huang
    A VLSI architecture design of VLC encoder for high data rate video/image coding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:398-401 [Conf]
  591. Paul Y. S. Cheung, S. K. Yeung, W. L. Ko
    A new optimization model for VLSI placement algorithms. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:398-403 [Conf]
  592. Miki Haseyama, Hideo Kitajima
    A filter-coefficient quantization method with genetic algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:399-402 [Conf]
  593. A. S. Elwakil, M. P. Kennedy
    Chaotic oscillator configuration using a frequency dependent negative resistor. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:399-402 [Conf]
  594. Bradley A. Minch, Paul E. Hasler
    A floating-gate technology for digital CMOS processes. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:400-403 [Conf]
  595. K. C. Chang, C. A. Lomasney
    Obsolete integrated circuit replacement methodology using advanced electronic design automation technology. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:400-403 [Conf]
  596. Arun Raghupathy, K. J. Ray Liu
    A transformation for computational latency reduction in turbo-MAP decoding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:402-405 [Conf]
  597. A. Thiemann, Kamal Premaratne, Peter H. Bauer
    Regions of global asymptotic stability in coefficient-space for linear time-variant discrete-time systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:403-406 [Conf]
  598. Gianluca Setti, Gianluca Mazzini, Riccardo Rovatti
    Upper and lower performance bounds for chaos-based asynchronous DS-CDMA systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:403-406 [Conf]
  599. Reid R. Harrison
    Floating gate current mirror for gain correction in CMOS translinear circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:404-407 [Conf]
  600. L. Ivanov, R. Nunna, S. Bloom
    Modeling and analysis of noniterated systems: an approach based upon series-parallel posets. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:404-406 [Conf]
  601. Yehea I. Ismail, Eby G. Friedman
    Repeater insertion in RLC lines for minimum propagation delay. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:404-407 [Conf]
  602. Arun Raghupathy, P. Hsu, K. J. Ray Liu, N. Chandrachoodan
    VLSI architecture and design for high performance adaptive video scaling. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:406-409 [Conf]
  603. Gábor Hosszú, Ferenc Kovács, L. Varga
    Design procedure based on VHDL language transformations. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:407-410 [Conf]
  604. D. Scholnik, J. O. Coleman
    Nonuniformly offset polyphase synthesis of a bandpass signal from complex-envelope samples. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:407-410 [Conf]
  605. A. J. Johansson, H. Floberg
    Random number generation by chaotic double scroll oscillator on chip. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:407-409 [Conf]
  606. X. Zeng, J. Guan, W. Q. Zhao, P. S. Tang, D. Zhou
    A constraint-based placement refinement method for CMOS analog cell layout. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:408-411 [Conf]
  607. Jaime Ramírez-Angulo, Ramón González Carvajal, Jonathan Noel Tombs, Antonio Jesús Torralba Silgado
    Low voltage CMOS op-amps for a supply close to a transistor's threshold voltage. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:408-411 [Conf]
  608. M. Itoh
    Experimental study of impulsive synchronization. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:410-413 [Conf]
  609. Y. Sumi, S. Obote, N. Kitai, R. Furuhashi, H. Ishii, Y. Matsuda, Y. Fukui
    Dead-zone-less PLL frequency synthesizer by hybrid phase detectors. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:410-414 [Conf]
  610. Rolf Drechsler, Marc Herbstritt, Bernd Becker
    Grouping heuristics for word-level decision diagrams. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:411-414 [Conf]
  611. Stefano Traferro, F. Capparelli, Francesco Piazza, Aurelio Uncini
    Efficient allocation of power of two terms in FIR digital filter design using tabu search. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:411-414 [Conf]
  612. M. Wolf, U. Kleine
    Reliability driven module generation for analog layouts. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:412-415 [Conf]
  613. Paul E. Hasler, Paul D. Smith
    An autozeroing floating-gate amplifier with gain adaptation. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:412-415 [Conf]
  614. F. Komatsu, Hiroyuki Torikai, Toshimichi Saito
    A chaotic network based on intermittently coupled capacitors. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:414-417 [Conf]
  615. Jouko Vankka, Marko Kosunen, Kari Halonen
    Multicarrier QAM modulator. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:415-418 [Conf]
  616. Kenneth Francken, Georges G. E. Gielen
    Methodology for analog technology porting including performance tuning. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:415-418 [Conf]
  617. Sung-Ho Baik, Kyung-Nam Han, E. Yoon
    A 230 MHz 8 tap programmable FIR filter using redundant binary number system. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:415-418 [Conf]
  618. Chingwei Yeh, Chin-Chao Chang, Jinn-Shyan Wang
    A cell selection strategy for low power applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:416-419 [Conf]
  619. Philipp Häfliger, C. Rasche
    Floating gate analog memory for parameter and variable storage in a learning silicon neuron. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:416-419 [Conf]
  620. M. Kataoka, T. Saito
    A 4-D chaotic oscillator with a hysteresis 2-port VCCS: the first example of chaotic oscillators consisting of 2-port VCCSs and capacitors. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:418-421 [Conf]
  621. Ting Wu, Say Wei Foo
    An efficient method for parametric yield gradient estimation. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:419-422 [Conf]
  622. S. Obote, Y. Sumi, N. Kitai, Y. Fukui, Y. Itoh
    Performance improvement in a binary phase comparator type PLL frequency synthesizer. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:419-422 [Conf]
  623. Oscar Gustafsson, Lars Wanhammar
    Implementation of maximally fast ladder wave digital filters using a numerically equivalent state-space representation. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:419-422 [Conf]
  624. Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
    Low power synthesis of sum-of-product computation in DSP algorithms. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:420-423 [Conf]
  625. R. Kanan, F. Kaess, Michel J. Declercq
    A 640 mW high accuracy 8-bit 1 GHz flash ADC encoder. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:420-423 [Conf]
  626. Yoshifumi Nishio, Akio Ushida
    Analysis of chaotic wandering of phase patterns in a two-dimensional coupled chaotic circuits network. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:422-425 [Conf]
  627. B. Leslie, M. Sandler
    A wavelet packet algorithm for 1D data with no block end effects. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:423-426 [Conf]
  628. Jah-Ming Hsu, Chin-Liang Wang
    On finite-precision implementation of a decoder for turbo codes. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:423-426 [Conf]
  629. D. Torres, J. Gonzalez, M. Guzman, L. Nunez
    A new bus assignment in a designed shared bus switch fabric. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:423-426 [Conf]
  630. Felix Lustenberger, Markus Helfenstein, Hans-Andrea Loeliger, Felix Tarköy, George S. Moschytz
    An analog VLSI decoding technique for digital codes. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:424-427 [Conf]
  631. Franc Brglez, Rolf Drechsler
    Design of experiments in CAD: context and new data sets for ISCAS'99. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:424-427 [Conf]
  632. T. Endo, M. Endo
    On-off intermittency from a mutually coupled phase-locked loop. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:426-429 [Conf]
  633. K. Halford, S. Halford, M. Webster, Carl Andren
    Complementary code keying for RAKE-based indoor wireless communication. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:427-430 [Conf]
  634. D. Torres, A. Larios, M. Guzman
    Routing chip based on a modified trie for ATM, IP and Ethernet. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:427-430 [Conf]
  635. J. S. Mao, S. C. Chan, K. L. Ho
    Theory and design of causal stable IIR PR cosine-modulated filter banks. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:427-430 [Conf]
  636. Michael D. Hutton, Jonathan Rose
    Equivalence classes of clone circuits for physical-design benchmarking. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:428-431 [Conf]
  637. Markus Helfenstein, Felix Lustenberger, A. Loeliger, Felix Tarköy, George S. Moschytz
    High-speed interfaces for analog, iterative VLSI decoders. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:428-431 [Conf]
  638. W. Ohno, T. Endo
    Extinction and intermittency of the chaotic attractor in phase-locked loop equation with periodic external forcing term. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:430-433 [Conf]
  639. E. de Vasconcelos, J. L. Cura, Rui L. Aguiar, Dinis M. Santos
    A novel high gain, high bandwidth CMOS differential front-end for wireless optical systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:431-434 [Conf]
  640. Huimin Xia, K. Bataineh, M. Hassoun, J. Kryzak
    A mixed-signal behavioral level implementation of 1000BASE-X physical layer for gigabit Ethernet. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:431-434 [Conf]
  641. Carolyn Pe Rosiene, Truong Q. Nguyen
    Tensor-product wavelet vs. Mallat decomposition: a comparative analysis. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:431-434 [Conf]
  642. Kai He, Gert Cauwenberghs
    An area-efficient analog VLSI architecture for state-parallel Viterbi decoding. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:432-435 [Conf]
  643. Debabrata Ghosh, Franc Brglez
    Equivalence classes of circuit mutants for experimental design. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:432-435 [Conf]
  644. Michael B. Bendak, Baernard A. Xavier, Paul M. Chau
    A 1.2 GHz CMOS quadrature self-oscillating mixer. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:434-437 [Conf]
  645. Inseop Lee, W. Kenneth Jenkins
    A comparison of two adaptive equalizers: DFE and ACE. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:435-437 [Conf]
  646. J. I. Suarez, C. S. Lindquist
    Coefficient quantization error recovery. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:435-438 [Conf]
  647. Ilhan Hatirnaz, Frank K. Gürkaynak, Yusuf Leblebici
    Realization of a programmable rank-order filter architecture using capacitive threshold logic gates. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:435-438 [Conf]
  648. Wolfgang Günther, Rolf Drechsler
    Creating hard problem instances in logic synthesis using exact minimization. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:436-439 [Conf]
  649. T. B. Tarim, M. Ismail
    Functional yield enhancement and statistical design of a low power transconductor. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:436-439 [Conf]
  650. Yoshihiko Horio, I. Kobayashi, M. Kawakami, H. Hayashi, Kazuyuki Aihara
    Switched-capacitor multi-internal-state chaotic neuron circuit with unipolar and bipolar output functions. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:438-441 [Conf]
  651. Yang Xiao, Rolf Unbehauen, Xiyu Du
    A necessary condition for Schur stability of 2D polynomials [digital filters]. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:439-442 [Conf]
  652. W. J. Heng, K. N. Ngan
    The implementation of object-based shot boundary detection using edge tracing and tracking. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:439-442 [Conf]
  653. C.-C. Wang, C. J. Huang, G.-C. Lin
    A chip design of radix-4/2 64b/32b signed and unsigned integer divider using Compass cell library. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:439-442 [Conf]
  654. R. A. Rafla, Mourad N. El-Gamal
    Design of a 1.5 V CMOS integrated 3 GHz LNA. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:440-443 [Conf]
  655. Hemang Lavana, Franc Brglez, Robert B. Reese
    User-configurable experimental design flows on the web: the ISCAS'99 experiments. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:440-443 [Conf]
  656. O. A. Gonzalez, Gunhee Han, José Pineda de Gyvez, Edgar Sánchez-Sinencio
    CMOS cryptosystem using a Lorenz chaotic oscillator. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:442-445 [Conf]
  657. B. Le Chapelain, A. Mechain, Yvon Savaria, Guy Bois
    Development of a high performance TSPC library for implementation of large digital building blocks. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:443-446 [Conf]
  658. Minli Yao, Yilin Wang, Qinye Yin
    Direction finding for multiuser correlated signals based on spatial signature estimation in cyclic cumulant domain. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:443-446 [Conf]
  659. Juha Yli-Kaakinen, Tapio Saramäki
    An efficient algorithm for the design of lattice wave digital filters with short coefficient wordlength. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:443-448 [Conf]
  660. S. Chakrabarti, A. Chatterjee
    Fault modeling and fault sampling for isolating faults in analog and mixed-signal circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:444-447 [Conf]
  661. Matthias F. M. Stallmann, Franc Brglez, Debabrata Ghosh
    Evaluating iterative improvement heuristics for bigraph crossing minimization. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:444-447 [Conf]
  662. A. Kisel, Hervé Dedieu, Maciej Ogorzalek
    Noise reduction methods for chaotic communication schemes. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:446-449 [Conf]
  663. Louis Luh, John Choma Jr., Jeffrey T. Draper
    A self-sensing tristate pad driver for control signals of multiple bus controllers. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:447-450 [Conf]
  664. Gang Lin, Zemin Liu
    3D wavelet video codec and its rate control in ATM network. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:447-450 [Conf]
  665. Junwei Hou, William H. Kao, Abhijit Chatterjee
    A novel concurrent fault simulation method for mixed-signal circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:448-451 [Conf]
  666. Michael D. Hutton, Jonathan Rose
    Applications of clone circuits to issues in physical-design. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:448-451 [Conf]
  667. Tapio Saramäki, Yong Ching Lim
    Use of the Remez algorithm for designing FIR filters utilizing the frequency-response masking approach. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:449-455 [Conf]
  668. M. Jessa
    Maximal cycle length of pseudochaotic sequences generated by piecewise linear maps. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:450-453 [Conf]
  669. Minli Yao, Qinye Yin
    Signal selective 2-D direction finding for non-Gaussian cyclostationary sources. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:451-454 [Conf]
  670. Vassilis Paliouras, Thanos Stouraitis
    Novel high-radix residue number system multipliers and adders. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:451-454 [Conf]
  671. Justin E. Harlow III, Franc Brglez
    Mirror, mirror, on the wall...is the new release any different at all? [BDDs]. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:452-455 [Conf]
  672. B. J. Tesch, P. M. Pratt, K. Bacrania, M. Sanchez
    A 14-b, 125 MSPS digital-to-analog converter and bandgap voltage reference in 0.5 um CMOS. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:452-455 [Conf]
  673. A. Dornbusch, José Pineda de Gyvez
    Chaotic generation of PN sequences: a VLSI implementation. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:454-457 [Conf]
  674. A. Ramaswamy
    A standard target decoder model for MPEG-4 FlexMux streams. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:455-458 [Conf]
  675. Shen-Fu Hsiao
    A high-speed constant-factor redundant CORDIC processor without extra correcting or scaling iterations. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:455-458 [Conf]
  676. S. J. Krolikoski, Frank Schirrmeister, B. Salefski, J. Rowson, Grant Martin
    Methodology and technology for virtual component driven hardware/software co-design on the system-level. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:456-459 [Conf]
  677. Apisak Worapishet, John B. Hughes, Christofer Toumazou
    Class AB technique for high performance switched-current memory cells. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:456-459 [Conf]
  678. Tapio Saramäki, S. K. Mitra
    Design and implementation of narrow-band linear-phase FIR filters with piecewise polynomial impulse response. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:456-461 [Conf]
  679. D. A. Miller, K. L. Kowalski, A. Lozowski
    Synchronization and anti-synchronization of Chua's oscillators via a piecewise linear coupling circuit. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:458-462 [Conf]
  680. Jayashree Karlekar, Uday B. Desai
    New multiresolution motion estimation and compensation scheme. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:459-462 [Conf]
  681. M. C. Mekhallalati, M. K. Ibrahim
    New high radix maximally-redundant signed digit adder. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:459-462 [Conf]
  682. P. P. Jain
    Cost-effective co-verification using RTL-accurate C models. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:460-463 [Conf]
  683. John B. Hughes, Kenneth W. Moulding
    Error neutralisation in switched current memory cells. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:460-463 [Conf]
  684. Gwangwoo Choe, Earl E. Swartzlander Jr.
    Bipolar merged arithmetic for wavelet architectures. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:462-465 [Conf]
  685. Der-Zheng Liu, Che-Ho Wei
    Synchronization scheme in non-coherent demodulator for TDMA digital mobile radio system. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:463-466 [Conf]
  686. Vicente Baena Lecuyer, M. A. Aguirre, Antonio B. Torralba, Leopoldo García Franquelo, J. Faura
    Decoder-driven switching matrices in multicontext FPGAs: area reduction and their effect on routability. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:463-466 [Conf]
  687. Santina Rocchi, Valerio Vignoli
    A chaotic CMOS true-random analog/digital white noise generator. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:463-466 [Conf]
  688. Apisak Worapishet, John B. Hughes, Christofer Toumazou
    Error neutralised switched-current comparator. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:464-467 [Conf]
  689. G. J. Bunza
    Towards systems integration in a virtual environment: small steps, big results, and complications to come for embedded systems engineering in the next millennium. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:464-467 [Conf]
  690. Seyfullah H. Oguz, Truong Q. Nguyen, Yu Hen Hu
    Lost transform domain data concealment in GenLOT based coders. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:466-469 [Conf]
  691. Jaeyoung Kwak, Sang-Sic Yoon, Hung-Jun Kwon, Kwyro Lee
    A design of the new FPGA with data path logic and run time block reconfiguration method. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:467-469 [Conf]
  692. A. L. Baranovski, Wolfgang M. Schwarz, Andreas Mögel
    Statistical analysis and design of chaotic switched dynamical systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:467-470 [Conf]
  693. Shinji Fukuma, Masahiro Iwahashi, Noriyoshi Kambayashi
    Adaptive multi-channel prediction for lossless scalable coding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:467-470 [Conf]
  694. Graham R. Hellestrand
    Designing system on a chip products using systems engineering tools. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:468-473 [Conf]
  695. A. E. J. Ng, John I. Sewell
    Pseudo-N-path cells for switched-current signal processing. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:468-471 [Conf]
  696. Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj
    Low-power distributed arithmetic architectures using nonuniform memory partitioning. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:470-473 [Conf]
  697. C. E. Rabel, Mohamad Sawan
    PARC: a new pyramidal FPGA architecture based on a RISC processor. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:470-473 [Conf]
  698. T. Tsubone, T. Saito, Wolfgang M. Schwarz
    Probability distribution of the switching intervals in chaotic pulse streams-a comparative study. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:471-474 [Conf]
  699. Hitoshi Kiya, Yoshihiro Noguchi, Ayuko Takagi, H. Kobayshi
    A method of inserting binary data into MPEG bitstreams. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:471-474 [Conf]
  700. Fathi A. Farag, Carlos Galup-Montoro, Márcio C. Schneider
    A programmable low voltage switched-current FIR filter. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:472-475 [Conf]
  701. J. Kenney
    Co-verification as risk management: minimizing the risk of incorporating a new processor in your next embedded system design. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:474-477 [Conf]
  702. Chi-Chou Kao, Yen-Tai Lai
    A routability and performance driven technology mapping algorithm for LUT based FPGA designs. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:474-477 [Conf]
  703. M. Hu, Olli Vainio, Jaakko Astola, Karen Egiazarian, David Z. Gevorkian
    RAM-based programmable stack filter implementation. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:474-477 [Conf]
  704. Géza Kolumbán, Z. Jako, Michael Peter Kennedy
    Enhanced versions of DCSK and FM-DCSK data transmission systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:475-478 [Conf]
  705. H. Nakano, T. Saito, K. Mitsubori
    Various impulsive synchronous patterns from mutually coupled ISC chaotic oscillators. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:475-478 [Conf]
  706. José Manuel de la Rosa, Maria Belen Pérez-Verdú, Rocio del Río, Ángel Rodríguez-Vázquez
    Non-ideal quantization noise shaping in switched-current bandpass Sigma-Delta modulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:476-479 [Conf]
  707. J. Living, Bashir M. Al-Hashimi
    Mixed arithmetic architecture: a solution to the iteration bound for resource efficient FPGA and CPLD recursive digital filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:478-481 [Conf]
  708. S. Davis, J. Braatz, J. Clement, D. Honda
    Advanced instrument controller ASIC. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:478-480 [Conf]
  709. Alexander Skavantzos, Thanos Stouraitis
    Grouped-moduli residue number systems for fast signal processing. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:478-483 [Conf]
  710. Paolo Arena, Luigi Fortuna, D. Porto, Alessandro Rizzo
    Self-organisation in arrays of nonlinear systems induced by chaotic perturbation: An experimental approach. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:479-482 [Conf]
  711. Musik Kwon, HyoJoon Kim, Choong Woong Lee, Sang Uk Lee
    A lossless image coder with context-based minimizing MSE prediction and entropy coding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:479-482 [Conf]
  712. Antônio Carlos M. de Queiroz, Jones Schechtman
    Sensitivity and error reduction by component swapping in switched-current filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:480-483 [Conf]
  713. Andrea Alimonda, Salvatore Carta, Luigi Raffo
    A modular digital VLSI architecture for stereo depth estimation in industrial applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:481-484 [Conf]
  714. J. Valls, T. Sansaloni, M. M. Peiro, Eduardo I. Boemo
    Fast FPGA-based pipelined digit-serial/parallel multipliers. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:482-485 [Conf]
  715. Mustak E. Yalcin, Johan A. K. Suykens, Joos Vandewalle
    On the realization of n-scroll attractors. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:483-486 [Conf]
  716. Jiayi Gu, M. Jurczyk, Chang Wen Chen
    Impact of ATM traffic control on MPEG-2 video quality. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:483-486 [Conf]
  717. J. Lee, Kyung-Bin Bae
    Numerically stable fast sequential calculation for projection approximation subspace tracking. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:484-487 [Conf]
  718. A. E. J. Ng, John I. Sewell
    Bilinear transformed switched-current ladder interpolators. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:484-487 [Conf]
  719. Gyung-Hae Han, Hwa-Young Yi, Bum-Suk Go, Dong-Geun Lee, In-Haeng Cho, Dong-Il Oh
    A new ASIC for washer controller. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:485-488 [Conf]
  720. Antonio García, Uwe Meyer-Bäse, Antonio Lloris-Ruíz, F. J. Taylor
    RNS implementation of FIR filters based on distributed arithmetic using field-programmable logic. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:486-489 [Conf]
  721. Ju Guo, Jongwon Kim, C. C. Jay Kuo
    Robust video segmentation employing variable bandwidth object boundary. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:487-490 [Conf]
  722. M. Wada, Yoshifumi Nishio, Akio Ushida
    Chaotic itinerancy phenomena on coupled n-double scrolls chaotic circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:487-490 [Conf]
  723. S. Kimura, T. Otsuji, H. Kikuchi, K. Murata, E. Sano
    Circuit design technologies for high-speed lightwave communications beyond 40 Gbit/s. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:488-491 [Conf]
  724. M. N. Mahesh, Mahesh Mehendale
    Improving performance of high precision signal processing algorithms on programmable DSPs. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:488-491 [Conf]
  725. D. J. Alladi, M. L. Nagy, S. L. Gaverick
    An IC for closed-loop control of a micromotor with an electrostatically levitated rotor. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:489-492 [Conf]
  726. William L. Freking, Keshab K. Parhi
    Parallel modular multiplication with application to VLSI RSA implementation. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:490-495 [Conf]
  727. Peter H. Bauer, Mihail L. Sichitiu, Kamal Premaratne
    Controlling an integrator through data networks: stability in the presence of unknown time-variant delays. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:491-494 [Conf]
  728. Tien-Ying Kuo, Jongwon Kim, C. C. Jay Kuo
    Motion-compensated frame interpolation scheme for H.263 codec. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:491-494 [Conf]
  729. B. Wedding, Werner Pohlmann, D. Schlump, E. Schlag, R. Ballentin
    SiGe circuits for high bit-rate optical transmission systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:492-495 [Conf]
  730. Stefan Fröhlich, Martin Gotschlich, Udo Krebelder, B. Wess
    Dynamic trellis diagrams for optimized DSP code generation. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:492-495 [Conf]
  731. M. Rahal, J. Winter, J. Taylor, N. Donaldson
    Interference reduction in nerve cuff electrode recordings-a new approach. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:493-496 [Conf]
  732. Zhidong Yan, Sunil Kumar, Jiankun Li, C. C. Jay Kuo
    Robust encoding of 3D mesh using data partitioning. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:495-498 [Conf]
  733. A. Teplinsky, O. Feely
    Phase-jitter dynamics in second-order DPLLs with irrational and integer input frequencies. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:495-498 [Conf]
  734. Nobuhiko Sugino, H. Funaki, Akinori Nishihara
    Memory address allocation method for a indirect addressing DSP with consideration of modification in local computational order. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:496-499 [Conf]
  735. Jen-Shiun Chiang, Jian-Kao Chen
    An efficient VLSI architecture for RSA public-key cryptosystem. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:496-499 [Conf]
  736. T. Baumheinrich, U. Langmann
    Design of high speed bipolar Si/SiGe ICs for optical wide band communications. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:496-499 [Conf]
  737. Jong-Nam Kim, Tae-Sun Choi
    Fast motion estimation using UESA, threshold-half-stop and adaptive partial sum scan from gradient magnitude. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:497-500 [Conf]
  738. F. Yuan, A. Opal
    Distortion analysis of periodically switched nonlinear circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:499-502 [Conf]
  739. Kwok-Wai Wong, Kin-Man Lam
    A reliable approach for human face detection using genetic algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:499-502 [Conf]
  740. Che-Han Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu, Jia-Lin Sheu
    A VLSI architecture of fast high-radix modular multiplication for RSA cryptosystem. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:500-503 [Conf]
  741. Arrigo Benedetti, Pietro Perona
    A novel system architecture for real-time low-level vision. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:500-503 [Conf]
  742. M. Rodwell, Q. Lee, D. Mensa, J. Guthrie, Y. Betser, S. C. Martin, R. P. Smith, S. Jaganathan, T. Mathew, P. Krishnan, C. Serhan, S. Long
    Ultra high frequency integrated circuits using transferred substrate heterojunction bipolar transistors. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:500-503 [Conf]
  743. M. Salerno, F. Sargeni, V. Bonaiuto, Sergio Taraglio, Andrea Zanela
    A dedicated hardware system for CNN stereo vision. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:501-504 [Conf]
  744. Yuan-Pei Lin, See-May Phoong
    Asymptotical optimality of DFT based DMT transceivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:503-506 [Conf]
  745. Tetsushi Ueta, Guangrong Chen, Tetsuya Yoshinaga, Hiroshi Kawakami
    A numerical algorithm for computing Neimark-Sacker bifurcation parameters. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:503-506 [Conf]
  746. Jae-Hwa Kim, Tae-Gyu Chang
    Analytic derivation of the performance degradation in recursive implementation of sliding-DFT with the twiddle factors of finite-bit precision. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:504-507 [Conf]
  747. P. Andre, N. Kauffmann, P. Desrousseaux, J. Godin, A. Konczykowska
    InP HBT circuits for high speed ETDM systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:504-507 [Conf]
  748. Jyh-Huei Guo, Chin-Liang Wang, Hung-Chih Hu
    Design and implementation of an RSA public-key cryptosystem. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:504-507 [Conf]
  749. Wen-Cheng Yen, Chung-Yu Wu
    A new compact neuron-bipolar cellular neural network structure with adjustable neighborhood layers and high integration level. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:505-508 [Conf]
  750. Liang Jin, Minli Yao, Qinye Yin
    2D angle and array response estimation with arbitrary array configuration. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:507-510 [Conf]
  751. M. Padin, P. Julian, L. Castro, A. Desages
    Volterra kernels description using piecewise linear functions. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:507-510 [Conf]
  752. Leilei Song, Keshab K. Parhi
    Low-complexity modified Mastrovito multipliers over finite fields GF(2M). [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:508-512 [Conf]
  753. Sony Akkarakaran, P. P. Vaidyanathan
    The best basis problem, compaction problem and PCFB design problems [filter banks]. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:508-511 [Conf]
  754. M. Mokhtari, A. Ladjemi, U. Westergren, L. Thylen
    Bit-rate transparent electronic data regeneration in repeaters for high speed lightwave communication systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:508-511 [Conf]
  755. V. K. Jain, S. Shrivastava, A. D. Snider, D. Damerow, D. Chester
    Hardware implementation of a nonlinear processor. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:509-514 [Conf]
  756. Sang-ug Kang, Kook-Yeol Yoo
    Region and time based unequal error protection for video transmission over mobile links. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:511-514 [Conf]
  757. P. Julian, A. Desages, B. D'Amico
    Orthonormal high level canonical PWL functions. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:511-514 [Conf]
  758. Sony Akkarakaran, P. P. Vaidyanathan
    On optimization of filter banks with denoising applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:512-515 [Conf]
  759. Thomas Meincke, Ahmed Hemani, Shashi Kumar, Peeter Ellervee, Johnny Öberg, Thomas Olsson, Peter Nilsson, Dan Lindqvist, Hannu Tenhunen
    Globally asynchronous locally synchronous architecture for large high-performance ASICs. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:512-515 [Conf]
  760. Hyunman Chang, Myung Hoon Sunwoo
    A low complexity Reed-Solomon architecture using the Euclid's algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:513-516 [Conf]
  761. Irwin W. Sandberg
    Notes on representation theorems for linear discrete-space systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:515-518 [Conf]
  762. Atsunobu Hiraiwa, Keisuke Fuse, Naohisa Komatsu, Kazumi Komiya, Hiroaki Ikeda
    Accurate estimation of optical flow for fully automated tracking of moving-objects within video streams. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:515-519 [Conf]
  763. See-May Phoong, Yuan-Pei Lin
    PLT versus KLT [transforms]. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:516-519 [Conf]
  764. Fenghao Mu, Christer Svensson
    High speed interface for system-on-chip design by self-tested self-synchronization. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:516-519 [Conf]
  765. Jin-Chuan Huang, Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu
    An area-efficient versatile Reed-Solomon decoder for ADSL. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:517-520 [Conf]
  766. B. Gou, A. Abur
    A simple method to determine observable islands for state estimation. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:519-522 [Conf]
  767. Warnakulasuriya Anil Chandana Fernando, Cedric Nishan Canagarajah, David R. Bull
    DFD based scene segmentation for H.263 video sequences. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:520-523 [Conf]
  768. M. Ramkumar, G. V. Anand, A. N. Akansu
    On the implementation of 2-band cyclic filterbanks. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:520-523 [Conf]
  769. Woogeun Rhee
    Design of low-jitter 1-GHz phase-locked loops for digital clock generation. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:520-523 [Conf]
  770. Jyh-Huei Guo, Chin-Liang Wang
    A low time-complexity, hardware-efficient bit-parallel power-sum circuit for finite fields GF(2M). [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:521-524 [Conf]
  771. Sau-Gee Chen, Chin-Chi Chang
    A new efficient algorithm for singular value decomposition. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:523-526 [Conf]
  772. Chu Yu, Sao-Jie Chen
    Efficient VLSI architecture for 2-D inverse discrete wavelet transforms. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:524-527 [Conf]
  773. Justy W. C. Wong, Oscar C. Au
    Modified predictive motion estimation for reduced-resolution video from high-resolution compressed video. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:524-527 [Conf]
  774. T. Toifl, P. Moreira
    A radiation-hard 80 MHz phase locked loop for clock and data recovery. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:524-527 [Conf]
  775. Hien Ha, Forrest Brewer
    Power and signal integrity improvement in ultra high-speed current mode logic. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:525-528 [Conf]
  776. Kunsheng Lu, Kai-Sheng Lu
    Controllability and observability of RLC networks over F(z). [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:527-530 [Conf]
  777. Justy W. C. Wong, Oscar C. Au
    Fast motion estimation for video resolution down-conversion using spatial-variant filter. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:528-531 [Conf]
  778. Chua-Chin Wang, Yu-Tsun Chien, Ying-Pei Chen
    A practical load-optimized VCO design for low-jitter 5 V 500 MHz digital phase-locked loop. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:528-531 [Conf]
  779. Ioan Tabus, Corneliu Popeea, Jaakko Astola
    Optimizing the compaction gain in a class of IIR filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:528-531 [Conf]
  780. A. Kabbani, A. J. Al-Khalili
    Dynamic CMOS noise immunity estimation in submicron regime. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:529-532 [Conf]
  781. Simone Fiori, Francesco Piazza
    A second-order differential system for orthonormal optimization. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:531-534 [Conf]
  782. Y. Sumi, S. Obote, N. Kitai, R. Furuhashi, Y. Matsuda, Y. Fukui
    PLL frequency synthesizer with an auxiliary programmable divider. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:532-536 [Conf]
  783. David B. H. Tay
    Balanced-uncertainty optimized wavelet filters with prescribed regularity. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:532-535 [Conf]
  784. Tsuyoshi Isshiki, Hiroaki Kunieda
    Efficient anti-aliasing algorithm for computer generated images. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:532-535 [Conf]
  785. A. Kabbani, A. J. Al-Khalili
    Estimation of ground bounce effects on CMOS circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:533-536 [Conf]
  786. Manuel de la Sen
    Parametrical modeling and identification of a class of hybrid systems under persistent excitation of the input. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:535-538 [Conf]
  787. Pedro D. Donate, C. Muravchik, Juan E. Cousseau
    Modeling and decision feedback equalization of uncertain channels. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:536-539 [Conf]
  788. E. Elsehely, Mohamed I. Sobhy
    Detection of radar target pulse in the presence of noise and jamming signal using the multiscale wavelet transform. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:536-539 [Conf]
  789. Antti Mäntyniemi, Timo Rahkonen, Juha Kostamovaara
    A high resolution digital CMOS time-to-digital converter based on nested delay locked loops. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:537-540 [Conf]
  790. Li-Rong Zheng, Hannu Tenhunen
    Effective power and ground distribution scheme for deep submicron high speed VLSI circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:537-540 [Conf]
  791. P. A. Janakiraman, A. Bhattacharyya
    Stable output error identification scheme using periodic excitation signals. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:539-542 [Conf]
  792. Liping Deng, John G. Harris
    Wavelet denoising of chirp-like signals in the Fourier domain. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:540-543 [Conf]
  793. David R. Bull, Cedric Nishan Canagarajah, Przemysalw Czerepinski
    Dictionaries for matching pursuits video coding. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:540-543 [Conf]
  794. Fenghao Mu, Christer Svensson
    High speed multistage CMOS clock buffers with pulse width control loop. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:541-544 [Conf]
  795. Kevin T. Tang, Eby G. Friedman
    Peak noise prediction in loosely coupled interconnect [VLSI circuits]. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:541-544 [Conf]
  796. Y. Tanji, M. Tanaka
    A new order-reduction method of interconnect networks characterized by sampled data via orthogonal least square algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:543-546 [Conf]
  797. Razvan Iordache, Ioan Tabus
    Index assignment for transmitting vector quantized LSF parameters over binary Markov channels. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:544-547 [Conf]
  798. Dong-Yan Huang, Xuesong Gong, Daqing Zhou, Miki Toshio, Sanae Hotani
    Implementation of the MPEG-4 advanced audio coding encoder on ADSP-21060 SHARC. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:544-547 [Conf]
  799. W. Rhee
    Design of high-performance CMOS charge pumps in phase-locked loops. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:545-548 [Conf]
  800. Ming-Dou Ker, Hun-Hsien Chang, Tung-Yang Chen
    ESD buses for whole-chip ESD protection. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:545-548 [Conf]
  801. M. Hanggi, H. Reddy, G. Moschytz
    Unifying results in CNN theory using delta operator. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:547-550 [Conf]
  802. Tsung-Han Tsai, Liang-Gee Chen
    A cost effective architecture design of inverse quantization and multichannel processing for MPEG-2 audio decoding. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:548-551 [Conf]
  803. Chih-Sheng Chou, David W. Lin
    Performance of array signal processing algorithms for wideband digital wireless communication. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:548-551 [Conf]
  804. Lei Wang, Naresh R. Shanbhag
    Noise-tolerant dynamic circuit design. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:549-552 [Conf]
  805. Amr N. Hafez, Mohamed I. Elmasry
    A low power monolithic subsampled phase-locked loop architecture for wireless transceivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:549-552 [Conf]
  806. M. C.-Y. Ho, Y.-G. Wu, H. Kurokawa
    A novel learning algorithm for global synchronization of oscillatory neural networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:551-554 [Conf]
  807. Michael A. Soderstrand, L. Gao, E. McCune
    Maximizing channel capacity in FSK modulation systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:552-555 [Conf]
  808. Heng-Chou Chen, Oscal T.-C. Chen
    A predictive updating scheme to improve the NLMS algorithm for acoustic echo cancellation. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 1999, pp:552-555 [Conf]
  809. Hyuk-Jun Sung, Kwang Sub Yoon
    A 3.3 V high speed CMOS PLL with 3-250 MHz input locking range. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:553-556 [Conf]
  810. T. Nakaguchi, K. Jin'no, M. Tanaka
    Theoretical analysis of hysteresis neural network solving N-Queens problems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:555-558 [Conf]
  811. G. S. Kang, D. A. Heide
    Acoustic noise reduction for speech communication: (second-order gradient microphone). [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:556-559 [Conf]
  812. Pietro Andreani, Sven Mattisson
    A 2.4-GHz CMOS monolithic VCO based on an MOS varactor. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:557-560 [Conf]
  813. M. Mori, Y. Tanji, M. Tanaka
    Cooperative and competitive cellular neural networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:559-562 [Conf]
  814. Zexian Li, Ping Zhang, Jiandong Hu
    A novel method to determine insert frequency of pilot symbols. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:560-563 [Conf]
  815. Yi-Chang, E. W. Greeneich
    A current-controlled oscillator coarse-steering acquisition-aid for high frequency SOI CMOS PLL circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:561-564 [Conf]
  816. Luigi Fortuna, V. Marchese, Alessandro Rizzo, Maria Gabriella Xibilia
    A neural networks based system for post pulse fault detection and disruption data validation in tokamak machines. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:563-566 [Conf]
  817. K. C. Ho, Haiqin Liu, Liang Hong
    On improving the accuracy of a wavelet based identifier to classify CDMA signal and GSM signal. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:564-567 [Conf]
  818. L. Wu, H. Chen, S. Nagavarapu, R. Geiger, E. Lee, W. Black
    A monolithic 1.25 Gbits/sec CMOS clock/data recovery circuit for fibre channel transceiver. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:565-568 [Conf]
  819. L. Tao, H. K. Kwan
    A neural network method for adaptive noise cancellation. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:567-570 [Conf]
  820. Michael Peter Kennedy, Géza Kolumbán, Gábor Kis
    Simulation of the multipath performance of FM-DCSK digital communications using chaos. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:568-571 [Conf]
  821. H. Chen, E. Lee, R. Geiger
    A 2 GHz VCO with process and temperature compensation. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:569-572 [Conf]
  822. Ramón González Carvajal, Antonio B. Torralba, Rafael L. Millán, Leopoldo García Franquelo
    Automatic synthesis of analog and mixed-signal fuzzy controllers with emphasis in power consumption. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:571-574 [Conf]
  823. Morgan Hirosuke Miki, Daisuke Taki, Gen Fujita, Takao Onoye, Isao Shirakawa, T. Fujiwara, T. Kasami
    Recursive maximum likelihood decoder for high-speed satellite communication. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:572-575 [Conf]
  824. Yorgos Koutsoyannopoulos, Yannis Papananos, Sotiris Bantas, C. Alemanni
    Novel Si integrated inductor and transformer structures for RF IC design. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:573-576 [Conf]
  825. Sabri Arik, Vedat Tavsanoglu
    Stability analysis of the class of delayed neural networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:575-578 [Conf]
  826. Seung Hyuk Ahn, Joon Tae Kim, Yong Hoon Lee
    Efficient implementation of parallel correlators for code acquisition in DS/CDMA systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:576-579 [Conf]
  827. M. Ozgur, Mona E. Zaghloul, M. Gaitan
    High Q backside micromachined CMOS inductors. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:577-580 [Conf]
  828. I. Nakanishi, Y. Itoh, Y. Fukui
    Transform domain neural filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:579-582 [Conf]
  829. A. F. Shalash, Keshab K. Parhi
    Multiple access over wireline channels using orthogonal signaling. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:580-583 [Conf]
  830. Sotiris Bantas, Yannis Papananos, Yorgos Koutsoyannopoulos
    CMOS tunable bandpass RF filters utilizing coupled on-chip inductors. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:581-584 [Conf]
  831. Chua-Chin Wang, Cheng-Fa Tsai
    Theoretical expectation value of the capacity of fuzzy polynomial bidirectional hetero-correlator. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:583-586 [Conf]
  832. T. Vasseaux, B. Huyart, Patrick Loumeau, Jean-François Naviner
    A track&hold-mixer for direct-conversion by subsampling. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:584-587 [Conf]
  833. Chi-Wa Lo, H. C. Luong
    2-V 900-MHz quadrature coupled LC oscillators with improved amplitude and phase matchings. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:585-588 [Conf]
  834. B. Lu, B. L. Evans
    Channel equalization by feedforward neural networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:587-590 [Conf]
  835. D. B. LaFontaine
    Full duplex transhybrid circuit for voice communications through a single crosspoint. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:588-591 [Conf]
  836. D. L. C. Leung, H. C. Luong
    A fourth-order CMOS bandpass amplifier with high linearity and high image rejection for GSM receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:589-592 [Conf]
  837. Ni Yixin, Mak Lai On, Huang Zhenyu, Chen Shousun, Zhang Baolin
    Fuzzy logic damping controller for FACTS devices in interconnected power systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:591-594 [Conf]
  838. S. H. Galal, Maged S. Tawfik, H. F. Ragaie
    On the design and sensitivity of RC sequence asymmetric polyphase networks in RF integrated transceivers. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:593-597 [Conf]
  839. Ari Paasio, Asko Kananen, Kari Halonen
    Very fast and compact fixed template CNN realizations for B/W processing. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:595-598 [Conf]
  840. G. Kathiresan, Christofer Toumazou
    A low voltage bulk driven downconversion mixer core. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:598-601 [Conf]
  841. A. Burian, P. Kuosmanen, J. Saarinen
    Neural detectors with variable threshold. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:599-602 [Conf]
  842. S. H.-L. Tu, Christofer Toumazou
    Design of highly-efficient power-controllable CMOS class E RF power amplifiers. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:602-605 [Conf]
  843. Neng Wang, Wei-Ping Zhu, Baoyu Zheng
    Blind multiuser detection for DS-CDMA systems: a neural network approach. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:603-606 [Conf]
  844. G. Xu, Sherif H. K. Embabi, P. Hao, Edgar Sánchez-Sinencio
    A low voltage fully differential nested Gm capacitance compensation amplifier: analysis and design. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:606-609 [Conf]
  845. A. Odet-Allah, M. Hassoun
    An algorithm for symbolic and numeric architecture determination in a knowledge-based analog-to-digital converter synthesis environment using fuzzy membership functions. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:607-611 [Conf]
  846. M. E. Schlarmann, E. K. F. Lee, Randall L. Geiger
    A new multipath amplifier design technique for enhancing gain without sacrificing bandwidth. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:610-615 [Conf]
  847. S. C. Ng, S. H. Leung, Andrew Luk
    The generalized back-propagation algorithm with convergence analysis. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:612-615 [Conf]
  848. Ka Nang Leung, Philip K. T. Mok, Wing-Hung Ki
    Optimum nested Miller compensation for low-voltage low-power CMOS amplifier design. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:616-619 [Conf]
  849. Xiqun Lu, Chun Chen
    A new hybrid recurrent neural network. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:616-618 [Conf]
  850. J. Yang, Majid Ahmadi, Graham A. Jullien, William C. Miller
    An in-the-loop training method for VLSI neural networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:619-622 [Conf]
  851. Jaime Ramírez-Angulo
    Linear amplifiers architectures with very high gain-bandwidth product. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:620-623 [Conf]
  852. T. Lund, Antonio B. Torralba, Ramón González Carvajal, Jaime Ramírez-Angulo
    A comparison of architectures for a programmable fuzzy logic chip. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:623-626 [Conf]
  853. B. Zand, K. Phang, D. A. Johns
    Transimpedance amplifier with differential photodiode current sensing. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:624-627 [Conf]
  854. Simone Fiori, Aurelio Uncini, Francesco Piazza
    Neural blind separation of complex sources by extended APEX algorithm (EAPEX). [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:627-630 [Conf]
  855. Mohamed Mostafa, Hassan O. Elwan, A. Bellaour, B. Kramer, Sherif H. K. Embabi
    A 110 MHz 70 dB CMOS variable gain amplifier. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:628-631 [Conf]
  856. C. Aissi, A. Shams
    A CNN implementation of a hysteresis chaos generator. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:631-634 [Conf]
  857. Hassan O. Elwan, Weinan Gao, Roberto Sadkowski, Mohammed Ismail
    A low voltage CMOS class AB operational transconductance amplifier. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:632-635 [Conf]
  858. A. Ryan, M. Neag, O. McCarthy
    CMOS operational transconductance amplifier for PRML read channel applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:636-639 [Conf]
  859. Jader A. De Lima, C. Dualibe
    A tunable triode-MOSFET transconductor and its application to gm-C filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:640-643 [Conf]
  860. Y. Ro, William R. Eisenstadt, Robert M. Fox
    New 1.4 volt transconductor with superior power supply rejection. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:644-647 [Conf]
  861. J. Silva-Martinez, S. Solis-Bustos
    Design considerations for high performance very low frequency filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:648-651 [Conf]
  862. D. H. Chiang, R. Schaumann
    Comparison of magnitude and delay sensitivity in IFLF and cascade g m-C filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:652-655 [Conf]
  863. Yuyu Chang, John Choma Jr., Jack Wills
    A CMOS continuous-time active biquad filter for gigahertz-band applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:656-659 [Conf]
  864. P. H. Shanjani, Seyed Mojtaba Atarodi
    A high dynamic-range, self-tuned Gm-C filter for video-range applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:660-663 [Conf]
  865. N. Rao, V. Balan, R. Contreras, J.-G. Chern, Y. Wang
    A 150 MHz continuous-time seventh order 0.05° equiripple linear phase filter. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:664-666 [Conf]
  866. Aydin I. Karsilayan, Rolf Schaumann
    Automatic tuning of high-Q filters based on envelope detection. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:668-671 [Conf]
  867. D. Frey
    On instantaneous vs. syllabic companding in log domain filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:672-676 [Conf]
  868. Sergio Callegari, Gianluca Setti
    Improved bandwidth, low voltage log domain building blocks. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:677-680 [Conf]
  869. Mourad N. El-Gamal, Gordon W. Roberts
    A 1.2 V NPN-only log-domain integrator. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:681-684 [Conf]
  870. D. Python, Manfred Punzenberger, Christian C. Enz
    A 1-V CMOS log-domain integrator. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:685-688 [Conf]
  871. R. M. Fox, M. Nagarajan
    Multiple operating points in a CMOS log-domain filter. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:689-692 [Conf]
  872. Emmanuel M. Drakakis, A. J. Payne
    Structured log-domain synthesis of nonlinear systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:693-696 [Conf]
  873. Bradley A. Minch
    Synthesis of multiple-input translinear element log-domain filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:697-700 [Conf]
  874. Wouter A. Serdijn, J. Mulder, Michiel H. L. Kouwenhoven, Arthur H. M. van Roermund
    A low-voltage translinear second-order quadrature oscillator. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:701-704 [Conf]
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NOTICE2
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