Conferences in DBLP
Palghat P. Vaidyanathan , Bojan Vrcelj On power allocation for generalized cyclic-prefix based channel-equalizers. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:1-4 [Conf ] Yajun Kou , Wu-Sheng Lu , Andreas Antoniou An improved peak-to-average-power ratio reduction algorithm for multicarrier communications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:5-8 [Conf ] X. M. Wang , Wu-Sheng Lu , Andreas Antoniou Subspace estimation-based constrained optimization method for multipath CDMA channels. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:9-12 [Conf ] Jie Yang , Moon Ho Lee , Ju Yong Park Enhancing robustness of information hiding against interference of communication with turbo code. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:13-16 [Conf ] X. Zhang , Yun Q. Shi , Hangjun Chen , Alexander M. Haimovich , Anthony Vetro , Huifang Sun Successive packing based interleaver design for turbo codes. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:17-20 [Conf ] K. Takeichi , T. Furukawa A parallel fast algorithm of Volterra adaptive filters. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:21-24 [Conf ] P. L. Hubscher , J. C. M. Bermudez An improved stochastic model for the least mean fourth (LMF) adaptive algorithm. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:25-28 [Conf ] Jose L. Figueroa , Juan E. Cousseau , R. J. P. de Figueiredo A piecewise linear dynamical functional artificial neural network (PWL-DFANN) for nonlinear adaptive time series prediction. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:29-32 [Conf ] R. S. Srivatsa , W. Kenneth Jenkins Learning characteristics of adaptive fault tolerant filters in the presence of transient errors. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:33-36 [Conf ] Lan-Da Van , Chih-Hong Chang Pipelined RLS adaptive architecture using relaxed Givens rotations (RGR). [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:37-40 [Conf ] R. C. Qiu , Wenwu Zhu , Ya-Qin Zhang Third-generation and beyond (3.5G) wireless networks and its applications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:41-44 [Conf ] Mark Kalman , Eckehard G. Steinbach , Bernd Girod Adaptive playout for real-time media streaming. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:45-48 [Conf ] Abhik Majumdar , Rohit Puri , Kannan Ramchandran , Igor Kozintsev Robust video multicast under rate and channel variability with applications to wireless LANs. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:49-52 [Conf ] Jacco R. Taal , Koen Langendoen , Arjen van der Schaaf , Hylke W. van Dijk , Reginald L. Lagendijk Adaptive end-to-end optimization of mobile video streaming using QoS negotiation. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:53-56 [Conf ] Shunan Lin , Yao Wang , Shiwen Mao , Shivendra S. Panwar Video transport over ad-hoc networks using multiple paths. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:57-60 [Conf ] Yong Sun , Shengjie Zhao , Zixiang Xiong , Xiaodong Wang Error robust video transmission over wireless IP networks with multiuser detection. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:61-64 [Conf ] Lan-Da Van , Sung-Huang Lee A generalized methodology for lower-error area-efficient fixed-width multipliers. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:65-68 [Conf ] Sang-Min Kim , Jin-Gyun Chung , Keshab K. Parhi Design of low error CSD fixed-width multiplier. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:69-72 [Conf ] Oscar Gustafsson , Andrew G. Dempster , Lars Wanhammar Extended results for minimum-adder constant integer multipliers. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:73-76 [Conf ] Zhan Yu , Meng-Lin Yu , Kamran Azadet , Alan N. Willson Jr. The use of reduced two's-complement representation in low-power DSP design. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:77-80 [Conf ] M.-J. Liao , C.-F. Su , Alex C.-Y. Chang , Allen C.-H. Wu A carry-select-adder optimization technique for high-performance Booth-encoded Wallace-tree multipliers. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:81-84 [Conf ] Paul-Peter Sotiriadis , Anantha Chandrakasan , Vahid Tarokh Maximum achievable energy reduction using coding with applications to deep sub-micron buses. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:85-88 [Conf ] S. Saito A novel analysis method of bus signal transmission and a proposal for high-speed low-power bus circuit. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:89-92 [Conf ] Davide Bertozzi , Luca Benini , Bruno Riccò Energy-efficient and reliable low-swing signaling for on-chip buses based on redundant coding. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:93-96 [Conf ] Hannu Tenhunen , Dinesh Pamunuwa On dynamic delay and repeater insertion. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:97-100 [Conf ] Andrey V. Mezhiba , Eby G. Friedman Inductance/area/resistance tradeoffs in high performance power distribution grids. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:101-104 [Conf ] J. Welz , Ian Galton A necessary and sufficient condition for mismatch shaping in multi-bit DACs. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:105-108 [Conf ] Yunyoung Choi , Franco Maloberti Design of oversampling current steering DAC with 640 MHz equivalent clock frequency. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:109-112 [Conf ] K. Ola Andersson , N. U. Andersson , Mark Vesterbacka , J. Jacob Wikner A differential DAC architecture with variable common-mode level. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:113-116 [Conf ] Konstantinos Doris , Arthur H. M. van Roermund , Domine Leenaerts A general analysis on the timing jitter in D/A converters. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:117-120 [Conf ] Jussi Pirkkalaniemi , Marko Waltari , Mikko Kosunen , Lauri Sumanen , Kari Halonen A 14-bit, 40-MS/s DAC with current mode deglitcher. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:121-124 [Conf ] Koon Hung Lee , Mourad N. El-Gamal A very low-voltage (0.8 V) CMOS receiver frontend for 5 GHz RF applications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:125-128 [Conf ] Sami Karvonen , Tom A. D. Riley , Juha Kostamovaara Charge sampling mixer with Delta-Sigma quantized impulse response. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:129-132 [Conf ] C. Trask Low noise, high linearity double-balanced active mixers using lossless feedback. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:133-136 [Conf ] Hong Jo Ahn , M. Ismail GHz programmable dual-modulus prescaler for multi-standard wireless applications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:137-140 [Conf ] Yijun Zhou , Jiren Yuan A direct digital RF amplitude modulator. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:141-144 [Conf ] Weize Xu , Eby G. Friedman A substrate noise circuit for accurately testing mixed-signal ICs. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:145-148 [Conf ] G. O. D. Acevedo , Jaime Ramírez-Angulo Built-in self-test scheme for on-chip diagnosis, compliant with the IEEE 1149.4 mixed-signal test bus standard. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:149-152 [Conf ] Yigang He , Yanghong Tan , Yichuang Sun A neural network approach for fault diagnosis of large-scale analogue circuits. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:153-156 [Conf ] Bernhard Burdiek The qualitative form of optimum transient test signals for analog circuits derived from control theory methods. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:157-160 [Conf ] A. Yonemoto , Takashi Hisakado , Kohshi Okumura Fault location of single-phase transmission lines by Laguerre function. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:161-164 [Conf ] Tong Jing , Xianlong Hong , Haiyun Bao , Yici Cai , Jingyu Xu , Jun Gu A novel and efficient timing-driven global router for standard cell layout design based on critical network concept. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:165-168 [Conf ] William N. N. Hung , Xiaoyu Song , Alan J. Coppola , Andrew A. Kennings On segmented channel routability. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:169-172 [Conf ] T. T. Tran , R. Liu Gated direct sequence spread spectrum clocking scheme for multimedia systems. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:173-176 [Conf ] Xin Li , Xuan Zeng , Dian Zhou , Xieting Ling Wavelet method for high-speed clock tree simulation. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:177-180 [Conf ] Dae Woon Kang , Yong-Bin Kim Design flow of robust routed power distribution for low power ASIC. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:181-184 [Conf ] Yuping Yan , Zemin Liu Space-time blind adaptive multiuser detection in antenna array CDMA systems. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:185-188 [Conf ] K. Raju , Tapani Ristaniemi , Juha Karhunen , A. Oja Suppression of bit-pulsed jammer signals in DS-CDMA array system using independent component analysis. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:189-192 [Conf ] Shiunn-Jang Chern , Chung-Yao Chang , Hsiao-Chen Liu Multiuser wavelet based MC-CDMA receiver with linearly constrained constant modulus IQRD-RLS algorithm. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:193-196 [Conf ] Khurram Waheed , Fathi M. Salam State space blind source recovery for mixtures of multiple source distributions. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:197-200 [Conf ] Anisoara Paraschiv-Ionescu , Christian Jutten , Kamiar Aminian , Bijan Najafi , Philippe Robert Wavelet denoising for highly noisy source separation. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:201-204 [Conf ] Salvatore Bellofiore , Jeffrey A. Foutz , R. Govindarajula , Israfil Bahceci , Constantine A. Balanis , Andreas S. Spanias , Jeffrey M. Capone , Tolga M. Duman Adaptive antenna systems for mobile ad-hoc networks. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:205-208 [Conf ] Xiaojun Wu , Qinye Yin , Ke Deng Channel identification scheme for modified MC-CDMA systems with the mixing model of replicating and serial-to-parallel converting. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:209-212 [Conf ] Xiaojun Wu , Qinye Yin , Jianguo Zhang Subspace-based estimation method of uplink FIR channel in MC-CDMA system without cyclic prefix over frequency-selective fading channel. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:213-216 [Conf ] Yuanbin Guo , Joseph R. Cavallaro Post-compensation of RF non-linearity in mobile OFDM systems by estimation of memory-less polynomial. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:217-220 [Conf ] Mauro Forti , Luca Pancioni , Santina Rocchi , Valerio Vignoli Accurate CMOS implementation of PWL CNN neuron activations. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:221-224 [Conf ] Hyongsuk Kim , Tamás Roska , Leon O. Chua , F. Werblin Initiation and tracking of dim target via fusion of feature probabilities with CNN-UM. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:225-228 [Conf ] Marco Gilli , Mario Biey , Pier Paolo Civalleri On the existence of stable equilibrium points in cellular neural networks. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:229-232 [Conf ] S. Itakura , Y. Tanji , T. Otake , M. Tanaka Progressive image reconstruction via cellular neural networks. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:233-236 [Conf ] N. Takahashi , T. Otake , M. Tanaka The template optimization of discrete time CNN for image compression and reconstruction. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:237-240 [Conf ] Guisheng Zhai , Bo Hu , Ye Sun , Anthony N. Michel Analysis of time-controlled switched systems using stability preserving mappings. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:241-244 [Conf ] A. Molchanov , Derong Liu Criteria for asymptotic stability of a class of discrete systems with multiple independent variables. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:245-248 [Conf ] Guisheng Zhai , Xinkai Chen Stabilizing linear time-invariant systems with finite-state hybrid static output feedback. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:249-252 [Conf ] Irwin W. Sandberg Stability and linearization: discrete-time systems. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:253-256 [Conf ] P. van der Kloet , F. L. Neerhoff The Cauchy-Floquet factorization by successive Riccati transformations. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:257-260 [Conf ] Yingtao Jiang , Yiyan Tang , Yuke Wang , M. N. S. Swamy A trace-back-free Viterbi decoder using a new survival path management algorithm. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:261-264 [Conf ] Lukusa D. Kabulepa , Alberto García Ortiz , Manfred Glesner Power reduction techniques for an OFDM burst synchronization core. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:265-268 [Conf ] Kiyong Choi , David J. Allstot , Sayfe Kiaei Parasitic-aware synthesis of RF CMOS switching power amplifiers. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:269-272 [Conf ] Robert J. Marks II , Arindam Kumar Das , Mohamed A. El-Sharkawi , Payman Arabshahi , Andrew Gray Minimum power broadcast trees for wireless networks: optimizing using the viability lemma. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:273-276 [Conf ] Mahmoud Elassal , Magdy Bayoumi Low power SOVA architecture using bi-directional scheme. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:277-280 [Conf ] Robert J. Marks II , S. Narayanan Interpolation of discrete periodic nonuniform decimation using alias unraveling. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:281-284 [Conf ] T. W. Fox , L. E. Turner Low coefficient complexity approximations of the one dimensional discrete cosine transform. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:285-288 [Conf ] T. Hinamoto , S. Yamamoto Error spectrum shaping in closed-loop systems with state-estimate feedback controller. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:289-292 [Conf ] Alberto Bellini , Eraldo Carpanoni , Giacomo Frassi , Monica Tesauri , Emanuele Ugolotti Design of a DSP-based 24 bit digital audio equalizer for automotive applications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:293-296 [Conf ] Süleyman Sirri Demirsoy , Andrew G. Dempster , Izzet Kale Power analysis of multiplier blocks. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:297-300 [Conf ] P. K. Chan , J. C. Tao A high-bandwidth high-swing CMOS power amplifier for portable audio players. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:301-304 [Conf ] Jaime Ramírez-Angulo , Antonio B. Torralba , Ramón González Carvajal Comparison of two schemes for continuous-time sub-volt op-amp operation. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:305-308 [Conf ] Dingtzay Chen , Hongchin Lin An 1 V rail-rail low-power CMOS op-amp. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:309-312 [Conf ] Bradley A. Minch Inverting the bipolar differential pair for low-voltage applications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:313-316 [Conf ] L. S. Y. Wong 1.8 V low voltage pseudo-differential input operational amplifier. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:317-320 [Conf ] Walter Aloisi , Gianluca Giustolisi , Gaetano Palumbo Analysis and optimization of gain-boosted telescopic amplifiers. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:321-324 [Conf ] L. Bouzerara , M. T. Belaroussi Low-voltage, low-power and high gain CMOS operational transconductance amplifier. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:325-328 [Conf ] T. Sato , S. Takagi , N. Fujii Rail-to-rail OTA using a pair of single channel type MOSFETs. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:329-332 [Conf ] W. Rajan , Quek Boon Seah , Pan Yu Fei A reliable 5V OTA in 3.3V CMOS technology. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:333-336 [Conf ] Aimin Xu , M. F. Li A 1.2 V rail-to-rail differential mode input linear CMOS transconductor. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:337-340 [Conf ] Chih-Hung Lee , Yi-Lin Hsieh , Hui-Chun Lee , Tsai-Ming Hsieh Sequence-pair based placement with boundary constraints. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:341-344 [Conf ] Lihong Zhang , Ulrich Kleine A genetic approach to analog module placement with simulated annealing. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:345-348 [Conf ] S. Dhamdhere , Ningyu Zhou , Ting-Chi Wang Module placement with pre-placed modules using the corner block list representation. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:349-352 [Conf ] Shih-Hsu Huang , Chu-Liao Wang An effective floorplan-based power distribution network design methodology under reliability constraints. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:353-356 [Conf ] Roy Mader , Eby G. Friedman , Ami Litman , Ivan S. Kourtev Large scale clock skew scheduling techniques for improved reliability of digital synchronous VLSI circuits. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:357-360 [Conf ] Yinzhe Yu , Anup Basu , Irene Cheng Optimal adaptive bandwidth monitoring for QoS based retrieval. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:361-364 [Conf ] Jie Chen , K. J. Ray Liu Joint source-channel content-based multistream video coding scheme. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:365-368 [Conf ] Tero Kangas , Kimmo Kuusilinna , Timo Hämäläinen TDMA-based communication scheduling in system-on-chip video encoder. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:369-372 [Conf ] Zhi Shi , C. C. Jay Kuo Recursive patching for video-on-demand (VOD) systems with limited client buffer constraint. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:373-376 [Conf ] Wuttipong Kumwilaisak , C. C. Jay Kuo Dynamic throughput estimation for wireless multimedia transmission. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:377-380 [Conf ] Oleh V. Maevsky , D. J. Kinniment , Alexandre Yakovlev , Alexandre V. Bystrov Analysis of the oscillation problem in tri-flops. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:381-384 [Conf ] Mario di Bernardo , Francesco Vasca , Luigi Iannelli Experimental detection of bifurcations and sliding in DC-DC power converters. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:385-388 [Conf ] Shigeki Tsuji , Tetsushi Ueta , Hiroshi Kawakami , Kazuyuki Aihara An advanced design method of bursting in Fitzhugh-Nagumo model. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:389-392 [Conf ] Xiuming Shan , Yulong Liu , Hao Lin , Yong Ren Performance analysis in chaotic-iteration-based ADCs. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:393-396 [Conf ] M. Cifici , D. B. Williams An optimal estimation algorithm for multiuser chaotic communications systems. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:397-400 [Conf ] Tian-Bo Deng Optimal design and parallel implementation of FIR filters with variable magnitude and fractional-delay responses. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:401-404 [Conf ] N. Aikawa , M. Sato A design method of low delay lowpass FIR filters with maximally flat characteristics in the passband and the transmission zeros in the stopband. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:405-408 [Conf ] W.-S. Lu Minimax design of nonlinear-phase FIR filters: a least-pth approach. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:409-412 [Conf ] Agnieszka Rowinska-Schwarzweller , Markus Wintermantel On designing FIR filters using windows based on Gegenbauer polynomials. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:413-416 [Conf ] Herng-Jer Lee , Chia-Chi Chu , Wu-Shiung Feng Intelligent multipoint Arnoldi (IMA) approximations of FIR filters by low-order linear-phase IIR filters. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:417-420 [Conf ] Hun-Chen Chen , Jiun-In Guo , Chein-Wei Jen A new group distributed arithmetic design for the one dimensional discrete Fourier transform. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:421-424 [Conf ] A. Abbas , A. Ahmed , Waheed Uz Zaman Bajwa , A. Anwar , S. Abbasi A retargetable tool-suite for the design of application specific instruction set processors using a machine description language. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:425-428 [Conf ] O. Betat , L. Carro Comparison of digital linearization methods for embedded sensor interfaces. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:429-432 [Conf ] Wei-Ping Zhu , M. Omair Ahmad , M. N. S. Swamy ASIC implementation architecture for pulse shaping FIR filters in 3G mobile communications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:433-436 [Conf ] Jörn Ostermann , Jürgen Rurainsky , Reha Civanlar Real-time streaming for the animation of talking faces in multiuser environments. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:437-440 [Conf ] Hsu-Feng Hsiao , Qiang Liu , Jenq-Neng Hwang Layered video over IP networks by using selective drop routers. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:441-444 [Conf ] Raj Kumar Rajendran , Mihaela van der Schaar , Shih-Fu Chang FGS+: optimizing the joint SNR-temporal video quality in MPEG-4 fine grained scalable coding. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:445-448 [Conf ] E. Khan , M. Ghanbari Video coding with virtual set partitioning in hierarchical tree. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:449-452 [Conf ] Jérôme Vieron , Thierry Turletti , Xavier Henocq , Christine Guillemot , Kavé Salamatian TCP-compatible rate control for FGS layered multicast video transmission based on a clustering algorithm. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:453-456 [Conf ] Hwang-Cherng Chow , I-Chyn Wey A 3.3 V 1 GHz high speed pipelined Booth multiplier. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:457-460 [Conf ] Youngjoon Kim , Ki-Hyuk Sung , Lee-Sup Kim A 1.67 GHz 32-bit pipelined carry-select adder using the complementary scheme. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:461-464 [Conf ] Jiangmin Gu , Chip-Hong Chang , Kiat-Seng Yeo An interconnect optimized floorplanning of a scalar product macrocell. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:465-468 [Conf ] Peter Celinski , Said F. Al-Sarawi , Derek Abbott , J. F. Lopez Low depth carry lookahead addition using charge recycling threshold logic. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:469-472 [Conf ] Gunok Jung , V. A. Sundarajan , Gerald E. Sobelman A robust self-resetting CMOS 32-bit parallel adder. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:473-476 [Conf ] Arkadiy Morgenshtein , Alexander Fish , Israel A. Wagner Gate-diffusion input (GDI) - a technique for low power design of digital circuits: analysis and characterization. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:477-480 [Conf ] S. H. Tadas , C. Chakrabarti Architectural approaches to reduce leakage energy in caches. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:481-484 [Conf ] Vesa Lahtinen , Kimmo Kuusilinna , Timo Hämäläinen Optimizing finite state machines for system-on-chip communication. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:485-488 [Conf ] Zhijun Huang , Milos D. Ercegovac Two-dimensional signal gating for low-power array multiplier design. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:489-492 [Conf ] M. Kontiala , A. Heinonen , J. Nurmi Low-power methodology issues in digital circuit design. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:493-496 [Conf ] Mahbub Hasan , David R. Allee , M. Kabir , K. Rahman A 15-bit CMOS cyclic A/D converter with correlated double sampling. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:497-500 [Conf ] Bardia Pishdad , Gordon W. Roberts A 10-bit 1 MS/s 3-step ADC with bitstream-based sub-DAC and sub-ADC calibration. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:501-504 [Conf ] H. Imamura , Toshimichi Saito , Hiroyuki Torikai An analog-to-digital converter with time-variant window. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:505-508 [Conf ] Antti Mäntyniemi , Timo Rahkonen , Juha Kostamovaara A nonlinearity-corrected CMOS time digitizer IC with 20 ps single-shot precision. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:513-516 [Conf ] C. Hill , Yichuang Sun , Hsiao Wei Su Single-amplifier integrator-based low power CMOS filter for video frequency applications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:517-520 [Conf ] Peter Kiss , Vladimir I. Prodanov , J. Glas Complex low-pass filters. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:525-528 [Conf ] L. Durkalec , L. Sundstrom , T. Mattsson Properties of RF bandpass amplifier topology with Q-enhancing. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:529-532 [Conf ] Jarkko Jussila , Kari Halonen WCDMA channel selection filter with high IIP2. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:533-536 [Conf ] J. Harrison , Neil Weste A limitation on active filter dynamic range. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:537-540 [Conf ] C. A. Corral Nomographs and classical filter sensitivity optimization. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:541-544 [Conf ] Irwin W. Sandberg Continuous-time linear systems: folklore and fact. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:545-548 [Conf ] Fei Yuan Statistical analysis of switched linear networks. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:549-552 [Conf ] Antonino M. Sommariva A maximum power transfer theorem for DC linear two-ports. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:553-556 [Conf ] Jean Michel Portal , L. Forli , Didier Née Floating-gate EEPROM cell: threshold voltage sensibility to geometry. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:557-560 [Conf ] Gianluca Giustolisi , Gaetano Palumbo Analysis of power supply noise attenuation in a PTAT current source. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:561-564 [Conf ] Wei Sun , Richard M. M. Chen , Yao-Lin Jiang Tolerance analysis for electronic circuit design using the method of moments. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:565-568 [Conf ] Eugenio Culurciello , Andreas G. Andreou , Philippe O. Pouliquen Modeling hot-electrons effects in silicon-on-sapphire MOSFETs. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:569-572 [Conf ] Barbara Cannas , Alessandra Fanni , F. Maradei A neural network approach to predict the crosstalk in non-uniform multiconductor transmission lines. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:573-576 [Conf ] Kartik Mohanram , C. V. Krishna , Nur A. Touba A methodology for automated insertion of concurrent error detection hardware in synthesizable Verilog RTL. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:577-580 [Conf ] Sule Ozev , Alex Orailoglu , Hosam Haggag Automated test development and test time reduction for RF subsystems. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:581-584 [Conf ] D. A. Nassar , A. E. Salama A heuristic DSP BIST insertion algorithm with minimum area overhead. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:585-588 [Conf ] Diego Vázquez , Gloria Huertas , Gildas Leger , Adoración Rueda , José L. Huertas Practical solutions for the application of the oscillation-based-test in analog integrated circuits. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:589-592 [Conf ] Srdjan Dragic , Igor M. Filanovsky , Martin Margala Low-voltage analog current detector supporting at-speed BIST. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:593-596 [Conf ] Xiaomin Chen , S. Kiaei Monocycle shapes for ultra wideband system. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:597-600 [Conf ] Aigang Feng , Qinye Yin , Jianguo Zhang , Zheng Zhao Joint space-multipath-Doppler RAKE receiving in DS-CDMA systems over time-selective fading channels. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:601-604 [Conf ] Yoshihiro Ohtani , N. Kawahara , T. Tomaru , K. Maruyama , K. Onoye , Isao Shirakawa , Toru Chiba Error correction block based ARQ protocol for wireless digital video transmission. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:605-608 [Conf ] I. A. Al-Mohandes , M. L. Elmasry Iteration reduction of turbo decoders using an efficient stopping/cancellation technique. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:609-612 [Conf ] Kang Shao-li , Qiu Zheng-ding , Xiao Yang , Li Shi-he Performance of active codes detection algorithms for the downlink of TD-SCDMA system. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:613-616 [Conf ] Pedro Julián , Radu Dogaru , M. Haenggi , Leon O. Chua A search algorithm for the design of multinested cellular neural networks. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:617-620 [Conf ] Mika Laiho , Ari Paasio , Asko Kananen , Kari Halonen Cell and network level design of a mixed-mode CNN. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:621-624 [Conf ] Ertugrul Saatci , Vedat Tavsanoglu On the optimal choice of integration time-step for raster simulation of a CNN for gray level image processing. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:625-628 [Conf ] Chung-Yu Wu , Jui-Lin Lai Improvement of pattern learning and recognition capability in ratio-memory cellular neural networks with non-discrete-type Hebbian learning algorithm. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:629-632 [Conf ] T. Nishi , H. Sato , N. Takahashi Necessary and sufficient conditions for one-dimensional discrete-time binary cellular neural networks with both A- and B-templates to be stable. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:633-636 [Conf ] Irwin W. Sandberg , G. J. J. Van Zyl Harmonic balance and almost periodic inputs. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:637-640 [Conf ] Akio Ushida , Yoshihiro Yamagami , Yoshifumi Nishio Frequency response of nonlinear networks using curve tracing algorithm. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:641-644 [Conf ] Wanliang Ma , L. Trajkovic , Kartikeya Mayaram HomSSPICE: a homotopy-based circuit simulator for periodic steady-state analysis of oscillators. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:645-648 [Conf ] K. Yamamura , H. Hyodo Tolerance analysis of nonlinear circuits using set-valued functions. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:649-652 [Conf ] T. Hisakado , T. Nishimura , K. Okumura Hardware implementation of Moore test on FPGA. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:653-656 [Conf ] Sazzadur Chowdhury , Majid Ahmadi , Graham A. Jullien , William C. Miller A MEMS socket system for high density SoC interconnection. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:657-660 [Conf ] Matthew A. Clapp , Ralph Etienne-Cummings Ultrasonic bearing estimation using a MEMS microphone array and spatiotemporal filters. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:661-664 [Conf ] Jennifer Blain Christen , C. E. Davis , Min Li , Andreas G. Andreou Design, double sided post-processing, and packaging of CMOS compatible bio-MEMS device arrays. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:665-668 [Conf ] S. Murthi , S. Sankaranarayanan , Bo Xia , J. J. Rodriguez , D. W. Galbraith Improved data acquisition system for digital flow cytometry. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:669-672 [Conf ] R. Chebli , Abdallah Kassem , Mohamad Sawan Logarithmic programmable preamplifier dedicated to ultrasonic receivers. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:673-676 [Conf ] A. Celani , S. Bartoloni , Aurelio Uncini , Francesco Piazza A multirate approach to multichannel blind deconvolution. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:677-680 [Conf ] Yuping Yan , Zemin Liu A new blind signature waveform estimation approach in antenna array CDMA systems. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:681-684 [Conf ] Simone Fiori , Pietro Burrascano Blind electromagnetic source separation and localization. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:685-688 [Conf ] Zheng Zhao , Qinye Yin , Aigang Feng , Xiaojun Wu Reduced-dimension multiuser detection based on grouping users and reducing effective length of spread spectrum code in CDMA systems. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:689-692 [Conf ] S. C. Chan , C. K. S. Pun On the design of digital broadband beamformer for uniform circular array with frequency invariant characteristics. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:693-696 [Conf ] Akshay Mishra , Sumitra Ganesh , Uday B. Desai Blind space-time multiuser detector. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:697-700 [Conf ] M. M. Amourah , Randall L. Geiger All digital transistor high gain operational amplifier using positive feedback technique. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:701-704 [Conf ] Amr A. Tammam , Khaled Hayatleh , F. J. Lidgey Novel high performance current-feedback op-amp. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:705-708 [Conf ] Kin-Pui Ho , Cheong-fat Chan , Chiu-sing Choy , Kong-Pang Pun A CMOS current feedback operational amplifier with active current mode compensation. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:709-712 [Conf ] S. Shah , S. Collins A temperature independent trimmable current source. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:713-716 [Conf ] Sebastien Laberge , Gordon W. Roberts Temperature compensated CMOS voltage reference. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:717-720 [Conf ] E. Yildiz , Arturo Sarmiento-Reyes , Chris J. M. Verhoeven , Arie van Staveren Determination of voltage source values in modern biasing techniques of analog circuits. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:721-724 [Conf ] M. T. Dastjerdi , Rahul Sarpeshkar A low-noise nonlinear feedback technique for compensating offset in analog multipliers. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:725-728 [Conf ] H. F. Hamed , F. A. Farg , M. S. A. El-Hakeem A new wideband BiCMOS four-quadrant analog multiplier. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:729-732 [Conf ] J. Lee , Khaled Hayatleh , F. J. Lidgey Modified Gilbert transconductance multiplier. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:733-736 [Conf ] Brent Maundy , Peter B. Aronhime Useful multipliers for low-voltage applications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:737-740 [Conf ] L. A. Sarmiento-Reyes , E. Yildiz , Chris J. M. Verhoeven , Arie van Staveren A CAD-oriented method for optimal biasing of amplifiers. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:741-744 [Conf ] J. Silva , N. Horta GENOM: circuit-level optimizer based on a modified genetic algorithm kernel. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:745-748 [Conf ] Fazrena A. Hamid , Tom J. Kazmierski Synthesis and optimization of analog VLSI filters from VHDL-AMS parse trees. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:749-752 [Conf ] G. Spagnuolo An interval arithmetic-based yield evaluation in circuit tolerance design. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:753-756 [Conf ] Gülin Tulunay , Günhan Dündar , A. Ataman A new approach to modeling statistical variations in MOS transistors. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:757-760 [Conf ] C. S. Lim , Saman S. Abeysekera , T. Srikanthan , S. K. Amarasinghe Multiple sequence families with efficient hardware architecture for use in spread spectrum watermarking. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:761-764 [Conf ] Kishore Andra , Chaitali Chakrabarti , Tinku Acharya A high performance JPEG2000 architecture. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:765-768 [Conf ] Ju-Ho Sohn , Ramchan Woo , Hoi-Jun Yoo Optimization of portable system architecture for real-time 3D graphics. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:769-772 [Conf ] Jen-Shiun Chiang , Yu-Sen Lin , Chang-Yo Hsieh Efficient pass-parallel architecture for EBCOT in JPEG2000. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:773-776 [Conf ] Kibum Suh , Seongmo Park , Seongmin Kim , Bontae Koo , Igkyun Kim , Kyungsoo Kim , HanJin Cho An efficient architecture of DCTQ module in MPEG-4 video codec. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:777-780 [Conf ] Somchart Chokchaitam , Masahiro Iwahashi Lossless, near-lossless and lossy adaptive coding based on the lossless DCT. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:781-784 [Conf ] Hongjian Shi , R. Ward Canny edge based image expansion. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:785-788 [Conf ] Kwok-Wai Cheung , Lai-Man Po Lossless wavelet image coding using layered coefficient partitioning. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:789-792 [Conf ] Kam-Fai Chan , Kam-Tim Woo , Chi-Wah Kok Vector quantization fast search algorithm using hyperplane based k-dimensional multi-node search tree. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:793-796 [Conf ] Zhibin Pan , Koji Kotani , Tadahiro Ohmi A hierarchical fast encoding algorithm for vector quantization with PSNR equivalent to full search. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:797-800 [Conf ] J. Davila Design of two-dimensional cosine-modulated oversampled FIR filter banks: PR condition. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:801-804 [Conf ] A. Wenzler , S. Steinlechner Nonlinear processing of n-dimensional phase signals. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:805-808 [Conf ] R. Ito , T. Fujie , K. Suyama , R. Hirabayashi New design methods of FIR filters with signed power of two coefficients based on a new linear programming relaxation with triangle inequalities. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:813-816 [Conf ] J. Davila Results on a class of biorthogonal 2-D LP FIR filter banks. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:817-820 [Conf ] Robert Bregovic , Tapio Saramäki An efficient approach for designing nearly perfect-reconstruction low-delay cosine-modulated filter banks. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:825-828 [Conf ] Saed Samadi , Akinori Nishihara , M. Omair Ahmad , M. N. S. Swamy Step-response-based characterization of nonuniform perfect-reconstruction filter banks. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:829-832 [Conf ] Ari Viholainen , T. H. Stitz , Juuso Alhava , Tero Ihalainen , Markku Renfors Complex modulated critically sampled filter banks based on cosine and sine modulation. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:833-836 [Conf ] See-May Phoong , Yuan-Pei Lin Application of unimodular matrices to signal compression. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:837-840 [Conf ] Shengli Zhou , Pengfei Xia , Geert Leus , Georgios B. Giannakis Chip-interleaved block-spread CDMA for the downlink with inter-cell interference and soft hand-off. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:841-844 [Conf ] J. Miguez , P. M. Djuric Blind equalization by sequential importance sampling. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:845-848 [Conf ] T. A. Drumright , Zhi Ding A new algorithm for QAM signal classification in AWGN channels. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:849-852 [Conf ] Weilin Luo , Jitendra K. Tugnait Further results on blind equalization and estimation of SIMO time-varying channels. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:853-856 [Conf ] M. Hayajneh , A. Scaglione Space-time codes for high bit rate wireless communications: asymptotic performance of space-time random codes. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:857-860 [Conf ] Akbar M. Sayeed MIMO wireless channels made simple. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:861-864 [Conf ] Kwen-Siong Chong , Bah-Hwee Gwee , Joseph Sylvester Chang Low-voltage micropower asynchronous multiplier for hearing instruments. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:865-868 [Conf ] Sung-Won Lee , In-Cheol Park Low cost floating-point unit design for audio applications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:869-872 [Conf ] Kwen-Siong Chong , Bah-Hwee Gwee , Joseph Sylvester Chang Low-voltage asynchronous adders for low power and high speed applications. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:873-876 [Conf ] Yngvar Berg , Snorre Aunet , Øivind Næss , O. Hagen , Mats Høvin A novel floating-gate multiple-valued CMOS full-adder. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:877-880 [Conf ] Turgay Temel , Avni Morgul Multi-valued logic function implementation with novel current-mode logic gates. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:881-884 [Conf ] Yannick Saouter , Claude Berrou Fast soft-output Viterbi decoding for duo-binary turbo codes. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:885-888 [Conf ] Gunok Jung , Jun Jin Kong , Gerald E. Sobelman , Keshab K. Parhi High-speed add-compare-select units using locally self-resetting CMOS. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:889-892 [Conf ] O. Gay-Bellile , X. Marchal , G. Burns , K. Vaidyanathan A reconfigurable superimposed 2D-mesh array for channel equalization. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:893-896 [Conf ] Michael J. Thul , Norbert Wehn , L. P. Rao Enabling high-speed turbo-decoding through concurrent interleaving. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:897-900 [Conf ] Zhipei Chi , Keshab K. Parhi High speed VLSI architecture design for block turbo decoder. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:901-904 [Conf ] G. Bernardinis , Piero Malcovati , Franco Maloberti , E. Soenen Dynamic stage matching for parallel pipeline A/D converters. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:905-908 [Conf ] Jipeng Li , Un-Ku Moon High-speed pipelined A/D converter using time-shifted CDS technique. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:909-912 [Conf ] S. Mathur , M. Das , Preetam Tadeparthy , S. Ray , S. Mukherjee , B. L. Dinakaran A 115mW 12-bit 50 MSPS pipelined ADC. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:913-916 [Conf ] Runhua Sun , Lihua Peng A pipelined A/D converter for high-speed and high-resolution application. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:917-920 [Conf ] B. Vaz , Nuno F. Paulino , João Goes , R. Costa , Romero Tavares , Adolfo Steiger-Garção Design of low-voltage CMOS pipelined ADCs using 1 pico-Joule of energy per conversion. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2002, pp:921-924 [Conf ]