Conferences in DBLP
Hoi-Kok Cheung , Wan-Chi Siu Fast global motion estimation for sprite generation. [Citation Graph (0, 0)][DBLP ] Conf ] Wing Cheong Chan , Oscar C. Au , Ming Fai Fu A novel predictive global motion estimation for video coding. [Citation Graph (0, 0)][DBLP ] Conf ] Zhibo Chen , Cheng Du , Jinghua Wang , Yun He PPFPS - a paraboloid prediction based fractional pixel search strategy for H.26L. [Citation Graph (0, 0)][DBLP ] Conf ] Ming Fai Fu , Oscar C. Au , Wing Cheong Chan Low-band-shift (LBS) motion estimation with symmetric padding in wavelet domain. [Citation Graph (0, 0)][DBLP ] Conf ] Qilian Liang Link adaptation and receiver design for enhanced General Packet Radio Services wireless networks. [Citation Graph (0, 0)][DBLP ] Conf ] Qilian Liang Bandwidth utilization and signal strength-based handover initiation in mobile multimedia cellular networks. [Citation Graph (0, 0)][DBLP ] Conf ] J. Zhang , Kamal Premaratne , Peter H. Bauer Local resource management of distributed sensor networks via static output feedback control. [Citation Graph (0, 0)][DBLP ] Conf ] Panu Hämäläinen , Marko Hännikäinen , Markku Niemi , Timo Hämäläinen Performance evaluation of Secure Remote Password protocol. [Citation Graph (0, 0)][DBLP ] Conf ] T. Koide , T. Ishibashi , H. Watanabe Network optimization problem in tie-set flow vector space and information network resource management. [Citation Graph (0, 0)][DBLP ] Conf ] Shannon D. Blunt , Dominic K. C. Ho A novel sparse adaptive algorithm using wavelets. [Citation Graph (0, 0)][DBLP ] Conf ] K. Konishi , K. Okuyama , A. Kato , T. Furukawa Design method for optimal step size matrix of the affine projection algorithm using semidefinite programming. [Citation Graph (0, 0)][DBLP ] Conf ] Dominic K. C. Ho , Shannon D. Blunt Enhanced adaptive sparse algorithms using the Haar wavelet. [Citation Graph (0, 0)][DBLP ] Conf ] K. Okuyama , S. Yoshimoto , T. Furukawa New adaptive Kalman filters using filter bank. [Citation Graph (0, 0)][DBLP ] Conf ] E. V. Papoulis , T. Stathaki A transmultiplexer-based adaptive filtering structure using a new adaptation scheme. [Citation Graph (0, 0)][DBLP ] Conf ] M. Miyamura , Yoshifumi Nishio , Akio Ushida Clustering in globally coupled system of chaotic circuits. [Citation Graph (0, 0)][DBLP ] Conf ] S. Cincotti , A. Teglio Generalized synchronization on linear manifold in coupled nonlinear systems. [Citation Graph (0, 0)][DBLP ] Conf ] Vinay Varadan , Henry Leung Chaotic system reconstruction from noisy time series measurements using improved least squares genetic programming. [Citation Graph (0, 0)][DBLP ] Conf ] R. Tonelli , Leon O. Chua , F. Meloni Mapping atoms to nonlinear Chua's circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Han Jung Song , Kae-Dal Kwack CMOS circuit design and implementation of the discrete time chaotic chip. [Citation Graph (0, 0)][DBLP ] Conf ] Chih-Chun Tang , Chia-Hsin Wu , Kun-Hsien Li , Tai-Cheng Lee , Shen-Iuan Liu CMOS 2.4-GHz receiver front end with area-efficient inductors and digitally calibrated 90° delay network. [Citation Graph (0, 0)][DBLP ] Conf ] Luis Hernández , Susanna Patón A superregenerative receiver for phase and frequency modulated carriers. [Citation Graph (0, 0)][DBLP ] Conf ] K. Shu , Edgar Sánchez-Sinencio A 5-GHz prescaler using improved phase switching. [Citation Graph (0, 0)][DBLP ] Conf ] Kwang-Jin Koh , Yong-Sik Youn , Hyun-Kyu Yu A gain boosting method at RF frequency using active feedback and its application to RF variable gain amplifier (VGA). [Citation Graph (0, 0)][DBLP ] Conf ] Sabri Arik , Vedat Tavsanoglu On the global robust stability of delayed neural networks. [Citation Graph (0, 0)][DBLP ] Conf ] K. Jin'no Oscillatory hysteresis associative memory. [Citation Graph (0, 0)][DBLP ] Conf ] Victor M. Brea , David López Vilariño , Ari Paasio , Diego Cabello Implementation oriented theory design issues on the DTCNN template generation. [Citation Graph (0, 0)][DBLP ] Conf ] William Soares-Filho , José Manoel de Seixas , Luiz Pereira Calôba Enlarging neural class detection capacity in passive sonar systems. [Citation Graph (0, 0)][DBLP ] Conf ] Simone Fiori , Pietro Burrascano Nonsymmetric PDF approximation by artificial neurons: application to statistical characterization of reinforced composites. [Citation Graph (0, 0)][DBLP ] Conf ] Qun Gao , P. Messmer , George S. Moschytz Binary image rotation using cellular neural networks. [Citation Graph (0, 0)][DBLP ] Conf ] Yu-Yee Liow , Chung-Yu Wu The design of high-speed pipelined analog-to-digital converters using voltage-mode sampling and current mode processing techniques. [Citation Graph (0, 0)][DBLP ] Conf ] Z. Tao , M. Keramat A 10-bit 100-MS/s 50 mW CMOS A/D converter. [Citation Graph (0, 0)][DBLP ] Conf ] V. Srinivasan , S. K. Islam , G. T. Hendrickson A method for the estimation of aperture uncertainty in A-D converters. [Citation Graph (0, 0)][DBLP ] Conf ] J. Elbornsson , K. Folkesson , Jan-Erik Eklund Measurement verification of estimation method for time errors in a time-interleaved A/D converter system. [Citation Graph (0, 0)][DBLP ] Conf ] J. Talebzadeh , M. R. Hasanzadeh , Mohammad Yavari , Omid Shoaei A 10-bit 150-MS/s, parallel pipeline A/D converter in 0.6-µm CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] Hongwei Wang , Cheong-fat Chan , Chiu-sing Choy A 12-bit 80 Ms/s 110 mW floating analog-to-digital converter. [Citation Graph (0, 0)][DBLP ] Conf ] Weidong Guo , R. J. Huber , K. F. Smith A current steering CMOS folding amplifier. [Citation Graph (0, 0)][DBLP ] Conf ] Charles T. Peach , Waisiu Law , D. R. Beck , Ward J. Helms , David J. Allstot Matching considerations in I/Q A/D converter pairs. [Citation Graph (0, 0)][DBLP ] Conf ] Yonghua Cong , Randall L. Geiger Formulation of INL and DNL yield estimation in current-steering D/A converters. [Citation Graph (0, 0)][DBLP ] Conf ] Janusz A. Starzyk , D. Liu Locating stuck faults in analog circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Janusz A. Starzyk , D. Liu A decomposition method for analog fault location. [Citation Graph (0, 0)][DBLP ] Conf ] S. Cailotto , Alessandro Fin , Franco Fummi A fault tolerant incremental design methodology. [Citation Graph (0, 0)][DBLP ] Conf ] S. R. Meier , Mario Steinert , S. Buch Testability of path history memories with register-exchange architecture used in Viterbi-decoders. [Citation Graph (0, 0)][DBLP ] Conf ] Maurizio Martignano , Nicola Drago , Franco Fummi , Stefano Martini A combined approach to validate the design of embedded network devices. [Citation Graph (0, 0)][DBLP ] Conf ] Ye-Ming Li , J. Alvin Connelly Modeling a resonant LC tank circuit embedded in a VCO. [Citation Graph (0, 0)][DBLP ] Conf ] Y. Fouzar , Yvon Savaria , Mohamad Sawan A CMOS phase-locked loop with an auto-calibrated VCO. [Citation Graph (0, 0)][DBLP ] Conf ] H. Parthasarathy , Ghanshyam Nayak , Ponnathpur R. Mukund Analysis of VCO jitter in chip-package co-design. [Citation Graph (0, 0)][DBLP ] Conf ] Yonghui Tang , Randall L. Geiger Transient bit error rate analysis of data recovery systems using jitter models. [Citation Graph (0, 0)][DBLP ] Conf ] M. Jessa , M. Walentynowicz Discrete-time phase-locked loop as a source of random sequences with different distributions. [Citation Graph (0, 0)][DBLP ] Conf ] Julius Georgiou , Christofer Toumazou A resistorless low current reference circuit for implantable devices. [Citation Graph (0, 0)][DBLP ] Conf ] Dean A. Badillo 1.5V CMOS current reference with extended temperature operating range. [Citation Graph (0, 0)][DBLP ] Conf ] A. Bendali , Yvon Savaria Low-voltage bandgap reference with temperature compensation based on a threshold voltage technique. [Citation Graph (0, 0)][DBLP ] Conf ] A. Azarkan , Arie van Staveren , F. Fruett A low-noise bandgap reference voltage source with curvature correction. [Citation Graph (0, 0)][DBLP ] Conf ] Han-Seung Jung , Nam Ik Cho , Sang Uk Lee Image-adaptive watermarking based on warped discrete cosine transform. [Citation Graph (0, 0)][DBLP ] Conf ] Akio Miyazaki , A. Okamoto Analysis and improvement of correlation-based watermarking methods for digital images. [Citation Graph (0, 0)][DBLP ] Conf ] Shiwei Zhang , P. K. Rajan Independent component analysis of digital image watermarking. [Citation Graph (0, 0)][DBLP ] Conf ] Ya Jun Yu , Yong Ching Lim FRM based FIR filter design - the WLS approach. [Citation Graph (0, 0)][DBLP ] Conf ] Tapio Saramäki , Juha Yli-Kaakinen Optimization of frequency-response-masking based FIR filters with reduced complexity. [Citation Graph (0, 0)][DBLP ] Conf ] Sergio L. Netto , Paulo S. R. Diniz , Luiz C. R. de Barcellos Efficient implementation for cosine-modulated filter banks using the frequency response masking approach. [Citation Graph (0, 0)][DBLP ] Conf ] L. Svensson , H. Johansson Frequency response masking FIR filters with short delay. [Citation Graph (0, 0)][DBLP ] Conf ] Chun Zhu Yang , Yong Lian A modified structure for the design of sharp FIR filters using frequency response masking technique. [Citation Graph (0, 0)][DBLP ] Conf ] Say Wei Foo , Edwin Wei Thai Lee Transcription of polyphonic signals using fast filter bank. [Citation Graph (0, 0)][DBLP ] Conf ] G. R. Chaji , Seid Mehdi Fakhraie , K. C. Smith Pseudo dynamic logic (SDL): a high-speed and low-power dynamic logic family. [Citation Graph (0, 0)][DBLP ] Conf ] Massimo Alioto , Gaetano Palumbo Power-delay trade-offs in SCL gates. [Citation Graph (0, 0)][DBLP ] Conf ] Hong-Yi Huang , Jing-Fu Lin CMOS bulk input technique. [Citation Graph (0, 0)][DBLP ] Conf ] R. Rafati , A. Z. Charaki , G. R. Chaji , Seid Mehdi Fakhraie , K. C. Smith Comparison of a 17 b multiplier in Dual-rail domino and in Dual-rail D3 L (D4 L) logic styles. [Citation Graph (0, 0)][DBLP ] Conf ] Rouwaida Kanj , Elyse Rosenbaum A critical look at design guidelines for SOI logic gates. [Citation Graph (0, 0)][DBLP ] Conf ] Frank Livingston , Vikram Chandrasekhar , M. Vaya , Joseph R. Cavallaro Handset detector architectures for DS-CDMA wireless systems. [Citation Graph (0, 0)][DBLP ] Conf ] Yoshihiro Uchida , M. Ise , Takao Onoye , Isao Shirakawa , Itthichai Arungsrisangchai VLSI architecture of digital matched filter and prime interleaver for W-CDMA. [Citation Graph (0, 0)][DBLP ] Conf ] Kwan-wai Wong , Chi-Ying Tsui , R. S.-K. Cheng , Wai Ho Mow A VLSI architecture of a K-best lattice decoding algorithm for MIMO channels. [Citation Graph (0, 0)][DBLP ] Conf ] A. Perez-Pascual , T. Sansaloni , J. Valls FPGA-based radix-4 butterflies for HIPERLAN/2. [Citation Graph (0, 0)][DBLP ] Conf ] Byung S. Son , Byung G. Jo , Myung Hoon Sunwoo , Yong Serk Kim A high-speed FFT processor for OFDM systems. [Citation Graph (0, 0)][DBLP ] Conf ] Anas A. Hamoui , K. Martin Linearity enhancement of multibit Delta-Sigma modulators using pseudo data-weighted averaging. [Citation Graph (0, 0)][DBLP ] Conf ] N. A. Fraser , Behrouz Nowrouzian A novel technique to estimate the statistical properties of Sigma-Delta A/D converters for the investigation of DC stability. [Citation Graph (0, 0)][DBLP ] Conf ] Lourans Samid , Maurits Ortmanns , Yiannos Manoli , Friedel Gerfers A new kind of low-power multibit third order continuous-time lowpass Sigma-Delta modulator. [Citation Graph (0, 0)][DBLP ] Conf ] Fausto Borghetti , A. Esposito , Umberto Gatti , Piero Malcovati , Franco Maloberti BiCMOS switched buffers resonator for a 320 MHz 2-path sigma-delta modulator. [Citation Graph (0, 0)][DBLP ] Conf ] Rocio del Río , F. Medeiro , José Manuel de la Rosa , Maria Belen Pérez-Verdú , Ángel Rodríguez-Vázquez A 2.5-V Sigma-Delta modulator in 0.25-µm CMOS for ADSL. [Citation Graph (0, 0)][DBLP ] Conf ] G. Palaskas , Yannis P. Tsividis Design considerations and experimental evaluation of a syllabic companding audio frequency filter. [Citation Graph (0, 0)][DBLP ] Conf ] A. E. J. Ng , John I. Sewell Direct noise analysis of log-domain filters. [Citation Graph (0, 0)][DBLP ] Conf ] Sandro A. P. Haddad , Wouter A. Serdijn High-frequency dynamic translinear and log-domain circuits in CMOS technology. [Citation Graph (0, 0)][DBLP ] Conf ] Esther Rodríguez-Villegas , Adoración Rueda , Alberto Yufera A micropower log domain FGMOS filter. [Citation Graph (0, 0)][DBLP ] Conf ] E. J. McDonald , Bradley A. Minch Synthesis of a translinear analog adaptive filter. [Citation Graph (0, 0)][DBLP ] Conf ] Qiang Luo , John G. Harris A novel integration of on-sensor wavelet compression for a CMOS imager. [Citation Graph (0, 0)][DBLP ] Conf ] R. A. Blum , Charles S. Wilson , Paul E. Hasler , Stephen P. DeWeerth A CMOS imager with real-time frame differencing and centroid computation. [Citation Graph (0, 0)][DBLP ] Conf ] H. Kimura , T. Shibata A motion-based analog VLSI saliency detector using quasi-two-dimensional hardware algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Paul E. Hasler , Abhishek Bandyopadhyay , Paul D. Smith A matrix transform imager allowing high-fill factor. [Citation Graph (0, 0)][DBLP ] Conf ] Gustavo Liñan Cembrano , Servando Espejo-Meana , Rafael Domínguez-Castro , Ángel Rodríguez-Vázquez A processing element architecture for high-density focal plane analog programmable array processors. [Citation Graph (0, 0)][DBLP ] Conf ] Alfred Fettweis , Nirmal K. Bose A property of Jacobian matrices and some of its consequences. [Citation Graph (0, 0)][DBLP ] Conf ] S. Basu On spectral factorization in two-dimensions. [Citation Graph (0, 0)][DBLP ] Conf ] W.-S. Lu , A. Antoniou Minimax design of 2-D IIR digital filters using sequential semidefinite programming. [Citation Graph (0, 0)][DBLP ] Conf ] Anastasios N. Venetsanopoulos , Konstantinos N. Plataniotis , Marek Szczepanski , Bogdan Smolka On the geodesic paths approach to multichannel signal processing. [Citation Graph (0, 0)][DBLP ] Conf ] Alfred Fettweis Improved wave-digital approach to numerically integrating the PDES of fluid dynamics. [Citation Graph (0, 0)][DBLP ] Conf ] Terry Tao Ye , Samit Chaudhuri , F. Huang , Hamid Savoj , Giovanni De Micheli Physical synthesis for ASIC datapath circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Delong Shang , Fei Xia , Alexandre Yakovlev Asynchronous circuit synthesis via direct translation. [Citation Graph (0, 0)][DBLP ] Conf ] H. Yoshida , H. Yamaoka , M. Ikeda , K. Asada Logic synthesis for PLA with 2-input logic elements. [Citation Graph (0, 0)][DBLP ] Conf ] Susanto Rahardja , Bogdan J. Falkowski Polynomial expansions over GF(2) based on fastest transformation. [Citation Graph (0, 0)][DBLP ] Conf ] Bogdan J. Falkowski , Radomir S. Stankovic , Dragan Jankovic Circuit design from minimized Haar wavelet series. [Citation Graph (0, 0)][DBLP ] Conf ] Xiaoyan Sun , Feng Wu , Shipeng Li , Wen Gao , Ya-Qin Zhang Seamless switching of scalable video bitstreams for efficient streaming. [Citation Graph (0, 0)][DBLP ] Conf ] Kai-Tat Fung , Wan-Chi Siu , Yui-Lam Chan A dynamic frame-skipping video combiner for multipoint video conferencing. [Citation Graph (0, 0)][DBLP ] Conf ] Hao Wang , Guobin Shen , Shipeng Li , Yuzhuo Zhong Efficient error recovery techniques in a novel multimedia streaming framework with peer-paired collaboration. [Citation Graph (0, 0)][DBLP ] Conf ] Zhi-Wei Gao , Wen-Nung Lie MPEG-4 video error detection by using data hiding techniques. [Citation Graph (0, 0)][DBLP ] Conf ] Hsiang-Chun Huang , Chung-Neng Wang , Tihao Chiang A robust fine granularity scalability using trellis based predictive leak. [Citation Graph (0, 0)][DBLP ] Conf ] Toshimichi Saito , M. Yoshizawa , Hiroyuki Torikai , S. Tazaki Analysis of interleaved converters with WTA-based switching. [Citation Graph (0, 0)][DBLP ] Conf ] Yefim Berkovich , Adrian Ioinovici Analysis and design of PWM regulators for large-signal stability. [Citation Graph (0, 0)][DBLP ] Conf ] Tadashi Suetsugu , Marian K. Kazimierczuk A method for predicting the ZVS condition for the class E amplifier. [Citation Graph (0, 0)][DBLP ] Conf ] M. Ogawa Magnetizing inrush current of a transformer and a new technique of its computation. [Citation Graph (0, 0)][DBLP ] Conf ] Somchart Chokchaitam , Masahiro Iwahashi Lossless/lossy image compression based on non-separable two-dimensional L-SSKF. [Citation Graph (0, 0)][DBLP ] Conf ] Wei Dai , Trac D. Tran , Soontorn Oraintara , Truong Q. Nguyen Integer- and rational-coefficient M-band wavelet. [Citation Graph (0, 0)][DBLP ] Conf ] Cheong Yiu Fung , S. C. Chan A multistage filterbank-based channelizer and its multiplier-less realization. [Citation Graph (0, 0)][DBLP ] Conf ] Soontorn Oraintara The unified discrete Fourier-Hartley transforms: theory and structure. [Citation Graph (0, 0)][DBLP ] Conf ] Min Li , Chi-Wah Kok Linear phase IIR filter bank design by LMI based Hinfinity optimization. [Citation Graph (0, 0)][DBLP ] Conf ] J. Bhattacharjee , D. Mukherjee , J. Laskar A monolithic CMOS VCO for wireless LAN applications. [Citation Graph (0, 0)][DBLP ] Conf ] Yan Wang , Hing Mo Lam , Chi-Ying Tsui , Roger S. Cheng , Wai Ho Mow Low complexity OFDM receiver using Log-FFT for coded OFDM system. [Citation Graph (0, 0)][DBLP ] Conf ] Lukusa D. Kabulepa , Alberto García Ortiz , Manfred Glesner Design of an efficient OFDM burst synchronization scheme. [Citation Graph (0, 0)][DBLP ] Conf ] Yuanbin Guo , Joseph R. Cavallaro A novel adaptive pre-distorter using LS estimation of SSPA non-linearity in mobile OFDM systems. [Citation Graph (0, 0)][DBLP ] Conf ] Chunyu Xin , Bo Xia , Wenjun Sheng , Ari Y. Valero-López , Edgar Sánchez-Sinencio A mixed-mode IF GFSK demodulator for Bluetooth. [Citation Graph (0, 0)][DBLP ] Conf ] T. Hayashi , Yoshifumi Nishio , M. Hasler , Akio Ushida Response of coupled chaotic circuits to sinusoidal input signal. [Citation Graph (0, 0)][DBLP ] Conf ] Yoko Uwate , Yoshifumi Nishio , Tetsushi Ueta , Tohru Kawabe , Tohru Ikeguchi Solving ability of Hopfield neural network with chaotic noise and burst noise for quadratic assignment problem. [Citation Graph (0, 0)][DBLP ] Conf ] Tohru Ikeguchi , K. Sato , Mikio Hasegawa , Kazuyuki Aihara Chaotic optimization for quadratic assignment problems. [Citation Graph (0, 0)][DBLP ] Conf ] GuoJie Hu , ZhengJin Feng , Lin Wang Analysis of a type of digital chaotic cryptosystem. [Citation Graph (0, 0)][DBLP ] Conf ] M. Jessa Data transmission with adjustable security exploiting chaos-based pseudorandom number generators. [Citation Graph (0, 0)][DBLP ] Conf ] M. Rezki , L. Sabel , Izzet Kale A prefiltering approach to frequency offset estimation in AWGN. [Citation Graph (0, 0)][DBLP ] Conf ] A. W. Gunst , G. W. Kant Application of digital wide band mismatch calibration to an I/Q receiver. [Citation Graph (0, 0)][DBLP ] Conf ] A. Kawamura , K. Fujii , Y. Itoh , Y. Fukui A new noise reduction method using linear prediction error filter and adaptive digital filter. [Citation Graph (0, 0)][DBLP ] Conf ] Qiyue Zou , Zhiping Lin Measurement time requirement for generalized cross-correlation based time-delay estimation. [Citation Graph (0, 0)][DBLP ] Conf ] Wei Xing Zheng A modified identification algorithm for linear systems with noisy input-output data. [Citation Graph (0, 0)][DBLP ] Conf ] Khier Benmahammed , Abdelaziz Hamzaoui Application of the SD to LCTI systems 1. [Citation Graph (0, 0)][DBLP ] Conf ] Khier Benmahammed , Abdelaziz Hamzaoui Application of the SD to LCTI systems 2. [Citation Graph (0, 0)][DBLP ] Conf ] G. Reissig , H. Boche , P. I. Barton On inconsistent initial conditions for linear time-invariant differential-algebraic equations. [Citation Graph (0, 0)][DBLP ] Conf ] Yang Xiao Derivation algorithm of transfer functions of 2-D continuous-discrete systems. [Citation Graph (0, 0)][DBLP ] Conf ] Sidnei Noceti Filho , Rui Seara Cut-off frequencies in wide-band systems. [Citation Graph (0, 0)][DBLP ] Conf ] Antônio Carlos M. de Queiroz Generalized LC multiple resonance networks. [Citation Graph (0, 0)][DBLP ] Conf ] K. Hajek , Z. Sedlacek , B. Sviezeny New circuits for realization of the 1st and 2nd order all-pass LC filters with a better technological feasibility. [Citation Graph (0, 0)][DBLP ] Conf ] B. Siddik Yarman , Ahmet Aksen , Ali Kilinc Immitance data modelling via linear interpolation techniques. [Citation Graph (0, 0)][DBLP ] Conf ] Esteban Tlelo-Cuautle Computing the elements embedded into a positive feedback loop. [Citation Graph (0, 0)][DBLP ] Conf ] Esteban Tlelo-Cuautle An efficient biasing technique suitable for any kind of the four basic amplifiers designed at or level. [Citation Graph (0, 0)][DBLP ] Conf ] M. Vucic , H. Babic A robust method for equalizer design based on the impulse response symmetry. [Citation Graph (0, 0)][DBLP ] Conf ] Jiwei Chen , Bingxue Shi Analysis and optimization of CMOS LNA noise performance with channel resistance. [Citation Graph (0, 0)][DBLP ] Conf ] Aziz S. Inan , Peter M. Osterberg Revisiting the sifting integral: an interesting special case. [Citation Graph (0, 0)][DBLP ] Conf ] Hengsheng Liu , Aydin I. Karsilayan An automatic tuning scheme for high frequency bandpass filters. [Citation Graph (0, 0)][DBLP ] Conf ] Aleksandar Tasic , Wouter A. Serdijn Concept of frequency-transconductance tuning of bipolar voltage-controlled oscillators. [Citation Graph (0, 0)][DBLP ] Conf ] Mohammed Sayed , Wael M. Badawy Performance analysis of single-bit full adder cells using 0.18, 0.25, and 0.35 µm CMOS technologies. [Citation Graph (0, 0)][DBLP ] Conf ] A. Aggoun , A. Farwan , M. K. Ibrahim A radix-2n vector inner product. [Citation Graph (0, 0)][DBLP ] Conf ] Johann Großschädl A unified radix-4 partial product generator for integers and binary polynomials. [Citation Graph (0, 0)][DBLP ] Conf ] Robert Hägglund , Per Löwenborg , Mark Vesterbacka A polynomial-based division algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Meng-Hung Tsai , Yi-Ting Chen , Wen-Sheng Cheng , Jun-Xian Teng , Shyh-Jye Jou Sub-word and reduced-width Booth multipliers for DSP applications. [Citation Graph (0, 0)][DBLP ] Conf ] Ayman A. Fayed , Magdy A. Bayoumi Noise-tolerant design and analysis for a low-voltage dynamic full adder cell. [Citation Graph (0, 0)][DBLP ] Conf ] L. Repetto , Marco Storace , M. Parodi A procedure for the piecewise-linear approximation of the resistive part of a cellular nonlinear network. [Citation Graph (0, 0)][DBLP ] Conf ] Simone Orcioni , Massimiliano Pirani , Claudio Turchetti , Massimo Conti Practical notes on two Volterra filter identification direct methods. [Citation Graph (0, 0)][DBLP ] Conf ] Antti Heiskanen , Timo Rahkonen 5th order multi-tone Volterra simulator with component-level output. [Citation Graph (0, 0)][DBLP ] Conf ] Christian Niederhöfer , S. Suna , Ronald Tetzlaff Nonlinear prediction of brain electrical activity in epilepsy with a Volterra RLS algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Mikio Hasegawa , Tohru Ikeguchi An analysis of the Internet traffic by the method of surrogate data. [Citation Graph (0, 0)][DBLP ] Conf ] V. C. Vincence , Carlos Galup-Montoro , Márcio C. Schneider A low-voltage CMOS class-AB operational amplifier. [Citation Graph (0, 0)][DBLP ] Conf ] G. Fischer , Deokhwan Hyun Delta-sigma modulator topologies with high immunity to pattern noise. [Citation Graph (0, 0)][DBLP ] Conf ] Pieter Rombouts , Johan Raman , Ludo Weyten An efficient technique to eliminate quantisation noise folding in double-sampling Sigma-Delta modulators. [Citation Graph (0, 0)][DBLP ] Conf ] Bingxin Li , Hannu Tenhunen A structure of cascading multi-bit modulators without dynamic element matching or digital correction. [Citation Graph (0, 0)][DBLP ] Conf ] R. Batten , Terri S. Fiez An efficient parallel delta-sigma ADC utilizing a shared multi-bit quantizer. [Citation Graph (0, 0)][DBLP ] Conf ] D. Scholnik , J. O. Coleman Space-time vector delta-sigma modulation. [Citation Graph (0, 0)][DBLP ] Conf ] Kazuyuki Wada , Yoshiaki Tadokoro Design of a body-effect reduced-source follower and its application to linearization technique. [Citation Graph (0, 0)][DBLP ] Conf ] Reid R. Harrison A wide-linear-range subthreshold CMOS transconductor employing the back-gate effect. [Citation Graph (0, 0)][DBLP ] Conf ] Slawomir Koziel , Stanislaw Szczepanski , Rolf Schaumann Design of highly linear tunable CMOS OTA. [Citation Graph (0, 0)][DBLP ] Conf ] Adrian Leuciuc , Yi Zhang A highly linear low-voltage MOS transconductor. [Citation Graph (0, 0)][DBLP ] Conf ] T. Oura , T. Yoneyama , S. Tantry , H. Asai A threshold voltage independent floating resistor circuit exhibiting both positive and negative resistance values. [Citation Graph (0, 0)][DBLP ] Conf ] Y. Tanji , A. Ushida , Michel S. Nakhla Passive closed-form expression of RLCG transmission lines. [Citation Graph (0, 0)][DBLP ] Conf ] Jean Michel Portal , L. Forli , Didier Née Floating-gate EEPROM cell model based on MOS model 9. [Citation Graph (0, 0)][DBLP ] Conf ] Zbigniew Galias , Gian Mario Maggio On the optimal labeling for pseudo-chaotic phase hopping. [Citation Graph (0, 0)][DBLP ] Conf ] Sergio Callegari , Riccardo Rovatti , Gianluca Setti Folded sums of chaotic trajectories distribute uniformly. [Citation Graph (0, 0)][DBLP ] Conf ] Riccardo Rovatti , Sergio Callegari , Gianluca Setti On the correlation of non-jittered and chaotically-jittered PWM signals carrying maximum information. [Citation Graph (0, 0)][DBLP ] Conf ] 