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Conferences in DBLP

International Conference on Parallel Architectures and Compilation Techniques (PACT) (IEEEpact)
2006 (conf/IEEEpact/2006)

  1. Jeffrey Dean
    Experiences with MapReduce, an abstraction for large-scale computation. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:1- [Conf]
  2. Nauman Rafique, Won-Taek Lim, Mithuna Thottethodi
    Architectural support for operating system-driven CMP cache management. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:2-12 [Conf]
  3. Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. Iyer, Srihari Makineni
    Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:13-22 [Conf]
  4. Rakesh Kumar, Dean M. Tullsen, Norman P. Jouppi
    Core architecture optimization for heterogeneous chip multiprocessors. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:23-32 [Conf]
  5. Abhishek Das, William J. Dally, Peter R. Mattson
    Compiling for stream processing. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:33-42 [Conf]
  6. Silvius Rus, Guobin He, Christophe Alias, Lawrence Rauchwerger
    Region array SSA. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:43-52 [Conf]
  7. Kyungwoo Lee, Samuel P. Midkiff
    A two-phase escape analysis for parallel java programs. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:53-62 [Conf]
  8. Steve Scott
    Challenges and opportunities in the post single-thread-processor era. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:63- [Conf]
  9. Sumeet Kumar, Aneesh Aggarwal
    Self-checking instructions: reducing instruction redundancy for concurrent error detection. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:64-73 [Conf]
  10. Lan Gao, Jun Yang, Marek Chrobak, Youtao Zhang, San Nguyen, Hsien-Hsin S. Lee
    A low-cost memory remapping scheme for address bus protection. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:74-83 [Conf]
  11. Brian Rogers, Milos Prvulovic, Yan Solihin
    Efficient data protection for distributed shared memory multiprocessors. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:84-94 [Conf]
  12. Ted Huffmire, Timothy Sherwood
    Wavelet-based phase classification. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:95-104 [Conf]
  13. Chang-Burm Cho, Tao Li
    Complexity-based program phase analysis and classification. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:105-113 [Conf]
  14. Kenneth Hoste, Aashish Phansalkar, Lieven Eeckhout, Andy Georges, Lizy Kurian John, Koen De Bosschere
    Performance prediction based on inherent program similarity. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:114-122 [Conf]
  15. Ajay K. Royyuru
    Deep computing in biology: challenges and progress. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:123- [Conf]
  16. Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi
    Hardware support for spin management in overcommitted virtual machines. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:124-133 [Conf]
  17. Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi, Austen McDonald, Christos Kozyrakis, Kunle Olukotun
    Testing implementations of transactional memory. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:134-143 [Conf]
  18. Ilya Ganusov, Martin Burtscher
    Efficient emulation of hardware prefetchers via event-driven helper threading. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:144-153 [Conf]
  19. Qin Zhao, Joon Edward Sim, Weng-Fai Wong, Larry Rudolph
    DEP: detailed execution profile. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:154-163 [Conf]
  20. Nathaniel McIntosh, Sandya Mannarswamy, Robert Hundt
    Whole-program optimization of global variable layout. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:164-172 [Conf]
  21. Zhelong Pan, Rudolf Eigenmann
    Fast, automatic, procedure-level performance tuning. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:173-181 [Conf]
  22. Andrew Petersen, Andrew Putnam, Martha Mercaldi, Andrew Schwerin, Susan J. Eggers, Steven Swanson, Mark Oskin
    Reducing control overhead in dataflow architectures. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:182-191 [Conf]
  23. Chengmo Yang, Alex Orailoglu
    Power-efficient instruction delivery through trace reuse. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:192-201 [Conf]
  24. Oliverio J. Santana, Ayose Falcón, Alex Ramírez, Mateo Valero
    Branch predictor guided instruction decoding. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:202-211 [Conf]
  25. Kaushik Rajan, R. Govindarajan
    Two-level mapping based cache index selection for packet forwarding engines. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:212-221 [Conf]
  26. Sung-Chul Han, Franz Franchetti, Markus Püschel
    Program generation for the all-pairs shortest path problem. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:222-232 [Conf]
  27. Qingda Lu, Sriram Krishnamoorthy, P. Sadayappan
    Combining analytical and empirical approaches in tuning matrix transposition. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:233-242 [Conf]
  28. David B. Kirk
    Processor architecture: too much parallelism? [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:243- [Conf]
  29. Joseph J. Sharkey, Deniz Balkan, Dmitry Ponomarev
    Adaptive reorder buffers for SMT processors. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:244-253 [Conf]
  30. Francisco J. Mesa-Martinez, Michael C. Huang, Jose Renau
    SEED: scalable, efficient enforcement of dependences. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:254-264 [Conf]
  31. Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose
    SPARTAN: speculative avoidance of register allocations to transient values for performance and energy efficiency. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:265-274 [Conf]
  32. Zhen Yang, Xudong Shi, Feiqi Su, Jih-Kwon Peir
    Overlapping dependent loads with addressless preload. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:275-284 [Conf]
  33. Ivan D. Baev, Richard E. Hank, David H. Gross
    Prematerialization: reducing register pressure for free. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:285-294 [Conf]
  34. Johnnie Birch, Robert A. van Engelen, Kyle A. Gallivan, Yixin Shou
    An empirical evaluation of chains of recurrences for array dependence testing. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:295-304 [Conf]
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