Conferences in DBLP
C. M. Allen Multi-Valued Logic: Wave of the Future or an Historical Anachronism. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:1- [Conf ] Jonathan Wayne Mills , M. Gordon Beavers , Charles A. Daffinger Lukasiewicz Logic Arrays. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:4-10 [Conf ] Okihiko Ishizuka , Zheng Tang , Hiroki Matsumoto On Design of Multiple-Valued Static Random-Access-Memory. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:11-17 [Conf ] Takahiro Hanyu , Tatsuo Higuchi Design of a High-Density Multiple-Valued Content-Addressable Memory Based on Floating-Gate MOS Devices. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:18-23 [Conf ] J. M. Johnson Ternary Logic Elements for Self-timed Integrated Systems. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:24- [Conf ] Orlando E. Katter Jr. , Hassan M. Razavi A New CMOS Gate - The Balanced Gate - For Detecting Physical Failures. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:25-31 [Conf ] Lucien Haddad , Ivo G. Rosenberg A Note on Finite Clones Containing All Permutations. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:34-41 [Conf ] George Epstein , Helena Rasiowa Theory and Uses of Post Algebras of Order omega+omegaw\ast.I. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:42-47 [Conf ] Corina Reischer , Dan A. Simovici Bio-Algebras. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:48-53 [Conf ] Louis H. Kaufman Robbins Algebra. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:54-60 [Conf ] Claudio Moraga , Jörg Poswig Properties of the Zhang-Hartley Spectrum of Patterns. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:62-68 [Conf ] T. Raju Damarla Fault Detection in Multiple Valued Logic Circuits. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:69-74 [Conf ] Bogdan J. Falkowski , Marek A. Perkowski Walsh Type Transforms for Completely and Incompletely Specified Multiple-Valued Input Binary Functions. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:75-82 [Conf ] Josep Maria Font , Miquel Rius A Four-Valued Modal Logic Arising from Monteiro's Last Algebras. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:85-92 [Conf ] Noboru Takagi , Masao Mukaidono Kleene-Stone Logic Functions. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:93-100 [Conf ] Deepak Dube , Anneliese von Mayrhauser Alleviating Memory Bottlenecks Using Multi-Level Memory. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:102-109 [Conf ] Oscar N. Garcia , Massoud Moussavi A Six-Valued Logic for Representing Incomplete Knowledge. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:110-114 [Conf ] A. Sengupta , C. Rhee On the Diagnosability of Systems with Three Valued Test Results: Diagnosis by Comparison Strategy. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:115-120 [Conf ] Jia-Yuan Han , Supreet Singh Comparison Look-Ahead and Design of Fast Fuzzy Operation Units. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:121-125 [Conf ] Tsutomu Sasao EXMIN: A Simplification Algorithm for Exclusive-OR-Sum-of-Products Expressions for Multiple-Valued Input Two-Valued Output Functions. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:128-135 [Conf ] Gerhard W. Dueck , D. Michael Miller RCM-MVL: A Recursive Consensus MVL Minimization Algorithm. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:136-143 [Conf ] John M. Yurchak , Jon T. Butler HAMLET - An Expression Compiler/Optimizer for the Implementation of Heuristics to Minimize Multiple-Valued Programmable Logic Arrays. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:144-152 [Conf ] Chyan Yang , Yao-Ming Wang A Neighborhood Decoupling Algorithm for Truncated Sum Minimization. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:153-160 [Conf ] Michitaka Kameyama Toward the Age of Beyond-Binary Electronics and Systems. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:162-166 [Conf ] K. Wayne Current A CMOS Quaternary Threshold Logic Full Adder Circuit with Transparent Latch. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:168-173 [Conf ] Debashis Bhattacharya Binary to Quaternary Encoding in Clocked CMOS Circuits Using Weak Buffer. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:174-180 [Conf ] Peter Baltus , Pieter van der Meulen , Ross Morley An Efficient Multi-Level Multi-Wire Differential Interface. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:181-188 [Conf ] Lutz J. Micheel , Michael J. Paulus Differential Multiple-Valued Logic Using Resonant Tunneling Diodes. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:189-195 [Conf ] Mou Hu , Kenneth C. Smith Application of Multiple-Valued Switch-Level Algebra to the Design and Analysis of Pass-Transistor Switch Networks. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:196-201 [Conf ] Zbigniew Stachniak Note on Resolution Approximation of Many-Valued Logics. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:204-209 [Conf ] I. R. Goodman Conditional Event Algebras and Logic, Part I: Motivation and History of the Problem. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:210- [Conf ] Michael F. Schmidt On Some Neglected Paradoxes of Modem Logic. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:211-219 [Conf ] Nuno J. Mamede , João P. Martins Bringing Resources into Logic. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:220-227 [Conf ] Kazimierz Trzesicki Many-Valued Tense Logic and the Problem of Determinism. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:228-236 [Conf ] Melvin Fitting Bilattices in Logic Prograrnming. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:238-246 [Conf ] János Demetrovics , Masahiro Miyakawa , Ivo G. Rosenberg , Dan A. Simovici , Ivan Stojmenovic Intersections of Isotone Clones on a Finite Set. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:248-253 [Conf ] Masahiro Miyakawa , Ivan Stojmenovic , Dietlinde Lau , Taketoshi Mishima On the Structure of Maximal Closed Sets of P_{K2} . [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:254-261 [Conf ] Hantao Zhang Approximate Reasoning in Strength Logic. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:262-269 [Conf ] O. O. Silva , C. R. Souza Induction of Fuzzy Production Rules. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:270-278 [Conf ] Lichun Cheng , Mou Hu A General Fuzzy Logical Operator Set. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:279-283 [Conf ] Jon T. Butler , Hans G. Kerkhoff , Siep Onneweer A Comparative Analysis of Multiplexer Techniques for the Minimization of Function Cost Using the Costtable Approach. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:286-291 [Conf ] Jon C. Muzio Concerning the Maximum Size of the Terms in the Realization of Symmetric Functions. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:292-299 [Conf ] Safwat G. Zaky , Zvonko G. Vranesic , Mostafa H. Abd-El-Barr Step-Wise Synthesis of CCD MVL Functions. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:300-307 [Conf ] Srinivas Devadas Minimization of Functions with Multiple-Valued Outputs: Theory and Applications. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:308-315 [Conf ] Mostafa H. Abd-El-Barr , H. Choy On the Synthesis of MVMT Functions for PLA Implementation Using CCDs. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:316-323 [Conf ] Ryszard S. Michalski Theory of Plausible Reasoning - Foundations and Methodology. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:325- [Conf ] Walter Alexandre Carnielli Many-Valued Logics and Plausible Reasoning. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:328-335 [Conf ] Masamitu Otake , Taketoshi Mishima , Yoichi Manome Strength of the Rule of Inference. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:336-338 [Conf ] V. S. Subrahmanian Paraconsistent Disjunctive Deductive Databases. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:339-346 [Conf ] Daniel Etiemble , C. Chanussot , Vincent Néri 4-Valued BiCMOS Circuits for the Transmission System of a Massively Parallel Architecture. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:348-354 [Conf ] Michitaka Kameyama , Masahiro Nomura , Tatsuo Higuchi Modular Design of Multiple-Valued Arithmetic VLSI System Using Signed-Digit Number System. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:355-362 [Conf ] Hsu Liang Ho , Kenneth C. Smith Integrator-Chain Multiplier. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:363-369 [Conf ] Zbigniew W. Ras Fault-Recovery and Intelligent Distributed System. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:372-377 [Conf ] W. Elliott Jr. , M. Schneider The Learning Aspects of the Fault Finder Expert System. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:378-385 [Conf ] Rudolf Felix Goal-Oriented Control of VLSI Design Processes Based on Fuzzy Sets. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:386-393 [Conf ] Zhijian Li , Hong Jiang A CMOS Current-Mode High Speed Fuzzy Logic Microprocessor for a Real-Time Expert System. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:394-401 [Conf ] Kevin Cattell , Micaela Serra The Analysis of One Dimensional Multiple-Valued Linear Cellular Automata. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:402-409 [Conf ] Yutaka Hata , Kyoichi Nakashima , Kazuharu Yamato Some Relationships Between Multiple-Valued Kleenean Functions and Ternary Input Multiple-Valued Output Functions. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:410-417 [Conf ] Tatsuki Watanabe , Masayuki Matsumoto , Mitsuaki Enokida , Takahiro Hasegawa A Design of Multiple-Valued Logic Neuron. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:418-425 [Conf ] Loke-Soo Hsu , Hoon heng Teh , Sing-Chai Chan , Kia-Fock Loe Multi-Valued Neural Logic Networks. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:426-432 [Conf ] Aldo V. Figallo , Luiz Monteiro , Alicia Ziliani Free Three-valued Lukasiewicz, Post and Moisil Algebras over a Poset. [Citation Graph (0, 0)][DBLP ] ISMVL, 1990, pp:433-435 [Conf ]