The SCEAS System
Navigation Menu

Conferences in DBLP

IEEE International Symposium on Multiple-Valued Logic (ISMVL) (ismvl)
1997 (conf/ismvl/1997)

  1. D. Rooß
    Recent Developments in DNA-Computing. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:3-0 [Conf]
  2. Marek A. Perkowski, Malgorzata Marek-Sadowska, Lech Józwiak, Tadeusz Luba, Stan Grygiel, Miroslawa Nowicka, Rahul Malvi, Zhi Wang, Jin S. Zhang
    Decomposition of Multiple-Valued Relations . [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:13-18 [Conf]
  3. Elena Dubrova, Jon C. Muzio, Bernhard von Stengel
    Finding Composition Trees for Multiple-Valued Functions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:19-26 [Conf]
  4. Craig M. Files, Rolf Drechsler, Marek A. Perkowski
    Functional Decomposition of MVL Functions Using Multi-Valued Decision Diagrams. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:27-0 [Conf]
  5. Takao Waho, Masafumi Yamamoto
    Application of Resonant-Tunneling Quaternary Quantizer to Ultrahigh-Speed A/D Converter. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:35-40 [Conf]
  6. Toshio Baba, Tetsuya Uemura
    Multiple-Junction Surface Tunnel Transistors for Multiple-Valued Logic Circuits . [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:41-46 [Conf]
  7. Masahiko Hiratsuka, Takafumi Aoki, Tatsuo Higuchi
    Enzyme Transistor Circuits for Biomolecular Computing. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:47-0 [Conf]
  8. Tsutomu Sasao, Jon T. Butler
    Comparison of the Worst and Best Sum-of-Products Expressions for Multiple-Valued Functions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:55-60 [Conf]
  9. Arkadij Zakrevskij, Lev Zakrevski
    Fast Algorithm for Minimizing Reed-Muller Expansions of Systems of Incompletely Specified MVL Functions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:61-65 [Conf]
  10. Rolf Drechsler, Martin Keim, Bernd Becker
    Sympathy-MV: Fast Exact Minimization of Fixed Polarity Multi-Valued Linear Expressions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:66-0 [Conf]
  11. Alioune Ngom, Corina Reischer, Dan A. Simovici, Ivan Stojmenovic
    Completeness Criteria in Set-Valued Logic Under Compositions with Union and Intersection. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:75-82 [Conf]
  12. B. A. Romov
    Hyperclones on a Finite Set. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:83-88 [Conf]
  13. Noboru Takagi, Y. Nakamura, Kyoichi Nakashima
    Set-Valued Functions and Regularity. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:89-0 [Conf]
  14. Yutaka Hata, Kiyoshi Hayase, Takahiro Hozumi, Naotake Kamiura, Kazuharu Yamato
    Multiple-Valued Logic Minimization by Genetic Algorithms. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:97-102 [Conf]
  15. Yutaka Hata, Naotake Kamiura, Kazuharu Yamato
    Multiple-Valued Product-of-Sums Expression with Truncated Sum. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:103-0 [Conf]
  16. P. H. Giang
    Representation of Uncertain Belief Using Interval Probability. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:111-116 [Conf]
  17. Jean-Yves Béziau
    What Is Many-Valued Logic? [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:117-0 [Conf]
  18. Susanto Rahardja, Bogdan J. Falkowski
    Family of Complex Hadamard Transforms: Relationship with Other Transforms and Complex Composite Spectra. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:125-130 [Conf]
  19. Bogdan J. Falkowski, Susanto Rahardja
    Properties and Applications of Unified Complex Hadamard Transforms. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:131-0 [Conf]
  20. Vlad P. Shmerko, Svetlana N. Yanushkevich, Vitaly G. Levashenko
    Test Pattern Generation for Combinatorial Multi-Valued Networks Based on Generalized D-Algorithm. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:139-144 [Conf]
  21. Rolf Drechsler, Martin Keim, Bernd Becker
    Fault Simulation in Sequential Multi-Valued Logic Networks. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:145-0 [Conf]
  22. Ewa Orlowska
    Many-Valuedness and Uncertainty. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:153-0 [Conf]
  23. T. Utsumi, Naotake Kamiura, Yutaka Hata, Kazuharu Yamato
    Multiple-Valued Programmable Logic Arrays with Universal Literals. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:163-168 [Conf]
  24. Okihiko Ishizuka, Akihiro Ohta, Koichi Tanno, Zheng Tang, Dwi Handoko
    VLSI Design of a Quaternary Multiplier with Direct Generation of Partial Products. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:169-174 [Conf]
  25. Takahiro Hanyu, Manabu Arakaki, Michitaka Kameyama
    One-Transistor-Cell 4-Valued Universal-Literal CAM for Cellular Logic Image Processing. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:175-0 [Conf]
  26. Helmut Thiele
    On the Mutual Definability of Classes of Generalized Fuzzy Implications and of Classes of Generalized NegationsandS-Norms. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:183-188 [Conf]
  27. Junda Chen, David C. Rine
    Training Fuzzy Logic Based Software Components for Reuse. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:189-194 [Conf]
  28. Erdmuthe Meyer zu Bexten, F. Sajadi, Claudio Moraga
    Properties of Lindenmayer Fuzzy Languages and a-Driven Lindenmayer Languages. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:195-0 [Conf]
  29. Riccardo Mariani, R. Roncella, Roberto Saletti, Pierangelo Terreni
    Useful Application of CMOS Ternary Logic to the Realisation of Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:203-208 [Conf]
  30. Xunwei Wu, Massoud Pedram
    Design of Ternary CCD Circuits Referencing to Current-Mode CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:209-214 [Conf]
  31. Andreas Herrfeld, Siegbert Hentschke
    Quatemary Dynamic Differential Logic with Application to Fuzzy-Logic Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:215-0 [Conf]
  32. Seiki Akama
    A Proof Method for the Six-Valued Logic for Incomplete Information. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:223-226 [Conf]
  33. Robert J. Bignall, M. Spinks
    Multiple-Valued Logic as a Programming Language. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:227-232 [Conf]
  34. Zheng Tang, T. Yamaguchi, Koichi Tashima, Okihiko Ishizuka, Koichi Tanno
    Multiple-Valued Immune Network Model and Its Simulations. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:233-0 [Conf]
  35. Tsutomu Sasao
    Ternary Decision Diagrams: Survey. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:241-0 [Conf]
  36. Mostafa H. Abd-El-Barr, M. N. Hasan, G. A. Hamid
    On the Synthesis of MVL Functions Using Input and Output Phase Assignments. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:253-258 [Conf]
  37. A. Etzel
    Mixed Discrete Optimization of Multiple-Valued Systems. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:259-264 [Conf]
  38. Yasunori Nagata, Masao Mukaidono
    Design of an Asynchronous Digital System with B-Ternary Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:265-0 [Conf]
  39. Radomir S. Stankovic, Rolf Drechsler
    Circuit Design from Kronecker Galois Field Decision Diagrams for Multiple-Valued Functions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:275-280 [Conf]
  40. Radomir S. Stankovic
    Fourier Decision Diagrams on Finite Non-Abelian Groups with Preprocessing. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:281-286 [Conf]
  41. Stan Grygiel, Marek A. Perkowski, Malgorzata Marek-Sadowska, Tadeusz Luba, Lech Józwiak
    Cube Diagram Bundles: A New Representation of Strongly Unspecified Multiple-Valued Functions and Relations. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1997, pp:287-292 [Conf]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002