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IEEE International Symposium on Multiple-Valued Logic (ISMVL) (ismvl)
2001 (conf/ismvl/2001)

  1. Janusz A. Brzozowski, Zoltán Ésik, Y. Iland
    Algebras for Hazard Detection. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:3-0 [Conf]
  2. Mostafa H. Abd-El-Barr, Abdullah Al-Mutawa
    A New Improved Cost-Table-Based Technique for Synthesis of 4-Valued Unary Functions Implemented Using Current-Mode CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:15-20 [Conf]
  3. Tsukasa Ike, Takahiro Hanyu, Michitaka Kameyama
    Dual-Rail Multiple-Valued Current-Mode VLSI with Biasing Current Sources. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:21-26 [Conf]
  4. Motoi Inaba, Koichi Tanno, Okihiko Ishizuka
    Realization of NMAX and NMIN Functions with Multi-Valued Voltage Comparators. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:27-0 [Conf]
  5. Mou Hu
    An Application of Multiple-Valued Logic to Test Case Generation for Software System Functional Testing. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:35-40 [Conf]
  6. Mark G. Karpovsky, Radomir S. Stankovic, Claudio Moraga
    Spectral Techniques in Binary and Multiple-Valued Switching Theory. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:41-0 [Conf]
  7. W. Prost, U. Auer, F.-J. Tegude, Christian Pacha, Karl Goser, Rainer Duschl, K. Eberl, O. Schmidt
    Tunnelling Diode Technology. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:49-0 [Conf]
  8. Imed Ben Dhaou, Elena Dubrova, Hannu Tenhunen
    Power Efficient Inter-Module Communication for Digit-Serial DSP Architectures in Deep-Submicron Technology. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:61-66 [Conf]
  9. Sung Il Han, Young Hee Choi, Heung See Kim
    A 4-Digit CMOS Quaternary to Analog Converter with Current Switch and Neuron MOS Down Literal Circuit. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:67-0 [Conf]
  10. Anna Maria Radzikowska, Etienne E. Kerre
    On Some Classes of Fuzzy Information Relations. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:75-80 [Conf]
  11. Francesc Esteva, Lluis Godo
    On Complete Residuated Many-Valued Logics with T-Norm Conjunction. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:81-0 [Conf]
  12. Tetsuya Uemura, Toshio Baba
    A Three-Valued D-Flip-Flop and Shift Register Using Multiple-Junction Surface Tunnel Transistors. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:89-93 [Conf]
  13. Takao Waho, Kazufumi Hattori, Y. Takamatsu
    Flash Analog-to-Digital Converter Using Resonant-Tunneling Multiple-Valued Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:94-99 [Conf]
  14. H. Teng, R. Bolton
    The Use of Arithmetic Operators in a Self-Restored Current-Mode CMOS Multiple-Valued Logic Design Architecture. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:100-0 [Conf]
  15. Evren Gürkan, Aydan M. Erkmen, Ismet Erkmen
    Evaluation of Inconsistency in a 2-Way Fuzzy Adaptive System Using Shadowed Sets. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:109-115 [Conf]
  16. Hiroaki Kikuchi
    Identification of Incompletely Specified Fuzzy Unate Logic Function. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:116-0 [Conf]
  17. Viorica Sofronie-Stokkermans
    Representation Theorems and the Semantics of (Semi)Lattice-Based Logics. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:125-0 [Conf]
  18. Reiner Hähnle
    Complexity of Many-Valued Logics. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:137-0 [Conf]
  19. Zbigniew Stachniak
    Exploiting Polarity in Multiple-Valued Inference Systems. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:149-0 [Conf]
  20. Anas Al-Rabadi, Marek A. Perkowski
    Multiple-Valued Galois Field S/D Trees for GFSOP Minimization and Their Complexity. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:159-166 [Conf]
  21. Takahiro Hanyu, Michitaka Kameyama, Katsuhiko Shimabukuro, C. Zukeran
    Multiple-Valued Mask-Programmable Logic Array Using One-Transistor Universal-Literal Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:167-172 [Conf]
  22. Christian Lang, Bernd Steinbach
    Decomposition of Multi-Valued Functions into Min- and Max-Gates. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:173-0 [Conf]
  23. Matthias Baaz, Agata Ciabattoni, Christian G. Fermüller
    Cut-Elimination in a Sequents-of-Relations Calculus for Gödel Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:181-186 [Conf]
  24. Marsha Chechik, Steve M. Easterbrook, Benet Devereux
    Model Checking with Multi-Valued Temporal Logics. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:187-192 [Conf]
  25. Dirk Van Heule, Albert Hoogewijs
    Automated Reasoning with Ordinary Assertions and Default Assumptions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:193-0 [Conf]
  26. V. Cheushev, Svetlana N. Yanushkevich, Vlad P. Shmerko, Claudio Moraga, Joanna Kolodziejczyk
    Information Theory Method for Flexible Network Synthesis. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:201-206 [Conf]
  27. Tsutomu Sasao
    Compact SOP Representations for Multiple-Output Functions: An Encoding Method Using Multiple-Valued Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:207-212 [Conf]
  28. Anna M. Tomaszewska, Piotr Dziurzanski, Svetlana N. Yanushkevich, Vlad P. Shmerko
    Two-Stage Exact Detection of Symmetrics. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:213-0 [Conf]
  29. Ramón Béjar, Reiner Hähnle, Felip Manyà
    A Modular Reduction of Regular Logic to Classical Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:221-226 [Conf]
  30. Agata Ciabattoni, Christian G. Fermüller
    Hypersequents as a Uniform Framework for Urquhart's C, MTL and Related Logics. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:227-232 [Conf]
  31. S. Selezneva
    Polynomial-Time Algorithms for Verification of Some Properties of k-Valued Functions Represented by Polynomials. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:233-0 [Conf]
  32. Takahiro Hanyu
    Challenge of a Multiple-Valued Technology in Recent Deep-Submicron VLSI. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:241-0 [Conf]
  33. Masahiko Hiratsuka, Takafumi Aoki, Tatsuo Higuchi
    A Model of Reaction-Diffusion Cellular Automata for Massively Parallel Molecular Computing. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:247-252 [Conf]
  34. Masanori Natsui, Takafumi Aoki, Tatsuo Higuchi
    Synthesis of Multiple-Valued Arithmetic Circuits Using Evolutionary Graph Generation. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:253-258 [Conf]
  35. Dan A. Simovici, Szymon Jaroszewicz
    An Axiomatization of Generalized Entropy of Partitions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:259-0 [Conf]
  36. C. Morgan
    Many Valued Paraconsistent Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:267-272 [Conf]
  37. Jochen Pfalzgraf
    On Logical Fiberings and Decomposition of Many-Valued Operations: A Brief Survey. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:273-278 [Conf]
  38. Hajime Machida, Masahiro Miyakawa, Ivo G. Rosenberg
    Relations between Clones and Full Monoids. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:279-0 [Conf]
  39. Arnon Avron
    Classical Gentzen-Type Methods in Propositional Many-Valued Logics. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:287-0 [Conf]
  40. Frank Schmiedle, Wolfgang Günther, Rolf Drechsler
    Selection of Efficient Re-Ordering Heuristics for MDD Construction. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:299-304 [Conf]
  41. Radomir S. Stankovic, Milena Stankovic, Jaakko Astola, Karen Egiazarian
    Bit-Level and Word-Level Polynomial Expressions for Functions in Fibonacci Interconnection Topologies. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:305-310 [Conf]
  42. Radomir S. Stankovic, Milena Stankovic, Claudio Moraga
    Design of Haar Wavelet Transforms and Haar Spectral Transform Decision Diagrams for Multiple-Valued Functions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:311-0 [Conf]
  43. Petr Hájek, Zuzana Haniková
    A Set Theory within Fuzzy Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:319-323 [Conf]
  44. Tomoyuki Araki, Masao Mukaidono, F. Yamamoto
    On a Kleenean Extension of Fuzzy Measure. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:324-329 [Conf]
  45. Helmut Thiele
    On axiomatic characterisations of fuzzy approximation operators II. The rough fuzzy set based case. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:330-0 [Conf]
  46. Naotake Kamiura, Yasuyuki Taniguchi, Nobuyuki Matsui
    A Functional Manipulation for Improving Tolerance against Multiple-Valued Weight Faults of Feedforward Neural Networks. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:339-344 [Conf]
  47. Hisayuki Tatsumi, Yasuyuki Murai, Shinji Tokumasu
    Logics Circuit Diagnosis by Using Neural Networks. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:345-350 [Conf]
  48. Q. Hua, Q.-L. Zhen
    The Designing and Training of a Fuzzy Neural Hamming Classifier. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:351-0 [Conf]
  49. Stefano Aguzzoli, Daniele Mundici
    Weierstrass Approximations by Lukasiewicz Formulas with One Quantified Variable. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:361-366 [Conf]
  50. Patrik Eklund, Maria A. Galán, Jesús Medina, Manuel Ojeda-Aciego, Agustín Valverde
    Composing Submonads. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:367-372 [Conf]
  51. Jun Ma, Jun Liu, Yang Xu
    A Method of Uncertainty Reasoning by Using Information. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2001, pp:373-0 [Conf]
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