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IEEE International Symposium on Multiple-Valued Logic (ISMVL) (ismvl)
1999 (conf/ismvl/1999)

  1. Toshio Baba
    Development of Quantum Functional Devices for Multiple-Valued Logic Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:2-8 [Conf]
  2. Michel Serfati
    Multivalued Binary Relations and Post Algebras. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:10-17 [Conf]
  3. Radomir S. Stankovic, Dejan Milenovic, Dragan Jankovic
    Quaternion Groups versus Dyadic Groups in Representations and Processing of Switching Functions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:18-23 [Conf]
  4. Szymon Jaroszewicz, Dan A. Simovici
    On Axiomatization of Conditional Entropy of Functions Between Finite Sets. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:24-28 [Conf]
  5. Takahiro Hanyu, Hiromitsu Kimura, Michitaka Kameyama
    Multiple-Valued Content-Addressable Memory Using Metal-Ferroelectric-Semiconductor FETs. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:30-35 [Conf]
  6. Claudio Moraga, Ralph Heider
    "New lamps for old!" (Generalized Multiple-valued Neurons). [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:36-41 [Conf]
  7. Edgar "Dan" Olson
    Supplementary Symmetrical Logic Circuit Structure. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:42-47 [Conf]
  8. Bernd Steinbach, Marek A. Perkowski, Christian Lang
    Bi-Decompositions of Multi-Valued Functions for Circuit Design and Data Mining Applications. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:50-58 [Conf]
  9. Tsutomu Sasao
    Totally Undecomposable Functions: Applications to Efficient Multiple-Valued Decompositions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:59-65 [Conf]
  10. J. J. Lou, Janusz A. Brzozowski
    A Generalization of Shestakov's Function Decomposition Method. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:66-71 [Conf]
  11. Ivo G. Rosenberg, Hajime Machida
    Gigantic Pairs of Minimal Clones. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:74-79 [Conf]
  12. Lucien Haddad, Jean Fugère
    Maximal Chains of Partial Clones Containing All Idempotent Partial Functions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:80-84 [Conf]
  13. Lucien Haddad, Dietlinde Lau
    Partial Clones and their Generating Sets. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:85-90 [Conf]
  14. Elena Dubrova
    Evaluation of m-Valued Fixed Polarity Generalizations of Reed-Muller Canonical Form. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:92-98 [Conf]
  15. Debatosh Debnath, Tsutomu Sasao
    Multiple-Valued Minimization to Optimize PLAs with Output EXOR Gates. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:99-104 [Conf]
  16. Takahiro Hozumi, Osamu Kakusho, Yutaka Hata
    The Output Permutation for the Multiple-Valued Logic Minimization with Universal Literals. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:105-109 [Conf]
  17. Noboru Takagi, Akimitsu Hon-nami, Kyoichi Nakashima
    Logical Model for Representing Uncertain Statuses of Multiple-Valued Logic Systems Realized by Min, Max and Literals. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:110-115 [Conf]
  18. Gerhard W. Dueck, Mou Hu, Blair Fraser
    A Super Switch Algebra for Quantum Device Based Systems. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:118-124 [Conf]
  19. Tomoko Ninomiya, Masao Mukaidono
    Clarifying the Axioms of Kleene Algebra based on the Method of Indeterminate Coefficients. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:125-130 [Conf]
  20. Grant Pogosyan
    The Number of Cascade Functions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:131-135 [Conf]
  21. Renren Liu
    Research on the Similarity among Precomplete Sets Preserving m-ary Relations in Partial K-Valued Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:136-139 [Conf]
  22. Abdelwaheb Ayari, David A. Basin, Stefan Friedrich
    Structural and Behavioral Modeling with Monadic Logics. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:142-151 [Conf]
  23. Radomir S. Stankovic
    Matrix-Valued EXOR-TDDs in Decompositon of Switching Functions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:154-159 [Conf]
  24. Mostafa H. Abd-El-Barr, Henry Fernandes
    Synthesis of Multiple-Valued Decision Diagrams using Current-Mode CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:160-165 [Conf]
  25. Hafiz Md. Hasan Babu, Tsutomu Sasao
    Shared Multiple-Valued Decision Diagrams for Multiple-Output Functions. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:166-172 [Conf]
  26. Andreas Herrfeld, Siegbert Hentschke
    Ternary Multiplication Circuits Using 4-Input Adder Cells and Carry Look-Ahead. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:174-179 [Conf]
  27. Jing Shen, Koichi Tanno, Okihiko Ishizuka
    Down Literal Circuit with Neuron-MOS Transistors and Its Applications. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:180-185 [Conf]
  28. Aryan Saed, Majid Ahmadi, Graham A. Jullien
    Arithmetic Circuits for Analog Digits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:186-191 [Conf]
  29. Kai Freitag, Lars Hildebrand, Claudio Moraga
    Quaternary Coded Genetic Algorithms. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:194-199 [Conf]
  30. Takafumi Aoki, Ken-ichi Hoshi, Tatsuo Higuchi
    Redundant Complex Arithmetic and Its Application to Complex Multiplier Design. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:200-207 [Conf]
  31. Alioune Ngom, Ivan Stojmenovic, Jovisa D. Zunic
    On the Number of Multilinear Partitions and the Computing Capacity of Multiple-Valued Multiple-Threshold Perceptrons. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:208-213 [Conf]
  32. Yasunori Nagata, D. Michael Miller, Masao Mukaidono
    B-ternary Logic Based Asynchronous Micropipeline. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:214-219 [Conf]
  33. K. J. Adams, J. G. Campbell, Liam P. Maguire, J. A. C. Webb
    State Assignment Techniques in Multiple-Valued Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:220-225 [Conf]
  34. Lech Józwiak
    Information Relationships and Measures in Application to Logic Design. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:228-235 [Conf]
  35. Thomas Lukasiewicz
    Probabilistic and Truth-Functional Many-Valued Logic Programming. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:236-241 [Conf]
  36. Viorica Sofronie-Stokkermans
    Representation Theorems and Theorem Proving in Non-Classical Logics. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:242-247 [Conf]
  37. Bernhard Beckert, Reiner Hähnle, Felip Manyà
    Transformations between Signed and Classical Clause Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:248-255 [Conf]
  38. Masahiro Miyakawa
    Semirigid Problems in k-Valued Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:256-260 [Conf]
  39. Mostafa H. Abd-El-Barr, Maher Al-Sherif, Mohamed Osman
    Fault Characterization and Testability Considerations in Multi-Valued Logic Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:262-267 [Conf]
  40. Ugur Kalay, Marek A. Perkowski, Douglas V. Hall
    Highly Testable Boolean Ring Logic Circuits. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:268-274 [Conf]
  41. Takahiro Hanyu, Tsukasa Ike, Michitaka Kameyama
    Self-Checking Multiple-Valued Circuit Based on Dual-Rail Current-Mode Differential Logic. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:275-279 [Conf]
  42. Helmut Thiele
    On the Concept of Qualitative Fuzzy Set. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:282-287 [Conf]
  43. Yutaka Hata, Masao Mukaidono
    On Some Classes of Fuzzy Information Granularity and Their Representations. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:288-293 [Conf]
  44. Liam P. Maguire, T. Martin McGinnity, L. J. McDaid
    From a Fuzzy Flip-Flop to a MVL Flip-Flop. [Citation Graph (0, 0)][DBLP]
    ISMVL, 1999, pp:294-299 [Conf]
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