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Conferences in DBLP

International Symposium on Systems Synthesis (isss)
1997 (conf/isss/1997)

  1. Ellen Sentovich
    Quick Conservative Causality Analysis. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:2-8 [Conf]
  2. Christian Blumenröhr, Dirk Eisenbiegler
    An Efficient Representation for Formal Synthesis. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:9-15 [Conf]
  3. Steven Vercauteren, Diederik Verkest, Gjalt G. de Jong, Bill Lin
    Derivation of Formal Representations from Process-Based Specification and Implementation Models. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:16-0 [Conf]
  4. A. Hein, J. Dalcolmo, P. Le Corre, Rudy Lauwereins, Marleen Adé
    Prototyping of the Receiver Unit for a Broadband Access Network. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:26-32 [Conf]
  5. Bart Mesman, Marino T. J. Strik, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess
    Constraint Analysis for DSP Code Generation. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:33-40 [Conf]
  6. Catherine H. Gebotys
    An Efficient Model for DSP Code Generation: Performance, Code Size, Estimated Energy. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:41-0 [Conf]
  7. Krzysztof Kuchcinski
    Embedded System Synthesis by Timing Constraints Solving. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:50-57 [Conf]
  8. Anne Mignotte, Olivier Peyran
    Reducing the Complexity of ILP Formulations for Synthesis. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:58-64 [Conf]
  9. Birger Landwehr, Peter Marwedel
    A New Optimization Technique for Improving Resource Exploitation and Critical Path Minimization. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:65-0 [Conf]
  10. Peter Slock, Sven Wuytack, Francky Catthoor, Gjalt G. de Jong
    Fast and Extensive System-Level Memory Exploration for ATM Applications. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:74-81 [Conf]
  11. Uwe Eckhardt, Renate Merker
    Optimization of the Background Memory Utilization by Partitioning. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:82-89 [Conf]
  12. Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau
    Architectural Exploration and Optimization of Local Memory in Embedded Systems. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:90-0 [Conf]
  13. Robert Pasko, Patrick Schaumont, Veerle Derudder, Daniela Durackova
    Optimization Method for Broadband Modem FIR Filter Design using Common Subexpression Elimination. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:100-106 [Conf]
  14. Frank Vahid
    Port Calling: A Transformation for Reducing I/O during Multi-Package Functional Partitioning. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:107-112 [Conf]
  15. Smita Bakshi, Daniel Gajski
    A Scheduling and Pipelining Algorithm for Hardware/Software Systems. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:113-0 [Conf]
  16. Gernot Koch, Udo Kebschull, Wolfgang Rosenstiel
    Co-Emulation and Debugging of HW/SW-Systems. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:120-125 [Conf]
  17. Henning Dierks
    Synthesising Controllers from Real-Time Specifications. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:126-133 [Conf]
  18. Chih-Tung Chen, Kayhan Küçükçakar
    A Source-Level Dynamic Analysis Methodology and Tool for High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:134-140 [Conf]
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